CN105830542A - Method for manufacturing stepped copper column in PCB - Google Patents
Method for manufacturing stepped copper column in PCB Download PDFInfo
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- CN105830542A CN105830542A CN201480002422.0A CN201480002422A CN105830542A CN 105830542 A CN105830542 A CN 105830542A CN 201480002422 A CN201480002422 A CN 201480002422A CN 105830542 A CN105830542 A CN 105830542A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Electroplating Methods And Accessories (AREA)
Abstract
A method for manufacturing a stepped copper column (40) in PCB, wherein an electroplating-resistant ink layer (20) is fabricated on a laminate comprising a copper foil layer (11), then a first dry film layer (30) and a first copper plated layer (41) are fabricated on the electroplating-resistant ink layer after baking the electroplating-resistant ink layer at a certain temperature for a certain time, then a second dry film layer (50) and a second copper plated layer (42) are fabricated on it, so that the first dry film layer and the second dry film layer can be removed selectively in a post-process, while the electroplating-resistant ink layer remains good; after continuing electroplating of a tin layer (60) on the laminate, the unwanted copper foil layer is removed by etching, and a PCB with a stepped copper column is obtained.
Description
Technical Field
The invention relates to the technical field of PCB manufacturing, in particular to a manufacturing method of a stepped copper column in a PCB.
Background
The PCB is a support body of electronic components, a carrier for electrical connection, and one of important components in the electronic industry, and is applied to almost every kind of electronic equipment, such as electronic watches, calculators, computers, communication electronic equipment, military weapon systems, and the like. With the continuous development of electronic devices, the multi-functionalization of electronic devices also requires more diversified designs of PCBs. The existing PCB is usually designed with an inner layer circuit, an outer layer circuit, a metalized through hole or blind hole connecting the inner and outer layer circuits, and a step groove, etc. The PCB with the stepped copper columns on the surface has the advantages that due to the fact that the manufacturing process is complex, the PCB with the stepped copper columns is rarely or even not applied to an electronic product, development of the PCB with the stepped copper columns is greatly influenced, and design and diversification of the PCB are limited.
Disclosure of Invention
The invention provides a method for manufacturing a stepped copper column on a PCB through multiple dry film pasting and multiple electroplating, aiming at the problem that the manufacturing process of the stepped copper column in the existing PCB manufacturing is complex and difficult to realize.
In order to achieve the purpose, the invention adopts the following technical scheme that the manufacturing method of the stepped copper column in the PCB comprises the following steps:
s1, manufacturing an anti-electroplating ink layer on the laminated board, windowing the position where the step copper pillar needs to be manufactured, and then baking the laminated board at the temperature of 116-; the laminated board comprises a substrate layer and a copper foil layer laminated with the substrate layer.
Preferably, the thickness of the electroplating-resistant ink layer is 20-26 μm.
Preferably, after the laminate is baked, the plating resist ink layer is roughened.
S2, manufacturing a first dry film layer on the laminated board, and windowing at the position where the step copper pillar needs to be manufactured, wherein the shape and the size of the windowing of the first dry film layer are consistent with those of the windowing of the electroplating-resistant ink layer; then, copper is electroplated on the open window to form a first copper plating layer.
Preferably, the first copper plating layer is electroplated at a current density of 22ASF until the first copper plating layer is flush with the first dry film layer. The concentration of copper ions in the electroplating cylinder is 55-65g/L, and the concentration of sulfuric acid is 125-135 mL/L.
S3, manufacturing a second dry film layer on the laminated board, and windowing at the position where the stepped copper pillar needs to be manufactured, wherein the windowing of the second dry film layer is smaller than that of the first dry film layer; then electroplating copper at the windowing part to form a second copper plating layer; the first copper plating layer and the second copper plating layer form a stepped copper pillar.
Preferably, the second copper plating layer is electroplated at a current density of 20ASF until the second copper plating layer is flush with the second dry film layer. The concentration of copper ions in the electroplating cylinder is 55-65g/L, and the concentration of sulfuric acid is 125-135 mL/L.
And S4, removing the first dry film layer and the second dry film layer, and then electroplating a tin layer on the stepped copper pillar.
S5, removing the plating resist ink layer, etching to remove the copper foil layer except the step copper pillar, and removing the tin layer.
In the method for manufacturing the copper pillar in the PCB described above, the step copper pillar having a larger number of step layers may be manufactured by repeating the step S3 before the step S4. Specifically, other dry film layers are manufactured on the laminated board by the method of the step S3, then other copper plating layers are electroplated on the windowing part, and the first copper plating layer, the second copper plating layer and the other copper plating layers form the step copper pillar. Then, in the method of step S4, the first dry film layer, the second dry film layer and other dry film layers on the laminate are all removed, followed by electroplating a tin layer on the stepped copper pillar. And proceeds to step S5.
In the above method for manufacturing the stepped copper pillar in the PCB, the laminated board is a core board, or a multi-layer board in which a core board provided with an inner-layer circuit and an outer-layer copper foil are laminated together through a prepreg.
Compared with the prior art, the invention has the beneficial effects that: the invention forms the step copper column gradually by firstly making the anti-electroplating ink layer on the laminated board and then making the dry film layer and the electroplating copper layer one by one. In the manufacturing process, the anti-electroplating ink layer is baked at a certain temperature and time and then a dry film layer is manufactured on the anti-electroplating ink layer, so that the dry film layer can be selectively removed in the later process, the anti-electroplating ink layer is kept intact, and the unnecessary copper foil layer can be removed through etching after the tin layer is continuously electroplated on the multilayer board, so that the PCB with the stepped copper columns is manufactured. The dry film layer is roughened before being manufactured on the electroplating-resistant ink layer, so that the dry film layer can be better attached to the electroplating-resistant ink layer, and wrinkling or blistering caused by insufficient adhesive force between the electroplating-resistant ink layer and the dry film layer can be avoided; the high current density is adopted for electroplating, so that the electroplating time is shortened, the anti-electroplating ink layer and the dry film layer can still keep good adhesion under the condition of long-time electroplating, no bubbles or separation and other phenomena occur between layers, and the occurrence of diffusion plating can be avoided. When the electroplating-resistant ink layer and each dry film layer are manufactured, the same exposure contraposition point is adopted, and the exposure contraposition precision is set within 20 mu m, so that the steps of the manufactured step copper pillar are coaxial, and the side surface of the step copper pillar is vertical and smooth.
Drawings
FIG. 1 is a schematic structural diagram of a PCB with an electroplating-resistant ink layer and a first dry film layer;
FIG. 2 is a schematic diagram illustrating a structure of the PCB after a first copper plating layer is plated thereon in accordance with an embodiment;
FIG. 3 is a schematic structural diagram of the PCB after a second dry film layer is formed thereon in the embodiment;
FIG. 4 is a schematic diagram illustrating a second copper plating layer electroplated on the PCB according to the embodiment;
FIG. 5 is a schematic structural diagram of the PCB with the first dry film layer and the second dry film layer removed in the embodiment;
FIG. 6 is a schematic diagram illustrating a structure of the PCB after tin plating;
FIG. 7 is a schematic diagram illustrating the structure of the embodiment after removing the plating resist layer from the PCB;
FIG. 8 is a schematic structural diagram of the PCB of the embodiment with the copper foil layer removed except for the stepped copper pillar;
fig. 9 is a schematic structural diagram of the PCB after the step copper pillar is fabricated and the tin layer is removed in the embodiment.
Detailed Description
In order to more fully understand the technical contents of the present invention, the technical solutions of the present invention will be further described and illustrated with reference to the following specific embodiments.
Examples
Referring to fig. 1 to 9, the present embodiment provides a method for manufacturing a stepped copper pillar in a PCB, where parameters of the PCB manufactured by the method are as follows:
core board: 0.71mm H/H layer number: 2L of
Sheet material Tg: 170 ° base copper: 1 OZ
The number of layers of the stepped copper columns is as follows: 2L of
The specific manufacturing steps are as follows:
(1) drilling peripheral holes and manufacturing exposure contraposition points on the process edge of the core plate 10, then manufacturing an anti-electroplating ink layer 20 on the core plate 10, windowing at the position where the step copper pillar needs to be manufactured, and then baking and roughening. The method comprises the following specific steps:
(a) cutting: the core plate 10 is cut according to the size of the jointed board, and the thickness of the core plate 10 is 0.71mm H/H.
(b) Peripheral aperture and exposure docking point: the drilling data is used to drill the peripheral holes in the process edge of the core 10. And an exposure counterpoint is made on the process edge of the core plate 10, and the made exposure counterpoint is used together when the electroplating-resistant ink layer 20, the first dry film layer 30 and the second dry film layer 50 are made subsequently.
(c) Screen printing of electroplating-resistant ink: and screen printing or coating the anti-electroplating ink on the core plate 10 to obtain the anti-electroplating ink layer 20, and controlling the thickness of the anti-electroplating ink layer 20 to be 20-26 mu m.
(d) Exposure and development: carrying out counterpoint exposure by 6-7 grids of exposure energy (21 grids of exposure ruler) and exposure counterpoint points, setting the exposure counterpoint precision within 20 mu m, and then developing to ensure that the area of the core plate 10 except the position where the step copper column 40 needs to be manufactured is completely covered by the electroplating-resistant ink layer 20, and the position where the step copper column 40 needs to be manufactured is completely exposed, namely, a windowing is arranged at the position where the step copper column 40 needs to be manufactured.
(e) Baking: the core plate 10 is placed at 116-124 ℃ for baking for 23-27 min. The baking of the anti-electroplating ink layer 20 can ensure that the dry film layer can be selectively removed and the anti-electroplating ink layer 20 can be kept intact during the subsequent drying of the dry film layer.
(f) Coarsening: the surface of the plating resist ink layer 20 is roughened by sandblasting to increase the adhesion of the subsequent dry film layer on the plating resist ink layer 20.
(2) The first dry film layer 30 is formed on the core board 10, and a window is opened at a position where the stepped copper pillar 40 is to be formed, and then copper is electroplated at the window to form a first copper plating layer 41. As shown in fig. 1-2. The method comprises the following specific steps:
(a) pasting a first dry film: pasting a dry film with the thickness of 50 mu m on the core plate 10, wherein the film pressing temperature is as follows: 112 ℃ and 118 ℃, pressure: 5.0-5.5Kgf/cm2Speed: 1.4-1.5m/min, plate temperature: 50-60 ℃, plate temperature: 70-85 ℃.
(b) Exposure and development: carrying out contraposition exposure by 7-8 grids of exposure energy (21 grids of exposure ruler) and exposure contraposition points, setting the exposure contraposition precision within 20 mu m, and then developing to form a first dry film layer 30, so that the area of the core plate 10 except the position where the step copper column 40 needs to be manufactured is completely covered by the first dry film layer 30, the position where the step copper column 40 needs to be manufactured is completely exposed, namely, a window is arranged at the position where the step copper column 40 needs to be manufactured, and the shape and the size of the window are completely consistent with the window on the electroplating-resistant ink layer 20.
(c) Micro-etching: and carrying out surface microetching treatment on the core plate 10, and controlling the microetching amount to be 1.0-2.0 mu m, so as to ensure the cleanliness and roughness of the surface of the copper foil layer 11 at the position of the window on the core plate 10, and ensure that the first copper plating layer 41 on the subsequent electroplating can be well attached to the copper foil layer 11.
(d) Electroplating of the first copper plating layer 41: the core board 10 is placed in an electroplating copper cylinder for electroplating, the concentration of copper ions in the electroplating copper cylinder is 55-65g/L, the concentration of sulfuric acid is 125-135mL/L, electroplating is carried out at the current density of 22ASF, the electroplating time is about 165min, and the first copper plating layer 41 is obtained, wherein the surface of the first copper plating layer 41 is flush with the surface of the first dry film layer 30. The high current density is adopted for copper electroplating, so that the electroplating time can be shortened, and the risk of separation of the first dry film layer 30 or the anti-electroplating ink layer 20 is reduced. The surface of the first copper plating layer 41 is flush with the surface of the first dry film layer 30, so that the surface of the core plate 10 is flat, and the dry film attached subsequently can be well attached to the first dry film layer 30.
(e) Cleaning and drying: the core board 10 is subjected to overall surface cleaning and low-temperature drying (vacuum degree: 400mmHg to 500mmHg, temperature: 55 ℃ to 65 ℃, time: 45 min) in a negative pressure environment to remove residual moisture between the first dry film layer 30 and the first copper plating layer 41 and prevent the subsequently attached dry film layer from wrinkling or blistering due to the influence of the moisture.
(3) Manufacturing a second dry film layer 50 on the core board 10, windowing the position where the stepped copper pillar 40 needs to be manufactured, and then electroplating copper at the windowed position to form a second copper plating layer 42; the first copper plating layer 41 and the second copper plating layer 42 constitute a stepped copper pillar 40. As shown in fig. 3-4. The method comprises the following specific steps:
(a) pasting a second lower dry film 51: pasting a dry film with the thickness of 50 mu m on the core plate 10, wherein the film pressing temperature is as follows: 112 ℃ and 118 ℃, pressure: 5.0-5.5Kgf/cm2Speed: 1.6-1.7m/min, plate temperature: 50-60 ℃, plate temperature: 65-80 ℃.
Pasting a second upper dry film 52: continuously pasting a dry film with the thickness of 50 mu m on the core plate 10, wherein the film pressing temperature is as follows: 112 ℃ and 118 ℃, pressure: 5.0-5.5Kgf/cm2Speed: 1.6-1.7m/min, plate temperature: 50-60 ℃, plate temperature: 65-80 ℃.
(b) Exposure and development: carrying out alignment exposure by using exposure energy of 8-9 grids (21 grids of exposure ruler) and exposure alignment points, setting the exposure alignment precision within 20 mu m, then developing, forming a second dry film layer 50 by using a second lower dry film 51 and a second upper dry film 52, completely covering the area of the core plate 10 except the position where the stepped copper column 40 needs to be manufactured by the second dry film layer 50, and completely exposing the position where the stepped copper column 40 needs to be manufactured, namely, arranging a window at the position where the stepped copper column 40 needs to be manufactured, wherein the window is smaller than the window of the first dry film layer 30, namely, the window is smaller than the upper surface area of the first copper plating layer 41, and each side of the window is retracted by 0.25mm inwards than each side of the upper surface of the first copper plating layer 41.
(c) Micro-etching: and carrying out surface microetching treatment on the core plate 10, and controlling the microetching amount to be 1.0-2.0 mu m, so as to ensure the cleanliness and roughness of the upper surface of the first copper plating layer 41, and ensure that the second copper plating layer 42 which is plated later can be well attached to the first copper plating layer 41.
(d) Electroplating of the second copper plating layer 42: the core board 10 is placed in an electroplating copper cylinder for electroplating, the concentration of copper ions in the electroplating copper cylinder is 55-65g/L, the concentration of sulfuric acid is 125-135mL/L, the electroplating is carried out at the current density of 20ASF, the electroplating time is about 235min, and the second copper plating layer 42 is obtained, and the surface of the second copper plating layer 42 is flush with the surface of the second dry film layer 50. The high current density is adopted for copper electroplating, so that the electroplating time can be shortened, and the risk of separation of the first dry film layer 30, the second dry film layer 50 or the electroplating-resistant ink layer 20 is reduced. The surface of the second copper plating layer 42 is flush with the surface of the second dry film layer 50, so that the surface of the core board 10 is flat.
The stepped copper pillar 40 having two steps is constituted by the first copper plating layer 41 and the second copper plating layer 42.
(4) The first dry film layer 30 and the second dry film layer 50 are removed, and then the tin layer 60 is electroplated on the stepped copper pillar 40. As shown in fig. 5-6.
(a) Removing a dry film: and (3) stripping the core plate 10 by using the stripping liquid, so that all dry films on the core plate 10 are completely removed, and the electroplating-resistant ink layer 20 is well reserved. Temperature: 45-51 ℃, spray pressure: 1.2-1.8kgf/cm2And time: 2.5-3.0 min.
(b) Tin plating: a tin layer 60 is electroplated on the stepped copper pillar 40 to form a resist layer, the tin layer 60 having a thickness of 5-8 μm.
(5) The plating resist ink layer 20 is removed, and then the copper foil layer 11 except for the stepped copper pillar 40 is etched away, followed by removal of the tin layer 60. As shown in fig. 7-9.
After the plating resist ink layer 20 is removed, the copper foil layer 11 not covered with the tin layer 60 is removed by alkaline etching. The tin layer 60 is then stripped away.
(6) After the surface treatment is performed on the core board 10 with the stepped copper post 40, the routing shape, the electrical test and the final inspection are sequentially performed, and the qualified product can be delivered.
In other embodiments, an outer layer circuit can be formed on the surface of the core board, so that the formed PCB has an outer layer circuit in addition to the step copper.
In other embodiments, the core board in the above examples may be replaced by a multilayer board provided with an inner layer circuit, which is formed by laminating the core board provided with the inner layer circuit and an outer layer copper foil together through a prepreg.
In addition, the step copper pillar with more step layers can be manufactured by repeating the step (3) before the step (4) of the above embodiment. Namely: and (4) manufacturing a third dry film layer on the core board by the method in the step (3), and then electroplating a third copper plating layer at the windowing position, wherein the first copper plating layer, the second copper plating layer and the third copper plating layer form a step copper column. Then, in the method of step S4, the first dry film layer, the second dry film layer and the third dry film layer on the laminate are all removed, followed by electroplating a tin layer on the stepped copper pillar. And continuing the flow of the steps (5) and (6). Thereby manufacturing the stepped copper pillar with three steps.
And (3) repeating the step (3) once before the step (4) according to the method if the step copper column with four steps is required to be manufactured. If a plurality of layers of stepped copper pillars need to be manufactured, the process is repeated.
Comparative example 1
The present comparative example provides a method for manufacturing a stepped copper pillar in a PCB, which is substantially the same as the method of the above embodiment except that: in the step (1), the core board is not baked (e operation in the step 1 is omitted), namely after the electroplating-resistant ink layer is manufactured on the core board, the electroplating-resistant ink layer is directly roughened.
In the step (4), when the first dry film layer and the second dry film layer are stripped by the stripping solution, the electroplating-resistant ink layer is removed together, so that the operations of tin plating and the step (5) cannot be carried out continuously.
Comparative example 2
The present comparative example provides a method for manufacturing a stepped copper pillar in a PCB, which is substantially the same as the method of the above embodiment except that: in the step (1), after the anti-electroplating ink layer is manufactured on the core board, the core board is placed at 106-114 ℃ for baking for 18-22 min.
In the step (4), when the first dry film layer and the second dry film layer are stripped by the stripping solution, part of the electroplating-resistant ink layer is removed together, so that the electroplating-resistant ink layer cannot be kept complete. When the tin plating is continuously carried out, the copper surface from which the electroplating-resistant ink layer is removed is also plated with a tin layer, and finally, the copper foil layer (the copper foil layer except the stepped copper pillar) to be removed is not etched completely, so that the quality of the product is influenced.
The technical contents of the present invention are further illustrated by the examples, so as to facilitate the understanding of the reader, but the embodiments of the present invention are not limited thereto, and any technical extension or re-creation based on the present invention is protected by the present invention.
Claims (9)
- A manufacturing method of a stepped copper column in a PCB is characterized by comprising the following steps:s1, manufacturing an anti-electroplating ink layer on the laminated board, windowing the position where the step copper pillar needs to be manufactured, and then baking the laminated board at the temperature of 116-; the laminated board comprises a substrate layer and a copper foil layer laminated with the substrate layer;s2, manufacturing a first dry film layer on the laminated board, and windowing at the position where the step copper pillar needs to be manufactured, wherein the shape and the size of the windowing of the first dry film layer are consistent with those of the windowing of the electroplating-resistant ink layer; then electroplating copper at the windowing part to form a first copper plating layer;s3, manufacturing a second dry film layer on the laminated board, and windowing at the position where the stepped copper pillar needs to be manufactured, wherein the windowing of the second dry film layer is smaller than that of the first dry film layer; then electroplating copper at the windowing part to form a second copper plating layer; the first copper plating layer and the second copper plating layer form a stepped copper column;s4, removing the first dry film layer and the second dry film layer, and then electroplating a tin layer on the stepped copper pillar;s5, removing the plating resist ink layer, etching to remove the copper foil layer except the step copper pillar, and removing the tin layer.
- The method as claimed in claim 1, wherein the step of roughening the electroplating ink layer is performed after baking the laminate in step S1.
- The method as claimed in claim 2, wherein the step S2 is performed by electroplating the first copper plating layer at a current density of 22ASF until the first copper plating layer is flush with the first dry film layer.
- The method as claimed in claim 3, wherein the step S3 is performed by electroplating the second copper plating layer at a current density of 20ASF until the second copper plating layer is flush with the second dry film layer.
- The method as claimed in claim 4, wherein in the steps S2 and S3, when the first copper plating layer and the second copper plating layer are electroplated, the concentration of copper ions in the electroplating cylinder is 55-65g/L, and the concentration of sulfuric acid is 125-135 mL/L.
- The method of claim 5, wherein step S3 is repeated before step S4, and other dry film layers are formed on the laminated board by the method of step S3, and then other copper plating layers are electroplated on the open windows, wherein the first copper plating layer, the second copper plating layer and the other copper plating layers form the step copper pillar; the first dry film layer, the second dry film layer and other dry film layers on the laminate were then all removed and a tin layer was plated on the stepped copper pillar in the manner of step S4.
- The method as claimed in claim 6, wherein the thickness of the plating resist ink layer is 20-26 μm.
- The method for manufacturing a stepped copper pillar in a PCB according to any one of claims 1 to 7, wherein the laminated board is a core board.
- The method for manufacturing a stepped copper pillar in a PCB according to any one of claims 1 to 7, wherein the laminate is a multi-layer board in which a core board provided with an inner layer circuit and an outer layer copper foil are laminated together by means of a prepreg.
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Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1075063A (en) * | 1996-09-02 | 1998-03-17 | Oki Purintetsudo Circuit Kk | Manufacture of post-connection type printed wiring board |
CN1404353A (en) * | 2001-08-28 | 2003-03-19 | 耀华电子股份有限公司 | Making process of printed circuit board with solid copper pins for interconnection |
US20110265321A1 (en) * | 2010-04-28 | 2011-11-03 | Chih-Kang Chen | Manufacturing Method of Identifiable Print Circuit Board |
CN102291934A (en) * | 2011-08-05 | 2011-12-21 | 华为技术有限公司 | Plated through hole, printed circuit board (PCB) and method for manufacturing plated through hole |
CN102523694A (en) * | 2011-12-20 | 2012-06-27 | 广州杰赛科技股份有限公司 | Method for avoiding substrate exposure during pattern transfer of step circuit boards |
CN103208479A (en) * | 2012-05-29 | 2013-07-17 | 珠海越亚封装基板技术股份有限公司 | Multilayer electronic structure having integrated step-shaped stack structure |
CN103731997A (en) * | 2013-12-24 | 2014-04-16 | 广州兴森快捷电路科技有限公司 | PCB containing stepped copper thickness patterns and manufacturing method thereof |
-
2014
- 2014-11-27 CN CN201480002422.0A patent/CN105830542B/en active Active
- 2014-11-27 WO PCT/CN2014/092351 patent/WO2016082146A1/en active Application Filing
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1075063A (en) * | 1996-09-02 | 1998-03-17 | Oki Purintetsudo Circuit Kk | Manufacture of post-connection type printed wiring board |
CN1404353A (en) * | 2001-08-28 | 2003-03-19 | 耀华电子股份有限公司 | Making process of printed circuit board with solid copper pins for interconnection |
US20110265321A1 (en) * | 2010-04-28 | 2011-11-03 | Chih-Kang Chen | Manufacturing Method of Identifiable Print Circuit Board |
CN102291934A (en) * | 2011-08-05 | 2011-12-21 | 华为技术有限公司 | Plated through hole, printed circuit board (PCB) and method for manufacturing plated through hole |
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