[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

CN105812021A - Method for carrying out fast and synchronous statistics on PN bit error ratios of data transmission device - Google Patents

Method for carrying out fast and synchronous statistics on PN bit error ratios of data transmission device Download PDF

Info

Publication number
CN105812021A
CN105812021A CN201610171202.1A CN201610171202A CN105812021A CN 105812021 A CN105812021 A CN 105812021A CN 201610171202 A CN201610171202 A CN 201610171202A CN 105812021 A CN105812021 A CN 105812021A
Authority
CN
China
Prior art keywords
code
bit error
phase
data
ratio measurement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201610171202.1A
Other languages
Chinese (zh)
Inventor
张波
兰霞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CETC 10 Research Institute
Original Assignee
CETC 10 Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CETC 10 Research Institute filed Critical CETC 10 Research Institute
Priority to CN201610171202.1A priority Critical patent/CN105812021A/en
Publication of CN105812021A publication Critical patent/CN105812021A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • H04B1/707Spread spectrum techniques using direct sequence modulation
    • H04B1/7073Synchronisation aspects
    • H04B1/7075Synchronisation aspects with code phase acquisition

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

The invention provides a method for carrying out fast and synchronous statistics on PN bit error ratios of a data transmission device. According to the method, time and hardware resources demanded for synchronizing PN codes are clearly reduced. The method is realized through the following technical scheme of extracting data from the demodulation data in real time as the initial phase of a PN code generator after demodulation data of the data transmission device is received, wherein the extracted data has a length same to that of the initial phase of the PN code generator; generating a polynomial through combination of preset PN codes; generating the PN codes as comparison templates; comparing the demodulation data with the generated PN codes; carrying out statistics on the bit error ratios of the demodulation data; confirming that there are bit errors in the extracted initial phase if the statistic bit error ratio is more than 1.0e-1; stopping statistics of this round; extracting a new initial phase from the demodulation data again; regenerating PN codes; carrying out statistics on bit error ratios; determining that the generated PN code phase aligns with the phase of the demodulation data when the statistic bit error ratio is less than 1.0e-1; and taking the bit error ratio statistic result as the final bit error ratio statistic result.

Description

The method of the Fast synchronization statistics data transmission equipment PN code bit error rate
Technical field
The invention belongs to Bit Error Ratio Measurement technical field in digital communication, relate to a kind of can be used for data transmission equipment, Error Detector Efficient Bit Error Ratio Measurement method.
Background technology
For various reasons, signal inevitably results from mistake in transmitting procedure.Such as it is subject in transmitting procedure Extraneous interference, or make the signal of transmission be distorted owing to the quality of each ingredient is not ideal enough inside communication system Deng.When experienced interference or signal distortion reach to a certain degree, mistake will be produced.In data communication, if the letter sent Number it is " 1 ", and the signal received is " 0 ", here it is " error code ", namely there occurs a mistake.Therefore, error code Generation be owing to transmitting at signal in, decay changes the voltage of signal, causes signal to be destroyed in the transmission, produces by mistake Pulse, transmission equipment fault and other factors that code, noise, alternating current or lightning cause all can cause error code.The bit error rate (BER:bit error ratio) is the index weighing data data at the appointed time transmission accuracy.Different systems there is difference Error code requirement, the equipment of various different sizes, all have the strict bit error rate to define.Generally, the number received within a certain period of time Word signal occurs the ratio of total bit number of the digital signal that the bit number of mistake and same time received, is just called " bit error rate ", " bit error rate " can also be called.
The Bit Error Ratio Measurement circuit of quality and transceiver process performance for assessing transmission link has in field of data transmission And be widely applied.Mode the most frequently used in current Bit Error Ratio Measurement be use PN7, PN9, PN10, PN11, PN12, The random sequences such as PN15, PN23, PN31 carry out Bit Error Ratio Measurement.During Bit Error Ratio Measurement, the randomness of random sequence is more Good, with real data transmission procedure closer to, more can react the situation of whole data transmission system objectively, therefore long week The application in Bit Error Ratio Measurement of the PN code of phase gets more and more.The main of Bit Error Ratio Measurement existence is carried out with macrocyclic PN code Problem is that lock in time is long, and this is due to when carrying out Bit Error Ratio Measurement, it is necessary first to demodulating data is produced with receiving terminal The phase alignment of the PN code as standard comparison template, and when the cycle of PN code is the longest, the cycle of such as PN31 is 231-1, if transfer rate is 100M, its cycle has exceeded 21 seconds, and when data rate is lower, the cycle is longer, and this will lead Cause the lock in time when carrying out Bit Error Ratio Measurement the longest, take resource many, make the time of whole Bit Error Ratio Measurement be greatly increased, sternly Ghost image rings testing efficiency.
Summary of the invention
It is an object of the invention to for during prior art Bit Error Ratio Measurement use long period PN code carry out Bit Error Ratio Measurement time, Lock in time length, take the problem that resource is many, it is provided that a kind of can substantially reduce PN code synchronize needed for hardware resource, realization Simply, lock in time shortens, and lock in time is not added up data transmission equipment PN code by mistake by the Fast synchronization of PN code cycle influences The method of code check.
The present invention solves the scheme that prior art problem used: a kind of Fast synchronization statistics data transmission equipment PN code error code The method of rate, it is characterised in that comprise the steps:
After receiving the demodulating data of data transmission equipment, according to the register capacity of PN code generator, directly from demodulating data in real time Extract the data identical with the PN code generator first phase length first phase as PN code generator, in conjunction with PN code set in advance Generator polynomial, produces the PN code as comparison masterplate;Demodulating data is contrasted with the PN code produced, statistics The bit error rate of demodulating data;Judge whether the bit error rate of the bit error rate result counted is less than 1.0e-1, if it find that count Bit error rate result ratio is more than 1.0e-1, then it is assumed that be to there is error code in the first phase extracted, and stops epicycle statistics, again captures new First phase, from demodulating data, again extract data identical with PN code generator register capacity, as PN code generator First phase, in conjunction with PN code generator polynomial set in advance, again produce the PN code as comparison masterplate, demodulation number Contrast according to the PN code produced, if the bit error rate counted is still above 1.0e-1, repeat said process;If system The bit error rate counted out is less than 1.0e-1, then it is assumed that there is not error code, PN code generator in the first phase extracted from demodulating data Produce is the PN code perfectly aligned with demodulating data phase place, then maintain current error code statistic processes, then, according to mistake Bit obtains final Bit Error Ratio Measurement result with the ratio calculation of total bit.
The present invention has the advantages that compared to prior art
The hardware resource needed for PN code synchronizes can be substantially reduced.After the present invention uses the data after receiving demodulation, directly from solution The data that in adjusting data, extract real-time is identical with PN code generator first phase length are as the first phase of PN code generator, in conjunction with in advance The PN code generator polynomial set, produces the PN code consistent with demodulating data, the phase place of this PN code and reception data Phase place only has the least fixed delay, as long as being modified according to this delays receiving data, it becomes possible to realize demodulating data and The phase alignment of the PN code produced such that it is able to starting Bit Error Ratio Measurement, this statistical can substantially reduce PN Hardware resource needed for code synchronization.
Realizing simple, lock in time shortens.The present invention uses PN code generation module according to preset PN code generator polynomial And from demodulating data extract first phase, produce the standard PN code for carrying out error code comparison, compare with demodulating data Right, circulate more than or less than 1.0e-1 according to the bit error rate result counted confirm the first phase that extracts from demodulating data is The no error code that do not exists, according to the Bit Error Ratio Measurement result that error bit is final with the ratio calculation of total bit, it is achieved simple, it is possible to Within shortening to 10 clock cycle lock in time during Bit Error Ratio Measurement, lock in time is less than the most methodical 1/10, aobvious Write lock in time when shortening Bit Error Ratio Measurement.The effect of PN code cycle the longest the method is the most notable.
Lock in time is not by PN code cycle influences.The present invention is at the product of the above-mentioned PN code as Bit Error Ratio Measurement comparison other During life, the heterogeneous formula of generation of PN code is predetermined, and the first phase of PN code is directly to extract from demodulating data, because of The lock in time of this Bit Error Ratio Measurement is not affected by the PN code cycle, no matter the PN code cycle is how long, single is the fewest for lock in time In 10 clock cycle.
Bit Error Ratio Measurement method in the present invention, can not only be applied to the Bit Error Ratio Measurement of Real-time demodulation data, additionally it is possible to Data file after storage is carried out Bit Error Ratio Measurement afterwards, it is possible to be widely used in the bit error rate performance of various data transmission set Test.It is particularly suitable for use with the PN sequences such as PN7, PN9, PN10, PN11, PN12, PN15, PN23, PN31 Carry out Fast synchronization process during error rate test.
Accompanying drawing explanation
The present invention is further described with embodiment below in conjunction with the accompanying drawings.
Fig. 1 is the bit error rate comparison circuit principle schematic that Bit Error Ratio Measurement method of the present invention provides.
Detailed description of the invention
Refering to Fig. 1.In preferred embodiment described below, according to the present invention, when PN code produces, one PN sequence is generated by multinomial and first phase uniquely determines, selected when utilizing PN code to carry out data transmission equipment Bit Error Ratio Measurement PN code sequence be pre-determined, therefore the generator polynomial of this PN code is known, Bit Error Ratio Measurement needs to be carried out Demodulating data is contrasted with standard PN sequence, and before contrasting, needs the PN sequence demodulating data and standard Phase alignment.The first phase carrying out data transmission equipment Bit Error Ratio Measurement time institute accepted standard PN sequence is fixedly installed the most in advance, But directly extract from demodulating data, adopt the phase place of the PN code sequence produced in this way and the phase of demodulating data Only existing the least fixed skew between Wei, this fixed skew is all identical for different PN codes, and this Phase contrast is known, avoiding problems and demodulating data is carried out the complex process alignd with the phase place of the first phase of standard PN sequence. By extract from demodulating data first phase insert PN code generator just can make the generation of PN code the phase place of PN code that produces Phase alignment with demodulating data such that it is able to proceed by Bit Error Ratio Measurement.
After receiving the demodulating data of data transmission equipment, according to the register capacity of PN code generator, carry from demodulating data Take out the data identical with PN code generator register capacity, as the first phase of PN code generator, insert PN code and produce mould Block, PN code generation module produces according to preset PN code generator polynomial and the first phase from extracting data and is used for carrying out error code The standard PN code of comparison, compares with demodulating data;Add up 1000 bits, if the bit error rate result error code counted Rate is more than 1.0e-1, then it is assumed that there is error code in the first phase extracted, and stops epicycle statistics, again extract from demodulating data with The data that PN code generator register capacity is identical, as the first phase of PN code generator, insert PN code generation module, PN Code generation module produces, according to preset PN code generator polynomial and the first phase from extracting data, the mark being used for carrying out error code comparison Quasi-PN code, compares with demodulating data;Add up 1000 bits, if the bit error rate result bit error rate counted is more than 1.0e-1, repeats said process;If the error code demodulating data bit error rate counted is less than 1.0e-1, then it is assumed that from demodulating data In there is not error code in the first phase that extracts, what PN code generator produced is the PN code perfectly aligned with demodulating data phase place, Then maintain current error rate statistic processes, obtain final Bit Error Ratio Measurement result according to the ratio calculation of error bit Yu total bit. Although the data after Xie Tiao there may be error code, but owing to the first phase of conventional PN code only has several to dozens of bits, and solve The bit error rate of adjusting data is typically to be far superior to 1.0e-1, therefore repeats to extract several times, can extract the first phase not having error code, The PN sequence corresponding with demodulating data just can be recovered such that it is able to carry out in conjunction with known PN code generator polynomial Bit Error Ratio Measurement.
From demodulating data, extracting the first phase time of PN code generator, owing to demodulating data there may be error code, therefore carrying The first phase taken out there may exist error code.When the first phase extracted exists error code, according to the phase of the PN code that this first phase produces Position can not align with the phase place of demodulating data, now Bit Error Ratio Measurement result will be close to 5e-1, more than 1.0e-1, the most again from Demodulating data extracts first phase.Only when the first phase extracted from demodulating data does not comprises error code, PN code generator produces The phase place of PN code just could can carry out normal Bit Error Ratio Measurement with the phase alignment of demodulating data.
The bit error rate of demodulating data is the least, occurs that the probability of error code the least, averagely in the first phase extracted from demodulating data Lock in time is the shortest;The bit error rate of demodulating data is the highest, occurs that the probability of error code the biggest in the first phase extracted from demodulating data, Average lock in time is the longest.
The bit error rate comparison circuit created according to the present invention, including data delay module, Bit Error Ratio Measurement module, the bit error rate Statistical result judge module and the first phase extraction module being connected in parallel in data delay module, Bit Error Ratio Measurement module, PN code produce Module, wherein, the demodulating data from data transmission equipment passes through first phase extraction module, real-time interception and PN code from demodulating data The data that generator polynomial length is identical, the first phase as PN code generator gives PN code generation module, PN code generation module According to the PN code generator polynomial of input, and produce PN code after receiving the first phase data that first phase extraction module is sent here. Above-mentioned demodulating data gives data delay module, the demodulation to receiving of the data delay module while giving first phase extraction module Data postpone, and the demodulating data received after making delay is perfectly aligned with the PN code that PN code generation module produces.For not Same PN code, it is fixing for postponing length, and is to maintain constant.Bit Error Ratio Measurement module produces with PN code generator PN code be template, statistical data Postponement module postpone after the bit error rate of demodulating data, statistical magnitude is with 1000 bits Meter, sends statistical result into Bit Error Ratio Measurement result judge module, the Bit Error Ratio Measurement result judge module bit error rate to receiving Statistical result judges, if the bit error rate is more than 1.0e-1, then it is assumed that first phase extraction module this extract from demodulating data There is error code in PN code first phase, now Bit Error Ratio Measurement result judge module output error rate statistics failure flags, gives first phase Extraction module;First phase extraction module extracts at the beginning of PN code again according to the Bit Error Ratio Measurement failure flags received from demodulating data Phase, gives PN code generation module and produces corresponding PN code, be re-fed into Bit Error Ratio Measurement module, starts next round bit error rate system Meter, Bit Error Ratio Measurement module is given Bit Error Ratio Measurement result judge module Bit Error Ratio Measurement result, is repeated above-mentioned judge process. When Bit Error Ratio Measurement result determines the bit error rate less than 1.0e-1, then it is assumed that first phase extraction module extracts from demodulating data There is not error code in PN code first phase, this statistics effectively, then proceeds Bit Error Ratio Measurement.Bit Error Ratio Measurement result judges mould Block receives and terminates this statistics after statistics stops signal, and Bit Error Ratio Measurement result judge module receives and restarts weight after signal Newly start to take turns Bit Error Ratio Measurement process.

Claims (10)

1. the method for a Fast synchronization statistics data transmission equipment PN code bit error rate, it is characterised in that comprise the steps:
After receiving the demodulating data of data transmission equipment, according to the register capacity of PN code generator, directly from demodulating data in real time Extract the data identical with the PN code generator first phase length first phase as PN code generator, in conjunction with PN code set in advance Generator polynomial, produces the PN code as comparison masterplate;Demodulating data is contrasted with the PN code produced, statistics The bit error rate of demodulating data;Judge whether the bit error rate result counted is less than 1.0e-1, if it find that the bit error rate knot counted Fruit is more than 1.0e-1, then it is assumed that be to there is error code in the first phase extracted, and stops epicycle statistics, again captures new first phase, weight The new data that extraction is identical with PN code generator register capacity from demodulating data, as the first phase of PN code generator, knot Close PN code generator polynomial set in advance, again produce the PN code as comparison masterplate, demodulating data with produce PN code contrast, if the bit error rate counted is still above 1.0e-1, repeat said process;If the error code counted Rate is less than 1.0e-1, then it is assumed that there is not error code, the PN that PN code generator produces in the first phase extracted from demodulating data The PN code that code is perfectly aligned with demodulating data phase place, then maintain current error code statistic processes, then, according to error bit with total The ratio calculation of bit obtains final Bit Error Ratio Measurement result.
2. the method for the Fast synchronization statistics data transmission equipment PN code bit error rate as claimed in claim 1, it is characterised in that: a PN Sequence is uniquely determined, when utilizing PN code to carry out data transmission equipment Bit Error Ratio Measurement by generator polynomial and the first phase of PN code sequence The generator polynomial of selected PN code sequence is known.
3. the method for the Fast synchronization statistics data transmission equipment PN code bit error rate as claimed in claim 1, it is characterised in that: carry out error code During rate statistics, demodulating data contrasts with standard PN sequence, before contrasting, the PN sequence of demodulating data Yu standard Phase alignment.
4. the method for the Fast synchronization statistics data transmission equipment PN code bit error rate as claimed in claim 2, it is characterised in that: carry out counting biography The first phase of equipment Bit Error Ratio Measurement time institute accepted standard PN sequence is fixedly installed the most in advance, but directly from demodulating data Middle extraction, adopt only exist between phase place and the phase place of demodulating data of the PN code sequence produced in this way the least Fixed skew, this fixed skew is all identical for different PN codes, and this phase contrast is known.
5. the bit error rate comparison circuit that method creates according to claim 1, including: data delay module, the bit error rate are united Meter module, Bit Error Ratio Measurement result judge module and the first phase being connected in parallel in data delay module, Bit Error Ratio Measurement module extract mould Block, PN code generation module, it is characterised in that:, the demodulating data from data transmission equipment passes through first phase extraction module, from demodulation number According to the data that middle real-time interception is identical with PN code generator polynomial length, the first phase as PN code generator gives PN code product Raw module, the first phase data that PN code generation module is sent here according to the PN code generator polynomial pre-set and first phase extraction module Produce the standard PN sequence for carrying out error code comparison.
6. bit error rate comparison circuit as claimed in claim 5, it is characterised in that: demodulating data is giving the same of first phase extraction module Time give data delay module, the demodulating data received is postponed by data delay module, make the demodulating data after delay with The PN code phase that PN code generator produces is perfectly aligned.
7. bit error rate comparison circuit as claimed in claim 5, it is characterised in that: Bit Error Ratio Measurement module produces with PN code generator PN code compare as the demodulating data after template, with data delay module delays, statistical magnitude is 1000 bits Meter, sends statistical result into Bit Error Ratio Measurement result judge module, judges the Bit Error Ratio Measurement result received, if The bit error rate is more than 1.0e-1, then it is assumed that what first phase extraction module extracted exists error code in the first phase producing PN code, this PN code produces mistake, output error rate statistics failure flags, gives first phase extraction module and again extracts first phase.
8. bit error rate comparison circuit as claimed in claim 7, it is characterised in that: first phase extraction module is according to the bit error rate received Statistics failure flags extracts first phase again from demodulating data, gives PN code generator, and PN code generator is according to again extracting First phase produce new PN code, send into Bit Error Ratio Measurement module, start next round Bit Error Ratio Measurement, Bit Error Ratio Measurement module handle Bit Error Ratio Measurement result gives Bit Error Ratio Measurement result judge module, repeats above-mentioned judge process.
9. bit error rate comparison circuit as claimed in claim 5, it is characterised in that: Bit Error Ratio Measurement result judge module was judging Cheng Zhong, it is judged that to the bit error rate less than 1.0e-1, what first phase extraction module extracted does not exist by mistake in the first phase producing PN code Code, confirms this statistics effectively, then proceeds Bit Error Ratio Measurement.
10. bit error rate comparison circuit as claimed in claim 1, it is characterised in that: Bit Error Ratio Measurement result judge module receives system Meter terminates this statistics after stopping signal, Bit Error Ratio Measurement result judge module receives after restarting signal and restarts to take turns Bit Error Ratio Measurement process.
CN201610171202.1A 2016-03-23 2016-03-23 Method for carrying out fast and synchronous statistics on PN bit error ratios of data transmission device Pending CN105812021A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610171202.1A CN105812021A (en) 2016-03-23 2016-03-23 Method for carrying out fast and synchronous statistics on PN bit error ratios of data transmission device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610171202.1A CN105812021A (en) 2016-03-23 2016-03-23 Method for carrying out fast and synchronous statistics on PN bit error ratios of data transmission device

Publications (1)

Publication Number Publication Date
CN105812021A true CN105812021A (en) 2016-07-27

Family

ID=56454845

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610171202.1A Pending CN105812021A (en) 2016-03-23 2016-03-23 Method for carrying out fast and synchronous statistics on PN bit error ratios of data transmission device

Country Status (1)

Country Link
CN (1) CN105812021A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108627861A (en) * 2017-03-24 2018-10-09 展讯通信(上海)有限公司 Catching method, bit synchronization method and the device of the non-GEO satellite B1 signals of BDS
CN111130598A (en) * 2019-11-19 2020-05-08 中国电力科学研究院有限公司 Device and method for acquiring error rate of data link system of unmanned aerial vehicle

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4428076A (en) * 1980-12-16 1984-01-24 Wandel & Goltermann Gmbh & Co. Method of and system for evaluating bit errors in testing a signal path
US6556618B1 (en) * 1998-08-26 2003-04-29 Telefonaktiebolaget Lm Ericsson Transmitter, receiver and method in a telecommunication system for generating PN sequences for a plurality of user channels
CN1505326A (en) * 2002-12-02 2004-06-16 深圳市中兴通讯股份有限公司 Error code detection apparatus and method for digital exchange system
CN1728626A (en) * 2004-07-27 2006-02-01 中兴通讯股份有限公司 Method and device for detecting error code in wireless digital communication system
CN102752098A (en) * 2012-07-11 2012-10-24 烽火通信科技股份有限公司 Error code measuring method based on pseudo-random code sequence synchronization for communication system

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4428076A (en) * 1980-12-16 1984-01-24 Wandel & Goltermann Gmbh & Co. Method of and system for evaluating bit errors in testing a signal path
US6556618B1 (en) * 1998-08-26 2003-04-29 Telefonaktiebolaget Lm Ericsson Transmitter, receiver and method in a telecommunication system for generating PN sequences for a plurality of user channels
CN1505326A (en) * 2002-12-02 2004-06-16 深圳市中兴通讯股份有限公司 Error code detection apparatus and method for digital exchange system
CN1728626A (en) * 2004-07-27 2006-02-01 中兴通讯股份有限公司 Method and device for detecting error code in wireless digital communication system
CN102752098A (en) * 2012-07-11 2012-10-24 烽火通信科技股份有限公司 Error code measuring method based on pseudo-random code sequence synchronization for communication system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108627861A (en) * 2017-03-24 2018-10-09 展讯通信(上海)有限公司 Catching method, bit synchronization method and the device of the non-GEO satellite B1 signals of BDS
CN108627861B (en) * 2017-03-24 2021-07-27 展讯通信(上海)有限公司 Acquisition method, bit synchronization method and device for BDS non-GEO satellite B1 signal
CN111130598A (en) * 2019-11-19 2020-05-08 中国电力科学研究院有限公司 Device and method for acquiring error rate of data link system of unmanned aerial vehicle

Similar Documents

Publication Publication Date Title
US10396921B2 (en) Multi-lane synchronization method, synchronization apparatus and system, and computer storage medium
EP2976866B1 (en) Timestamp correction in a multi-lane communication link with skew
CN109669899B (en) Method for adaptively adjusting serial port communication baud rate and serial port device
US8514955B2 (en) Communication system, data transmitter, and data receiver capable of detecting incorrect receipt of data
CN102123060B (en) FPGA (Field Programmable Gate Array) based error code testing method
CN108390752B (en) Signal receiving method
CN106877983B (en) Method for characterizing the performance of a communication link and receiver
CN102752098B (en) For the measurement of error code method synchronous based on pseudo-random code sequence of communication system
CN107087132A (en) Receiver and method for transmitting signals
CN103297218A (en) Distance measuring data processing method under incoherent measuring system
CN105610652A (en) Method and device for acquiring data transmission delay
CN109101453B (en) Asynchronous serial communication sampling system and method
CN105812021A (en) Method for carrying out fast and synchronous statistics on PN bit error ratios of data transmission device
CN107819562B (en) Data transmitting/receiving device and data transmitting/receiving method
CN103107861A (en) Slip code resistant frame-synchronization method
CN107409373A (en) The method for sending data between terminal and Frequency Synchronization access network with the uplink message of terminal
US4573171A (en) Sync detect circuit
JPH0983608A (en) Time synchronization device
CN106603171B (en) Method and equipment for testing bit error rate of terminal receiver
CN101702642B (en) The detection method of SDH frame head
CN114204977A (en) Error code test frame synchronization method of satellite measurement and control ground detection equipment based on upper computer
US9154294B2 (en) Resynchronization method of a received stream of groups of bits
TWI392318B (en) Synchronization judging device, receiving device with the synchronization judging device and receiving method thereof
CN116865826A (en) Demodulation performance self-adaptive test method based on pseudo-random sequence
CN104009825A (en) FM0 coded data decoding device for ETC system

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20160727