CN105549006A - FPGA & SOC based handheld ground penetrating radar (GPR) system - Google Patents
FPGA & SOC based handheld ground penetrating radar (GPR) system Download PDFInfo
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- CN105549006A CN105549006A CN201510942826.4A CN201510942826A CN105549006A CN 105549006 A CN105549006 A CN 105549006A CN 201510942826 A CN201510942826 A CN 201510942826A CN 105549006 A CN105549006 A CN 105549006A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
- G01S13/88—Radar or analogous systems specially adapted for specific applications
- G01S13/885—Radar or analogous systems specially adapted for specific applications for ground probing
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/28—Details of pulse systems
- G01S7/282—Transmitters
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/28—Details of pulse systems
- G01S7/285—Receivers
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- Radar, Positioning & Navigation (AREA)
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- Radar Systems Or Details Thereof (AREA)
Abstract
The invention discloses an FPGA & SOC based handheld GPR system. The system uses an integrated chip in which FPGA and ARM processor are embedded as a master control unit, and the master control unit is cooperated with a peripheral circuit and a communication unit to realize functions including radar pulse emission, data reception and signal processing. A radar pulse emission unit and a programmable gain amplification circuit are used to emit and receive radar pulses and realize functions including filtering and amplification; an equivalent sampling sequential control unit based on FPGA design ensures the accuracy and resolution of echoes; and the ARM processor process the echoes in real time, man-machine interaction is carried out via a touch screen controller, and radar data can be uploaded to a host PC or cloud end for storage. The FPGA & SOC based handheld GPR system is small in size, low in weight, high in portability and capable of real-time online radar data processing, ensures high measuring precision and free and human-based operation, and can be widely applied in the military, industrial control and civil fields.
Description
Technical field
The present invention relates to a kind of ground penetrating radar field, specifically relate to a kind of based on FPGA & SOC hand-held ground penetrating radar system.
Background technology
Ground penetrating radar (GroundPenetratingRadar, GPR) is that a kind of electromagnetic wave that utilizes carries out the lossless detection instrument of structure or treasure trove detection under earth's surface to the penetration capacity on earth's surface.It by launching the electromagnetic wave of particular form under earth's surface, according to time delay, the parameter such as shape and spectral characteristic of echoed signal, the degree of depth of measurement target, dielectric structure and character are measured, on this basis, the feature extraction of Applied Digital image and reconstruction technique, imaging processing is carried out to buried target, to reaching underground target localization and detection.
Traditional ground penetrating radar system is divided into two kinds, one utilizes PC computer, data transmission driver element and peripheral circuit to design radar system, wherein data transmission driver element comprises a few class such as board, usb driver, be responsible for receiving PC computer instruction and perform driving task, the driving of PC conputer controlled board and peripheral circuit complete launch and accept and the data transmission of radar signal, complete the analyzing and processing of radar data and the work of imaging simultaneously; The another kind of framework adopting host computer and slave computer, host computer adopts PC computer to be responsible for the storage of radar data, imaging and post-processed as carrier; Slave computer is generally made up of MPU or FPGA, is responsible for launch and accept and the data transmission of radar signal.
Chinese patent application CN200810104724.5 (publication number CN101566687A) discloses a kind of numerical control acquisition system for geological radar, and it comprises main frame, USB control module and digital control unit.Coordinate USB control module to complete the exploitation of radar host computer driving by CPLD, drive CPLD to complete the work such as the launch and accept transmission of radar signal by PC conputer controlled.
Chinese patent application CN201219280937.X (publication number CN102799131A) discloses a kind of ground penetrating radar lower computer control system based on FPGA.This system, using FPGA as main control unit, coordinates transmitter pulse control module, data sampling control module and data communication units, realizes the control to functions such as the transmitting of Ultra-short pulse ground penetrating radar, data receiver and transmission.Wherein first FPGA triggers transmitter transmitting burst pulse by transmitter pulse control module, then launches sampling control signal by data sampling control module, is operated by the reception of sampled data receiving element settling signal.After ground penetrating radar lower computer system completes one step completed detection, say that sampling data transmitting gives host computer by data communication units, carry out subsequent treatment.
Existing radar system, no matter be adopt PC as main control unit or adopt other SOC (system on a chip) such as MPU as transmission control unit, the rear end all be unableing to do without PC computer is supported, cause whole radar host computer bulky, inconvenient operation, simultaneously radar data acquisition and back-end analysis all need cycle of growing very much, to need more time overhead.
Summary of the invention
In order to solve, existing ground penetrating radar system is complicated, volume is large, the problem of inconvenient operation, the invention provides a kind of based on FPGA & SOC hand-held ground penetrating radar system, this system is using the integrated chip of one piece of embedded FPGA and arm processor as main logic unit, peripheral circuit and communication unit is coordinated to complete the functions such as ground penetrating radar impulse ejection, data receiver, signal transacting, data transmission, whole radar host computer volume is little, lightweight, there is good portability, the real-time online processing capacity of radar data can be realized.
In order to solve the problems of the technologies described above, the technical solution used in the present invention is as follows:
A kind of based on FPGA & SOC hand-held ground penetrating radar system, comprise as the SOC integrated chip of main control unit, radar pulse transmitter unit, Programmable Gain Amplifier Circuit, radar antenna and touch screen controller,
The embedded FPGA of described SOC integrated chip and arm processor, described FPGA is connected with radar pulse transmitter unit, Programmable Gain Amplifier Circuit respectively by I/O interface, described radar pulse transmitter unit, Programmable Gain Amplifier Circuit are connected with radar antenna respectively, by coordinating the duty of each unit, complete the transmitting to radar signal and collecting work; Described arm processor is connected by AXI bus with FPGA, complete parameter designing, echo gain table passes down, radar data is uploaded work, described arm processor processes radar data in real time, and shows and mutual function by being connected with touch screen controller.
Wherein, described system, also comprises communication unit, and described communication unit comprises 4G module and ethernet module, make radar data can upload to upper PC by ethernet module or be backed up to high in the clouds by 4G module synchronization, high in the clouds can On-line Control radar system parameters simultaneously.
Wherein, described FPGA comprises equivalent sampling timing control unit, described radar pulse transmitter unit comprises temperature compensating crystal oscillator, delay chip and rf modulation circuit, described equivalent sampling timing control unit is connected with rf modulation circuit by delay chip, and described rf modulation circuit is connected with radar antenna; Described equivalent sampling timing control unit is by temperature compensating crystal oscillator as control clock, and the method accurate control radar equivalent sampling sequential carefully postponed by the inner coarse delay of FPGA and delay chip, launches radar pulse.
Wherein, described Programmable Gain Amplifier Circuit adopts the AD8336 of ADI company to complete, described arm processor by AXI bus by pass to FPGA under echo gain table storer in the middle of, described FPGA amplifies through the time-varying gain coordinated sequential control DA and complete radar return according to echo gain table output voltage.
Wherein, radar data upload respectively through FPGA storer, arm processor internal memory, upper PC internal memory, persistence can be carried out in the RAM (random access memory) card of arm processor and upper PC memory disk respectively; " storing from AD sampling module to the interval of FPGA storer " operation to " FPGA storer is uploaded to the burst of ARM internal memory " is completed by ping-pong operation in FPGA transmitting procedure.
Wherein, in described arm processor, adopt embedded Linux operating system to complete radar data process, feature extraction, coloured picture display and state modulator, and complete radar interface interactive function based on Qt framework.
Wherein, the minimum time stepping accuracy 10ps of this system, transponder pulse repetition frequency 100KHz ~ 1MHz is optional, sampling depth 128 ~ 4096 is optional, and sweep speed 16 ~ 2048 per second is optional, analog to digital conversion 16, preamplifier gain 0db ~ 100db is optional, adjust radar return gain trace manually or automatically, display mode: waveform, colour, gray scale are optional, trigger collection mode: mark, measuring wheel, duration are optional.
Wherein, described SOC integrated chip also comprises samples storage unit, and described samples storage unit is connected with described FPGA by I/O interface.
Beneficial effect:
One of the present invention is based on FPGA & SOC hand-held ground penetrating radar system, the advantage had is as follows: all numerical portions of whole system are all completed by an integrated chip, make whole radar host computer volume little, lightweight, low in energy consumption, there is good portability; Powerful arm processor coordinates the multiple programming of FPGA, realizes the real-time online process to radar return data; The sequential system designed by " high steady temperature compensating crystal oscillator+coarse delay+carefully postpone " ensure that the pinpoint accuracy of systematic survey, and the embedded Linux program design based on Qt interface ensure that the degree of freedom of software and mutual hommization; Can also the operation that online data is uploaded, high in the clouds is synchronous be carried out, have wide practical use at military, industry control, civil area.
Accompanying drawing explanation
Fig. 1 is the one-piece construction block diagram that the present invention is based on FPGA & SOC hand-held ground penetrating radar system.
Fig. 2 is equivalent sampling sequential control of the present invention and launches sampling time sequence synchronization structure figure.
Fig. 3 is radar return time-varying gain implementation space of the present invention structural drawing.
Fig. 4 is radar image data space propagation figure in the present invention.
Fig. 5 is the software flow pattern that the present invention is based on arm processor in FPGA & SOC hand-held ground penetrating radar system.
Fig. 6 is software real work test interface of the present invention.
In figure:
1-SOC integrated chip, 2-ARM processor, 3-FPGA, 4-radar pulse transmitter unit, 5-Programmable Gain Amplifier Circuit, 6-radar antenna, 7-samples storage unit, 8-touch screen controller.
Embodiment
Below by embodiment also by reference to the accompanying drawings, technical scheme of the present invention is described in further detail.
Fig. 1 is the one-piece construction block diagram that the present invention is based on FPGA & SOC hand-held ground penetrating radar system.As shown in Figure 1, one of the present invention is based on FPGA & SOC hand-held ground penetrating radar system, it is characterized in that, comprise as the SOC integrated chip 1 of main control unit, radar pulse transmitter unit 4, Programmable Gain Amplifier Circuit 5, radar antenna 6 and touch screen controller 8
The embedded FPGA3 of described SOC integrated chip 1 and arm processor 2, described FPGA3 is connected with radar pulse transmitter unit 4, Programmable Gain Amplifier Circuit 5 respectively by I/O interface, described radar pulse transmitter unit 4, Programmable Gain Amplifier Circuit 5 are connected with radar antenna 6 respectively, by coordinating the duty of each unit, complete the transmitting to radar signal and collecting work; Described arm processor 2 is connected by AXI bus with FPGA3, complete parameter designing, echo gain table passes down, radar data is uploaded work, described arm processor 2 processes radar data in real time, and shows and mutual function by being connected with touch screen controller 8.
Described system, also comprise communication unit, described communication unit comprises 4G module and ethernet module, makes radar data can upload to upper PC by ethernet module or be backed up to high in the clouds by 4G module synchronization, and high in the clouds can On-line Control radar system parameters simultaneously.
Described SOC integrated chip 1 also comprises samples storage unit 7, and described samples storage unit 7 is connected with described FPGA3 by I/O interface.
Visible, system of the present invention coordinates peripheral circuit and communication unit to complete the design of system by the SOC integrated chip 1 of one piece of embedded FPGA3 and arm processor 2.Wherein FPGA3 is connected with radar pulse transmitter unit 4, Programmable Gain Amplifier Circuit 5, samples storage unit 7 respectively by IO, by coordinating the duty of each unit, completes the transmitting to radar signal and collecting work.Arm processor 2 is connected by AXI bus with FPGA3, completes parameter designing, echo gain table passes down, radar data is uploaded work.Arm processor 2 processes radar data in real time, and completes display and mutual function by touch screen controller 8.Radar data can upload to upper PC or be synchronized to high in the clouds backup simultaneously.All numerical portions of whole system are all completed by an integrated chip, make whole radar host computer volume little, lightweight, low in energy consumption, have good portability.
As shown in Figure 1, described FPGA3 comprises equivalent sampling timing control unit, described radar pulse transmitter unit 4 comprises temperature compensating crystal oscillator, delay chip and rf modulation circuit, described equivalent sampling timing control unit is connected with rf modulation circuit by delay chip, and described rf modulation circuit is connected with radar antenna 6; Described equivalent sampling timing control unit is by temperature compensating crystal oscillator as control clock, and the method accurate control radar equivalent sampling sequential carefully postponed by the inner coarse delay of FPGA3 and delay chip, launches radar pulse.
Fig. 2 is equivalent sampling sequential control of the present invention and launches sampling time sequence synchronization structure figure.As shown in Figure 2, accurate clock CLK provides the work clock as all timing control units and synchronization module by high surely temperature compensating crystal oscillator.The gap periods T that interval trigger module sets according to steering order produces trigger pulse at equal intervals, equivalent delay module carries out the coarse delay operation of an integer CLK clock period on the basis of spacing pulse, obtain the spacing pulse of band coarse delay, then latched by the reverse clock of CLK, ensure steep and the stability of the spacing pulse rising edge of band coarse delay.Spacing pulse with coarse delay exports the trigger pip being used as delay chip through special clock port, according to the radar sequential sampling synchronizing signal obtained the time delay of delay chip synchronization settings with " coarse delay+carefully postpone ".In addition, the spacing pulse that interval trigger module exports, is triggered by a road Postponement module operation that echo gain control module completes synchro control gain, is completed the work of collection by another road Postponement module triggering collection module.Wherein, control time delay of disparate modules, can the relative radar return of ride gain curve, the relative position relation of the relative radar return of sampled point sequence.
Described Programmable Gain Amplifier Circuit 5 adopts the AD8336 of ADI company to complete, described arm processor 2 by AXI bus by pass to FPGA3 under echo gain table storer in the middle of, described FPGA3 amplifies through the time-varying gain coordinated sequential control DA and complete radar return according to echo gain table output voltage.Fig. 3 is radar return time-varying gain implementation space of the present invention structural drawing.As shown in Figure 3, the echo time-varying gain figure that user inputs by described arm processor 2 is called for short echo gain table with the form of wave table and is saved in the middle of the internal memory of arm processor 2, by AXI bus by pass to FPGA3 under echo gain table storer in the middle of, the DA control module of FPGA3 reads echo gain table data output gain control voltage under the trigging control of clock synchronization unit, becomes two-stage and amplify when the AD8336 of control two panels ADI company completes echo.
Radar data upload respectively through FPGA3 storer, arm processor 2 internal memory, upper PC internal memory, persistence can be carried out in the RAM (random access memory) card of arm processor 2 and upper PC memory disk respectively; " storing from AD sampling module to the interval of FPGA storer " operation to " FPGA storer is uploaded to the burst of ARM internal memory " is completed by ping-pong operation in FPGA3 transmitting procedure.
Fig. 4 is radar image data space propagation figure in the present invention.As shown in Figure 4, the data upload flow process of radar sampling through the internal memory of FPGA3 internal storage SRAM, arm processor 2, upper PC memory disk, can carry out persistence at the internal memory SD card of arm processor 2 and upper PC memory disk respectively.Wherein, FPGA3 inside is provided with the storage space S RAM of a slice twice sampling depth, and radar return data equally spaced mode with address increasing operation on the basis of the timing cycles of setting stores.Radar data starts to store from the zero-address of LAP Low Address Part most, and when a frame echo data collection completes, LAP Low Address Part is just in time filled with, and AD sampling module produces the data that look-at-me notice arm processor 2 DMA incoming flow reads LAP Low Address Part; Radar data starts to store from the zero-address of high address section simultaneously, and when an echo data collection completes, high address section is just in time filled with, and AD sampling module produces again the data that look-at-me notice arm processor 2 DMA incoming flow reads high address section.The continual upload operation of radar data is completed by such ping-pong operation.When radar data is stored into inside upper PC computer hard disc by needs, arm processor 2, at fifo queue buffer memory 5 frame radar data, then completes the flow transmission of data to upper PC by Transmission Control Protocol.Simultaneously upper PC can send instruction by UDP and arranges relevant parameter and complete associative operation in radar transmit-receive process.It should be noted that, AD sampling module is the unit module of FPGA3 inside, is controlled by FPGA3.
Adopt embedded Linux operating system to complete radar data process, feature extraction, coloured picture display and state modulator at described arm processor 2, and complete radar interface interactive function based on Qt framework.Fig. 5 is the software flow pattern that the present invention is based on arm processor 2 in FPGA & SOC hand-held ground penetrating radar system.As shown in Figure 5, software section adopts the embedded Linux operating system of customization as program work running environment, driving the mutual of radar data alternately by developing corresponding FPGA3 radar data, having been write the function of interface program cooperation touch screen controller 8 finishing man-machine interaction by Qt framework.When after system electrification, uboot has been taken up in order of priority the operating process of the configuration of FPGA3 and the startup of linux kernel, loads corresponding FPGA3 radar module driver, set up Qt program execution environments in linux kernel start-up course.Kernel has started, and the GPR master routine based on Qt framework guides operation by self-starting item, opens multiple threads such as file management, optimum configurations, data acquisition, data processing, data-pushing respectively.Interface parameter in amendment optimum configurations can control above-mentioned several thread respectively and be in the state run or hang up respectively, the running status of reprogramming and the display structure at interface; Amendment echo gain table can arrange radar return time-varying gain; Amendment sampling time sequence parameter can the sequential sampling transmitter unit of control FPGA3 part, launch the radar wideband pulse signal meeting different timing requirements, control synchronization module changes the relative position relation of gain trace relative to radar return, the relative radar return of sampled point sequence simultaneously.
Fig. 6 is software real work test interface of the present invention.As shown in Figure 6, this radar system is by ARM+FPGA+ hardware co-design, specific implementation parameter is as follows: realize minimum time stepping accuracy 10ps, transponder pulse repetition frequency 100KHz ~ 1MHz is optional, sampling depth 128 ~ 4096 is optional, sweep speed 16 ~ 2048 per second is optional, analog to digital conversion 16, preamplifier gain 0db ~ 100db is optional, adjust radar return gain trace manually or automatically, display mode: waveform, colour, gray scale are optional, trigger collection mode: mark, measuring wheel, duration are optional.
The integrated 4G module of this radar system, coordinates cloud server to get through network link passage, realizes quasi real time uploading of radar data, also can complete Long-distance Control by high in the clouds simultaneously, carry out radar running parameter remotely modifying.
The above embodiment and application scenarios are only preferred embodiment of the present invention and application scenarios; not in order to limit the present invention; all any amendments done within the spirit and principles in the present invention, equivalent replace and improve and in the application of other field and scene, all should be included within protection scope of the present invention.
Claims (8)
1. one kind based on FPGA & SOC hand-held ground penetrating radar system, it is characterized in that, comprise as the SOC integrated chip (1) of main control unit, radar pulse transmitter unit (4), Programmable Gain Amplifier Circuit (5), radar antenna (6) and touch screen controller (8)
The embedded FPGA(3 of described SOC integrated chip (1)) and arm processor (2), described FPGA (3) is connected with radar pulse transmitter unit (4), Programmable Gain Amplifier Circuit (5) respectively by I/O interface, described radar pulse transmitter unit (4), Programmable Gain Amplifier Circuit (5) are connected with radar antenna (6) respectively, by coordinating the duty of each unit, complete the transmitting to radar signal and collecting work; Described arm processor (2) is connected by AXI bus with FPGA (3), complete parameter designing, echo gain table passes down, radar data is uploaded work, described arm processor (2) processes radar data in real time, and shows and mutual function by being connected with touch screen controller (8).
2. one according to claim 1 is based on FPGA & SOC hand-held ground penetrating radar system, it is characterized in that, described system, also comprise communication unit, described communication unit comprises 4G module and ethernet module, make radar data can upload to upper PC by ethernet module or be backed up to high in the clouds by 4G module synchronization, high in the clouds can On-line Control radar system parameters simultaneously.
3. one according to claim 1 is based on FPGA & SOC hand-held ground penetrating radar system, it is characterized in that, described FPGA (3) comprises equivalent sampling timing control unit, described radar pulse transmitter unit (4) comprises temperature compensating crystal oscillator, delay chip and rf modulation circuit, described equivalent sampling timing control unit is connected with rf modulation circuit by delay chip, and described rf modulation circuit is connected with radar antenna (6); Described equivalent sampling timing control unit as control clock, passes through FPGA(3 by temperature compensating crystal oscillator) method accurate control radar equivalent sampling sequential that inner coarse delay and delay chip carefully postpone, launch radar pulse.
4. one according to claim 1 is based on FPGA & SOC hand-held ground penetrating radar system, it is characterized in that, described Programmable Gain Amplifier Circuit (5) adopts the AD8336 of ADI company to complete, described arm processor (2) by AXI bus by pass to FPGA (3) under echo gain table storer in the middle of, described FPGA (3) amplifies through the time-varying gain coordinated sequential control DA and complete radar return according to echo gain table output voltage.
5. one according to claim 2 is based on FPGA & SOC hand-held ground penetrating radar system, it is characterized in that, radar data upload respectively through FPGA (3) storer, arm processor (2) internal memory, upper PC internal memory, respectively can carry out persistence in the RAM (random access memory) card of arm processor (2) and upper PC memory disk; " storing from AD sampling module to the interval of FPGA storer " operation to " FPGA storer is uploaded to the burst of ARM internal memory " is completed by ping-pong operation in FPGA (3) transmitting procedure.
6. one according to claim 1 is based on FPGA & SOC hand-held ground penetrating radar system, it is characterized in that, in described arm processor (2), adopt embedded Linux operating system to complete radar data process, feature extraction, coloured picture display and state modulator, and complete radar interface interactive function based on Qt framework.
7. one according to claim 1 is based on FPGA & SOC hand-held ground penetrating radar system, it is characterized in that, the minimum time stepping accuracy 10ps of this system, transponder pulse repetition frequency 100KHz ~ 1MHz is optional, sampling depth 128 ~ 4096 is optional, sweep speed 16 ~ 2048 per second is optional, analog to digital conversion 16, preamplifier gain 0db ~ 100db is optional, adjust radar return gain trace manually or automatically, display mode: waveform, colour, gray scale are optional, trigger collection mode: mark, measuring wheel, duration are optional.
8. one according to claim 1 is based on FPGA & SOC hand-held ground penetrating radar system, it is characterized in that, described SOC integrated chip (1) also comprises samples storage unit (7), and described samples storage unit (7) is connected with described FPGA (3) by I/O interface.
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