CN105516625B - Cmos image sensor pixel merges reading circuit structure and signal processing reading method - Google Patents
Cmos image sensor pixel merges reading circuit structure and signal processing reading method Download PDFInfo
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- CN105516625B CN105516625B CN201610020794.7A CN201610020794A CN105516625B CN 105516625 B CN105516625 B CN 105516625B CN 201610020794 A CN201610020794 A CN 201610020794A CN 105516625 B CN105516625 B CN 105516625B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/75—Circuitry for providing, modifying or processing image signals from the pixel array
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/766—Addressed sensors, e.g. MOS or CMOS sensors comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
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- Transforming Light Signals Into Electric Signals (AREA)
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Abstract
The invention discloses a kind of cmos image sensor pixels to merge reading circuit structure and signal processing reading method.The structure includes column bus, column amplifier, row reading reset switch, row gating switch, row merging capacitance, row merge control switch, and row merge bus, and row merge output switch, and row merges capacitance, merge reset switch, row merges control switch, and row merges bus and output amplifier.It when system works, chooses pixel to be combined successively by column bus and is expert at, merge control switch by row and row merging control switch completes ranks pixel union operation, finally the signal after output amplifier output pixel merging.The advantage of the invention is that realizing the pixel pooling function of cmos image sensor random scale, while improving signal-to-noise ratio and frame frequency.
Description
Technical field：
The present invention relates to field of image sensors, and in particular to a kind of cmos image sensor pixel merge reading out structure and
Signal processing reading method.
Background technology：
Currently, the performance of cmos image sensor is continuously improved, all kinds of science imagings are widely used to, such as remote sensing, height
Fast photography, light spectrum image-forming etc..The specific requirements of this kind of special applications are more flexible, it is sometimes desirable to obtain high-resolution careful figure
Picture then must assure that high frame frequency work sometimes, not high to resolution requirement.To solve this problem, previous ccd image sensing
Device develops pixel pooling function, and the signal of adjacent several pixels can integrate, and is read as a pixel.In this way,
In the occasion for needing high frame frequency, this method sacrificial system resolution ratio can be used, read-around number is effectively reduced, reduces readout time,
To improve frame frequency.Meanwhile N number of pixel merges reading, can theoretically promote signal-to-noise ratioTimes, increase system noise
Than.
However, the method that this pixel merges also have the shortcomings that it is notable.First, the pixel of CCD, which merges, is based on charge packet
It is cumulative, this technique can not use in the cmos detector quickly grown at present；Secondly, the maximum pixel of this mode closes
And number is limited by CCD potential well capacity, the pixel that cannot achieve random scale merges.Though and present CMOS image sensor
So also there is pixel folding, or but be that numeric field outside detector adds up, detector mould can not be reduced
Quasi- delivery outlet rate, signal-to-noise ratio are promoted also limited；To be limited by overlap capacitance, can only realize fixed mode (such as 2 × 2,
4 × 4) pixel merges.And to the very urgent scientific application field of flexibility demand, (such as spectral coverage in light spectrum image-forming closes
And the generaI investigation application etc. in fine remote sensing), it is also very desirable to it can realize that the cmos detector inside that random scale pixel merges is read
Go out structure.
Invention content：
The present invention proposes a kind of cmos image sensor pixel and merges reading circuit structure and signal processing reading method.
Present invention solves the technical problem that being the cmos detector inside reading circuit knot realized random scale pixel and merged
Structure, while also improving signal-to-noise ratio and frame frequency.
A kind of cmos image sensor pixel merging reading out structure, as shown in Fig. 1, including column bus, column amplifier, row
Reset switch, row gating switch are read, row merge capacitance, and row merge control switch, and row merge bus, and row merge output switch,
Row merges capacitance, merges reset switch, and row merges control switch, and row merges bus and output amplifier.The cmos image senses
Device pixel merges reading out structure and is characterized in that：
Column bus is connected to the input terminal that row read reset switch and column amplifier parallel-connection structure, and column selection opens up connection and is connected to
Row read reset switch with after the output end of column amplifier parallel-connection structure, open up connection by column selection and are connected on row merging capacitance；
Row merge bus be connected across each row row merge capacitance on, each two bridging node between set there are one row merge control switch use
In row union operation；Merge reset switch and merge capacitance parallel connection with row, the input terminal of parallel-connection structure is connected to row and merges control
The output end of switch, row merge bus be connected across each row row merge capacitance on, each two bridging node between set there are one row
Merge control to switch for row union operation, row merges the input terminal that the output end that control switchs is connected to output amplifier.
When the cmos image sensor pixel merges reading out structure work, pixel institute to be combined is chosen successively by column bus
It is expert at, merges control switch by row and row merging control switch completes ranks pixel union operation, finally through output amplifier
Export the signal after pixel merges.
As shown in Fig. 2, for a M row, the cmos detector of N row carries out p × q pixels and merges, final output m × n
The image of scale meets p × m=M, q × n=N, p>1,q>1, p≤q should after the signal that detector generates enters column bus
Steps are as follows for the merging method of reading circuit structure：
(1) it is closed all row to read reset switch, merge reset switch, row are merged capacitance merges voltage on capacitance with row
It resets, will be disconnected with upper switch after reset；
(2) column bus of the 1st to q row is connected to the 1st row pixel, is closed at the 1st to the q row gating switch arranged, this
When the 1st row 1 to q row pixels signal be stored in corresponding row and merge on capacitance；
(3) row for being closed the 1st to q row merge control switch, and the signal that the 1st to q row row merge on capacitance at this time communicates, and
Signal value is functionally identical to the row 1 to the signal mean value of q row pixels；
(4) row for disconnecting 1 to q row merge control switch, and the row for being closed the 1st row merge output switch, and row are merged capacitance
On signal be transferred to the row row merge capacitance on；
(5) row for disconnecting the 1st row merge output switch；
(6) step (1) to step (5) is repeated, when repeating every time, respectively by the column bus of the 1st to q row in step (2)
The 2nd row, the 3rd row ... are connected to until pth row pixel, is respectively closed the 1st row, the 2nd row ... are until pth in step (4)
The row of row merge output switch, and step (1) carries out p times to step (5) is total, and the row of the 1st to p row merges capacitance after step
The upper detector the 1st that stores respectively is to p rows, the every signal mean value of q pixel of row；
(7) row for being closed the 1st to p-1 row merges control switch, keeps pth row row to merge control switch and disconnects, and at this time the 1st
Merge the signal on capacitance to the row that p is arranged to communicate, and signal value is functionally identical to the signal mean value of p × q pixel；
(8) all rows are disconnected and merge control switch, an optional row are read in the output amplifier of the 1st to p row, read knot
Fruit is the signal mean value of p × q pixel, which, which merges to read, completes；
Above step completes the pixel union operation of single merging module (scale p × q), when full frame is read, same merging
(1) to step (7) is completed at the same time the step of n merging module in row, step (8) by the 1st to n-th merging module successively into
Row after completing a merging rows, then carries out the operation of next merging rows, until full frames of data is read, obtains m × n scales
Image.
According to Noise Theory, it is assumed that it is S to participate in p × q combined picture element signal mean value, and noise mean value is that N (considers main
Noise source is photon noise), then the average signal-to-noise ratio of this p × q pixel is about：And it utilizes in the present invention
Pixel merging method, after p × q potting gum, output signal is still S, but after average, output noise is aboutNew signal-to-noise ratio meets：I.e. signal-to-noise ratio improves aboutTimes.This
As a result result is consistent in the way of charge packet progress pixel merging with traditional CCD.
After pixel merges, the output amplifier read-around number of complete frame imaging has been reduced to m × n times, frame by M × n times
Frequency improves p × q times.
All row are merged into control switch and row merges control switch and remains off, pixel pooling function can be closed,
Imaging sensor normally exports the image of M × N scales.
It is an advantage of the current invention that realizing the pixel pooling function of random scale in cmos sensor, need only adjust
Work schedule can change merging scale.Meanwhile the circuit structure that this pixel merges is read as hardware integration in sensor
Go out in circuit, can avoid the snr loss that post-digital domain pixel Merging zone method comes, and alleviate detector sense amplifier
Rate pressure, working frame frequency can be greatly improved.Reading out structure proposed by the present invention can also increase the functions such as correlated-double-sampling,
Signal-to-noise ratio is further promoted, the flexible science imaging situations of job requirement are applied to, for example imaging spectrometer spectral coverage merges, high score
The high-speed mode etc. of resolution camera.
Description of the drawings：
Attached drawing 1 is the reading out structure schematic diagram of the present invention.
Attached drawing 2 is that pixel merges schematic diagram.
Attached drawing 3 is specific implementation mode reading out structure schematic diagram.
Specific implementation mode：
According to invention content, the present embodiment constructs a set of cmos detector pixel and merges reading out structure, imaging sensor
Pixel scale is 1024 × 256, carries out 2 × 2 pixels and merges, and final output scale is 512 × 128.
As shown in Fig. 3, totally 256 row, reading out structure include 1024 column bus to detector, and each column includes column amplifier
(A1~A1024), row gating switch (S1-S1024), row merging capacitance (CS1~CS1024), row merging control switch (SC1~
SC1024), row merge output switch (SR1~SR1024), go and merge capacitance (CG1-CG1024), reset switch (ST1~
ST1024), row merges control switch (SG1~SG1024), output amplifier (SG1~SG1024).
It when changing reading out structure work, chooses pixel to be combined successively by column bus and is expert at, merge control switch by arranging
(SC1~SC1024) and row merge control switch (SG1~SG1024) and complete ranks pixel union operation, finally amplify through output
Device exports the signal after pixel merges.
In the present embodiment, cmos detector generate signal enter column bus after, the merging method of the circuit reading out structure
Steps are as follows：
(1) it is closed ST1~ST1024 and SR1~SR1024, by the voltage on CS1~CS1024 and CG1~CG1024
It resets, will be disconnected with upper switch after reset；
(2) column bus of the 1st, 2 row is connected to the 1st row pixel, is closed at S1, S2, at this time the row 1,2 row pixels
Signal is stored on CS1 and CS2；
(3) it is closed SC1, SC2, the signal on CS1 and CS2 communicates at this time, and signal value is functionally identical to the row 1,2 row pixels
Signal mean value；
(4) SC1, SC2 are disconnected, SR1 is closed, the signal on CS1 is transferred on CG1；
(5) SR1 is disconnected；
(6) step (1) is repeated to step (5), and the column bus of the 1st, 2 row is connected to the 2nd row pixel in step 3,
It is closed SR2 in step 5, stores the signal mean value of detector 2 pixels of the 1st row after step on CG1, stored on CG2
The signal mean value of detector 2 pixels of the 2nd row；
(7) it is closed SG1, keeps SG2 to disconnect, the signal on CG1 and CG2 communicates at this time, and signal value is functionally identical to 4 pictures
The signal mean value of element；
(8) SG1, SG2 are disconnected, an optional reading, reads the signal that result is 4 pixels in amplifier AF1, AF2
Mean value, which, which merges to read, completes.
Above step completes the pixel union operation of single merging module (scale 2 × 2), when full frame is read, same merging
(1) to step (8) is completed at the same time the step of 512 merging modules in row, step 9 by the 1st to the 512nd merging module successively into
Row after completing a merging rows, then carries out the operation of next merging rows, until full frames of data is read, obtains 512 × 128 rule
The image of mould.
After pixel merges, the output amplifier read-around number of complete frame imaging by be reduced to 512 for 1024 × 256 times ×
128 times, 4 times of frame frequency lifting, signal-to-noise ratio promotes about 2 times.
Claims (2)
1. a kind of cmos image sensor pixel merges reading circuit structure, including column bus, column amplifier, row read to reset and open
It closing, row gating switch, row merge capacitance, and row merge control switch, and row merge bus, and row merge output switch, and row merges capacitance,
Merge reset switch, row merges control switch, and row merges bus and output amplifier, it is characterised in that：
The column bus is connected to the input terminal that row read reset switch and column amplifier parallel-connection structure, and column selection opens up connection and connects
Reset switch is read with after the output end of column amplifier parallel-connection structure to row, and connection is opened up by column selection and is connected to row merging capacitance
On；Row merge bus be connected across each row row merge capacitance on, each two bridging node between set there are one row merge control open
It closes and is used for row union operation；Merge reset switch and merge capacitance parallel connection with row, the input terminal of parallel-connection structure is connected to row and merges
The output end of switch is controlled, the row that row merging bus is connected across each row merges on capacitance, and each two is equipped with one between bridging node
A row merges control and switchs for row union operation, and row merges the input that the output end that control switchs is connected to output amplifier
End；
When the cmos image sensor pixel merges reading circuit structure work, pixel institute to be combined is chosen successively by column bus
It is expert at, merges control switch by row and row merging control switch completes ranks pixel union operation, finally through output amplifier
Export the signal after pixel merges.
2. a kind of signal processing being merged reading circuit structure based on cmos image sensor pixel described in claim 1 is read
Method, it is characterised in that：
For a M row, the cmos detector of N row carries out p × q pixels and merges, the image of final output m × n scales, p, q,
M, n is arbitrary positive integer and meets p × m=M, q × n=N, p>1,q>1,p≤q；Enter in the signal that cmos detector generates
After column bus, steps are as follows for the merging method of the reading circuit structure：
(1) it is closed all row to read reset switch, merge reset switch, row merging capacitance is merged voltage on capacitance with row answers
Position, will be disconnected after reset with upper switch；
(2) column bus of the 1st to q row is connected to the 1st row pixel, is closed at the 1st to the q row gating switch arranged, at this time the 1st
The signal of row 1 to q row pixels is stored in corresponding row and merges on capacitance；
(3) row for being closed the 1st to q row merge control switch, and the signal that the 1st to q row row merge on capacitance at this time communicates, and signal
Value is functionally identical to the row 1 to the signal mean value of q row pixels；
(4) row for disconnecting 1 to q row merge control switch, and the row for being closed the 1st row merge output switch, and row are merged on capacitance
The row that signal is transferred to the row merges on capacitance；
(5) row for disconnecting the 1st row merge output switch；
(6) step (2) to step (5) is repeated, when repeating every time, is respectively connected to the 1-q column bus arranged in step (2)
2nd row, the 3rd row ... are until pth row pixel, is respectively closed the 1st row, the 2nd row ... are until the row that pth arranges in step (4)
Merge output switch, step (1) carries out p times to step (5) is total, and the row of the 1st to p row merges on capacitance respectively after step
Detector the 1st is stored to p rows, often the signal mean value of q pixel of row；
(7) be closed the 1st to p-1 row row merge control switch, keep pth row row merge control switch disconnect, at this time the 1st to
The signal that the row of p row merges on capacitance communicates, and signal value is functionally identical to the signal mean value of p × q pixel；
(8) all rows are disconnected and merge control switch, an optional row are read in the output amplifier of the 1st to p row, are read result and are
The signal mean value of p × q pixel, which, which merges to read, completes；
Above step completes the pixel union operation for the merging module that single scale is p × q, when full frame is read, same merging rows
The step of middle n merging module (1) to step (7) is completed at the same time, and step (8) is carried out successively by the 1st to n-th merging module,
After completing a merging rows, then the operation of next merging rows is carried out, until full frames of data is read, obtains the figure of m × n scales
Picture.
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| CN111988539B (en) * | 2020-07-27 | 2023-06-02 | 上海集成电路研发中心有限公司 | Infrared detector merging structure and merging method thereof |
| EP3985555B1 (en) | 2020-08-21 | 2023-10-11 | Shenzhen Goodix Technology Co., Ltd. | Image sensor, fingerprint detection apparatus, and electronic device |
| CN111741240B (en) * | 2020-08-21 | 2020-12-22 | 深圳市汇顶科技股份有限公司 | Image sensor, fingerprint detection device and electronic equipment |
| CN113612948B (en) * | 2021-08-27 | 2024-03-05 | 锐芯微电子股份有限公司 | Readout circuit and image sensor |
| CN118764728A (en) * | 2024-09-09 | 2024-10-11 | 苏州矽联传感科技有限公司 | Image sensor, pixel merging method thereof and imaging method |
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| CN102868865A (en) * | 2012-09-12 | 2013-01-09 | 中国科学院西安光学精密机械研究所 | Circuit and method for merging image pixels |
| CN104796639A (en) * | 2015-04-20 | 2015-07-22 | 中国航天科技集团公司第九研究院第七七一研究所 | Pixel combination circuit in reading circuit and pixel combination implementation method of pixel combination circuit |
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| JP4661912B2 (en) * | 2008-07-18 | 2011-03-30 | ソニー株式会社 | Solid-state imaging device and camera system |
| JP5430642B2 (en) * | 2011-12-22 | 2014-03-05 | 富士フイルム株式会社 | Radiation image detector, radiation image capturing apparatus, and radiation image capturing system |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102868865A (en) * | 2012-09-12 | 2013-01-09 | 中国科学院西安光学精密机械研究所 | Circuit and method for merging image pixels |
| CN104796639A (en) * | 2015-04-20 | 2015-07-22 | 中国航天科技集团公司第九研究院第七七一研究所 | Pixel combination circuit in reading circuit and pixel combination implementation method of pixel combination circuit |
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