CN105405855A - Imaging Circuits And A Method For Operating An Imaging Circuit - Google Patents
Imaging Circuits And A Method For Operating An Imaging Circuit Download PDFInfo
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- CN105405855A CN105405855A CN201510571876.6A CN201510571876A CN105405855A CN 105405855 A CN105405855 A CN 105405855A CN 201510571876 A CN201510571876 A CN 201510571876A CN 105405855 A CN105405855 A CN 105405855A
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/80—Camera processing pipelines; Components thereof
- H04N23/84—Camera processing pipelines; Components thereof for processing colour signals
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
- G01S17/02—Systems using the reflection of electromagnetic waves other than radio waves
- G01S17/06—Systems determining position data of a target
- G01S17/08—Systems determining position data of a target for measuring distance only
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
- G01S17/02—Systems using the reflection of electromagnetic waves other than radio waves
- G01S17/06—Systems determining position data of a target
- G01S17/08—Systems determining position data of a target for measuring distance only
- G01S17/32—Systems determining position data of a target for measuring distance only using transmission of continuous waves, whether amplitude-, frequency-, or phase-modulated, or unmodulated
- G01S17/36—Systems determining position data of a target for measuring distance only using transmission of continuous waves, whether amplitude-, frequency-, or phase-modulated, or unmodulated with phase comparison between the received signal and the contemporaneously transmitted signal
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
- G01S17/88—Lidar systems specially adapted for specific applications
- G01S17/89—Lidar systems specially adapted for specific applications for mapping or imaging
- G01S17/894—3D imaging with simultaneous measurement of time-of-flight at a 2D array of receiver pixels, e.g. time-of-flight cameras or flash lidar
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
- G01S7/483—Details of pulse systems
- G01S7/486—Receivers
- G01S7/4861—Circuits for detection, sampling, integration or read-out
- G01S7/4863—Detector arrays, e.g. charge-transfer gates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
- H01L27/14614—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor having a special gate structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
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- H01L27/14621—Colour filter arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14638—Structures specially adapted for transferring the charges across the imager perpendicular to the imaging plane
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
- H01L27/14645—Colour imagers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
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- H—ELECTRICITY
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/709—Circuitry for control of the power supply
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- Computer Networks & Wireless Communication (AREA)
- Radar, Positioning & Navigation (AREA)
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- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
The invention relates to imaging circuits and a method for operating an imaging circuit. The imaging circuit includes a first vertical trench gate and a neighboring second vertical trench gate. The imaging circuit includes a gate control circuit. The gate control circuit operates in a first operating mode to generate a first space charge region accelerating photogenerated charge carriers of a first charge-carrier type to a first collection contact in and in a second operating mode to generate a second space charge region accelerating photogenerated charge carriers of the first charge-carrier type to the first collection contact. The imaging circuit further includes an image processing circuit which determines distance information of an object based on photogenerated charge carriers of the first charge carrier type collected at the first collection contact in the first operating mode and color information of the object based on photogenerated charge carriers of the first charge carrier type collected at the first collection contact in the second operating mode.
Description
Technical field
Embodiment relates to the image of generation object and particularly relates to imaging circuit and the method for operating imaging circuit.
Background technology
Various transducer and meter use the delay measurements of acoustics and optical pulse or code signal.In some applications, the measurement of distance is coupled with mode detection.This can be the situation such as in some transit time (TOF) technology using visible or infrared light.Infrared light is because its invisibility can be the wavelength signals selected in many application.Infrared light has about ten microns or larger penetration depth.In this degree of depth, space charge region can not be set up easily by means of surface doped region to outdiffusion.Photonic mixer device (PMD) can not carry out colour recognition, because only infrared pulse light is estimated.The photoelectric tube used provides fixing spectral response and therefore not designs to be used as colour recognition device.
Summary of the invention
Need to provide a kind of imaging circuit, it can generate three-dimensional color image.
Such needs can be met by the theme of claim.
Some embodiments relate to imaging circuit, and it comprises Semiconductor substrate and the first vertical trench-gate extended in Semiconductor substrate and the second adjacent vertical trench-gate.Imaging circuit also comprises grid control circuit.Grid control circuit is configured to operate the first voltage is supplied to the first vertical trench-gate and the second voltage is supplied to the second vertical trench-gate in a first mode of operation, thus the photo-generated charge carriers of the first charge carrier type is accelerated to the first space charge region that the first current collection (collection) near the first vertical trench-gate contacts by generation.Grid control circuit is also configured to operate that tertiary voltage is supplied to the first vertical trench-gate in the second mode of operation, thus generates the second space charge area photo-generated charge carriers of the first charge carrier type being accelerated to the first current collection contact near the first vertical trench-gate.Imaging circuit also comprises image processing circuit, it is configured to the range information determining object based on the photo-generated charge carriers of the first charge carrier type that the first current collection contact position is collected in the first mode of operation, and the photo-generated charge carriers of the first charge carrier type collected based on the first current collection contact position in the second mode of operation determines the colouring information of object.
Some embodiments relate to imaging circuit, and it comprises Semiconductor substrate and extends to the multiple vertical trench-gate in Semiconductor substrate.Each corresponding vertical trench-gate has the current collection contact of the correspondence of the photo-generated charge carriers for collecting the first charge carrier type in its vicinity.Imaging circuit also comprises grid control circuit, and it is configured to, in collection time interim, different voltage is supplied to each in multiple vertical trench-gate.Each corresponding vertical trench-gate generates the additional space charge area being used for the photo-generated charge carriers of the first charge carrier type being accelerated to its corresponding current collection contact.Imaging circuit also comprises image processing circuit, it is configured to the colouring information of the multiple colouring information types determining object, the photo-generated charge carriers of the first charge carrier type that the colouring information of each colouring information type is collected based on the current collection contact position of each correspondence.
Some embodiments relate to the method for operating imaging circuit.The method comprises in the first mode of operation, the first voltage is supplied to the first vertical trench-gate and the second voltage is supplied to the second vertical trench-gate to generate the first space charge region photo-generated charge carriers of the first charge carrier type being accelerated to the first current collection contact near the first vertical trench-gate.The method also comprises in the second mode of operation, tertiary voltage is supplied to the first vertical trench-gate to generate the second space charge area photo-generated charge carriers of the first charge carrier type being accelerated to the first current collection contact near the first vertical trench-gate.The method also comprises the photo-generated charge carriers of the first charge carrier type based on the first current collection contact position collection in the first mode of operation, determines the range information of object.The method also comprises the photo-generated charge carriers of the first charge carrier type based on the first current collection contact position collection in the second mode of operation, determines the colouring information of object.
Accompanying drawing explanation
Below by only exemplarily and carry out some embodiments of tracing device and/or method with reference to accompanying drawing, wherein:
Fig. 1 illustrates the schematic section of the imaging circuit according to embodiment.
Fig. 2 illustrates the schematic section of the operation imaging circuit in the first mode of operation according to embodiment.
Fig. 3 illustrates the diagram of the voltage provided by the grid control circuit under the first operator scheme according to the instruction of embodiment.
Fig. 4 A illustrates the schematic section of the operation vertical trench-gate in the second mode of operation according to embodiment.
Fig. 4 B illustrates the schematic section of the operation vertical trench-gate in the second mode of operation according to embodiment.
Fig. 4 C illustrates the schematic section of the operation vertical trench-gate in the second mode of operation according to embodiment.
Fig. 4 D illustrates the schematic section of the operation vertical trench-gate in the second mode of operation according to embodiment.
Fig. 5 illustrates the schematic section of the operation vertical trench-gate in the second mode of operation according to embodiment.
Fig. 6 illustrates the schematic section of the imaging circuit according to embodiment.
Fig. 7 illustrates the flow chart of the method for operating imaging circuit according to embodiment.
Fig. 8 A illustrates the diagrammatic top view of the imaging circuit according to embodiment.
Fig. 8 B illustrates the diagrammatic top view of the imaging circuit according to embodiment.
Fig. 9 illustrates that instruction exhausts the view of lower space charge region width deeply.
Figure 10 illustrates that pilot light enters the diagram of the penetration depth of silicon.
Figure 11 illustrates the diagram of the photoelectric current measured by instruction as the function of trench-gate voltage.
Embodiment
Now with reference to the accompanying drawing wherein illustrating some example embodiment, various example embodiment is more fully described.In the accompanying drawings, the thickness in line, layer and/or region can in order to clear and amplify.
Therefore, although example embodiment can carry out various amendment and replacement form, embodiment is exemplarily shown in the drawings and will describe in detail at this.However, it should be understood that and be not intended to example embodiment to be limited to particular forms disclosed, but on the contrary, example embodiment is by all amendments fallen in the scope of the present disclosure of covering, equivalent and replacement.In the description of whole accompanying drawing, same tag refers to same or analogous element.
Should be understood that it can be directly connected in or be coupled in another element, or can there is intervention element when element is called as " connection " or " coupling " in another element.On the contrary, when element is called as " directly connection " or " direct-coupling " in another element, then there is not intervention element.Other words for describing relation between element should be explained with similar type (such as, " between " relative to " directly between ", " vicinity " is relative to " being directly close to " etc.).
Term is only for describing the object of specific embodiment as used herein, and is not intended to limit example embodiment.As used herein, singulative " ", " one " and " being somebody's turn to do " are also intended to comprise plural form, unless context separately has clear instruction.It should be further apparent that, term " comprises ", " comprising " and/or " containing ", when this uses, refer to feature that existence states, entirety, step, operation, element and/or assembly, but do not get rid of and exist or additional other features one or more, entirety, step, operation, element, assembly and/or its combination.
Unless otherwise defined, all terms as used herein (comprising technology and scientific terminology) have the identical meanings usually understood with example embodiment those skilled in the art.Will also be understood that, the term of those terms such as limited in normally used dictionary should be interpreted as having the consistent implication of implication with them in the context of association area, and should not explain with idealized ground or too formal meaning, unless in this clear and definite so restriction.
Fig. 1 illustrates the schematic section of the imaging circuit 1 according to embodiment.Imaging circuit 1 comprises Semiconductor substrate 10 and the first vertical trench-gate 12 extended in Semiconductor substrate 10 and the second adjacent vertical trench-gate 13.
Imaging circuit 1 also comprises grid control circuit 239.Grid control circuit 239 operates with by the first voltage in a first mode of operation, such as V1, be supplied to the first vertical trench-gate 12 and by the second voltage, such as, V2, be supplied to the second vertical trench-gate 13, thus generate the first space charge region photo-generated charge carriers of the first charge carrier type being accelerated to the first current collection contact 32 near the first vertical trench-gate 12.
Grid control circuit 239 also operates tertiary voltage to be supplied to the first vertical trench-gate 12 in the second mode of operation, thus generates the second space charge area photo-generated charge carriers of the first charge carrier type being accelerated to the first current collection contact 32 near the first vertical trench-gate 12.
Imaging circuit 1 also comprises image processing circuit 235, it determines the range information of object based on the photo-generated charge carriers that the first current collection in the first mode of operation contacts the first charge carrier type that 32 places collect, and determines the colouring information of object based on the photo-generated charge carriers that the first current collection in the second mode of operation contacts the first charge carrier type that 32 places collect.
Due to the above enforcement of image processing circuit 235, grid control circuit 239, first vertical trench-gate 12 and the second vertical trench-gate 13, imaging circuit makes it possible to generate the 3-D view of the detailed picture that around scene and colour recognition are shown, coloured image and three-dimensional color image.In addition, the range information of object can be determined by identical imaging circuit with colouring information.In addition, have and can be produced by imaging circuit 1 about the range information of object and the image of colouring information.In addition, owing to employing the vertical trench-gate for span charge area, the lateral dimension of imaging circuit 1 can reduce, or resolution can increase, and the noise caused by stray electrical charge carrier can be avoided or minimize.
Semiconductor substrate 10 can be the Semiconductor substrate based on silicon, the Semiconductor substrate based on carborundum, the Semiconductor substrate based on GaAs or the Semiconductor substrate based on gallium nitride.Semiconductor substrate 10 can be doped, and to make most of electric charge carrier of Semiconductor substrate be the positive carrier in such as hole, or makes most of electric charge carrier of Semiconductor substrate be the charge carriers of such as electronics.In order to illustration purpose, Semiconductor substrate 10 is assumed to the Semiconductor substrate of p doping.In other words, assuming that the major part in the electric charge carrier in Semiconductor substrate 10 is positive carrier, i.e. hole.
Such as, Semiconductor substrate 10 can have 1 × 10
13to 1 × 10
17cm
-3between, or 1 × 10
14to 1 × 10
16cm
-3between, or 1 × 10
14to 1 × 10
15cm
-3between doping content, such as about 5 × 10
14cm
-3.
Semiconductor substrate 10 can be such as semiconductor element or semiconductor chip.First vertical trench-gate 12 and the second vertical trench-gate 13 in Semiconductor substrate 10, namely can be formed in semiconductor element.Semiconductor substrate 10 can have the thickness measured in the vertical direction between the end face and bottom surface of Semiconductor substrate.
First vertical trench-gate 12 can be arranged in the first vertical trench 218 (shown in Figure 2) and by shown in Figure 2 at the insulating barrier 216(of the first vertical trench 218) insulate with Semiconductor substrate 10.Such as, the first vertical trench 218 can such as be passed through carry out structuring to the end face 101 of Semiconductor substrate and be formed in end face 101 place of Semiconductor substrate 10, and the first vertical trench 218 can extend to Semiconductor substrate 10 from end face 101.
Subsequently, insulating barrier 216 can be deposited in the first vertical trench 218 and can to cover diapire and the sidewall of the first vertical trench 218.Insulating barrier 216 can be such as oxide skin(coating).Such as, insulating barrier 216 can be silicon dioxide layer.Insulating barrier 216 can have between 1nm to 30nm or between 2nm to 25nm, or the thickness between 5nm to 25nm, such as about 20nm.
Insulating barrier 216 can also be called gate oxide level, or in oxide liner.First vertical trench-gate 12 can be formed by deposits conductive material in the first vertical trench 218.Electric conducting material such as can fill the first vertical trench 218, and can be formed in above insulating barrier 216, such as direct above insulating barrier 216.Such as, electric conducting material can be polysilicon, and/or metal.First vertical trench-gate 12 can insulate with Semiconductor substrate 10 by insulating barrier 216.
Second vertical trench-gate 13 can realize according to the execution mode of the first vertical trench-gate 12.
Such as, the first current collection contacts the 32 local n doped regions (shown in Fig. 4 A to 4D) that can comprise the top surface being formed in Semiconductor substrate 10 and the Metal Contact be formed in above this n doped region.Such as, the first current collection contact 32 can be deposited on the conductive electrode material above n doping injection zone.First current collection contact 32 directly can be electrically connected with the n injection zone that adulterates, or can be electrically connected to n by one or more conductive layer and to adulterate injection zone.First current collection contact 32 and n doping injection zone can be formed in end face 101 place near the first vertical trench-gate 12 of Semiconductor substrate 10.Such as, n doping injection zone can be formed in the surface of end face 101 in Semiconductor substrate 10, and the first current collection contact 32 can be formed in above n doping injection zone, such as, above the end face 101 of Semiconductor substrate 10.Such as, the first current collection contact 32 and n doping injection zone can around the first vertical trench-gate 12.Such as, the first current collection contact 32 and/or n doping injection zone can or direct neighbors adjacent with the insulating barrier 216 of the first vertical trench-gate 12.Such as, the first current collection contact 32 and n adulterate injection zone can at least partly or all around the first vertical trench-gate 12, and such as they can at least partly or all around the first vertical trench-gate 12.
First current collection contact 32 can be electrically connected to image processing circuit 235.First current collection contact 32 can provide and contact the relevant photoproduction signal of telecommunication of the photo-generated charge carriers of collecting at 32 places with the first current collection.Such as, first current collection contacts the photo-generated charge carriers of collecting at 32 places and at least can be applied to the first voltage V1 of the first vertical trench-gate 12 and tertiary voltage V3 by grid control circuit 239 and generate, and/or can be arrive the photo-generated charge carriers that the first current collection contacts 32 places due to the diffusion from concentration gradient.The photoproduction signal of telecommunication provided can be sent to image processing circuit 235 to estimate.Image processing circuit 235 can receive the photoproduction signal of telecommunication relevant with photo-generated charge carriers.The photoproduction signal of telecommunication can be such as photoelectric current or voltage signal.
First space charge region and second space charge area can be the space charge regions generated at different time.First space charge region and the second charge area can by applying identical or different voltage to generate and can extending through same section or the different piece of Semiconductor substrate.
In the first mode of operation, the range information about the expectation of object can be determined by the image processing circuit 235 of imaging circuit 1.Such as, the 3-D view producing object by imaging circuit 1 can be expect.
Such as, object can be thing, scene or people.Such as, object can be three-dimensional and have color.
In the first mode of operation, light source near object, such as, towards object, can launch the electromagnetic wave be concerned about first wave length.The electromagnetic wave be concerned about first wave length can be launched by light source and modulate with modulating frequency f.The electromagnetic wave be concerned about first wave length launched can be received by imaging circuit 1 by object reflection.In order to determine the range information of object, can estimate by imaging circuit 1 phasing that has between the electromagnetic wave of be concerned about first wave length and its reflected signal.
Such as, assuming that Semiconductor substrate 10 is Semiconductor substrate of p doping, the first voltage V1 can be forward bias voltage and the second voltage V2 can be no-voltage, is not namely biased.Be appreciated that and can select other bias voltages for V1 and V2, to make there is potential potential difference between V1 and V2.Voltage V1 and V2 is alternately applied to the frequency f that the first vertical trench-gate 12 and the offset frequency residing for the second vertical trench-gate 13 can be locked into the signal (such as, by the electromagnetic wave be concerned about wavelength of object reflection) that will detect.
First voltage V1 can generate the first space charge region to the supply of the first vertical trench-gate 12 and the second voltage V2 to the supply of the second vertical trench-gate 13 in Semiconductor substrate 10.
Owing to utilizing the first vertical trench-gate 12 and the second vertical trench-gate 13 to realize grid control circuit 239, the minimizing of noise can be reached.By using vertical trench-gate, can span charge area, thus electron hole pair that noise is contributed, that generated by the infrared light of the space charge region outside at least partially in moderate substrate doped level can be avoided.Except the minimizing of noise, the lateral dimension much smaller compared to photonic mixer device can be reached.
In the first mode of operation, image processing circuit 235 can contact the photo-generated charge carriers of the first charge carrier type 16 of collecting at 32 places and the second current collection during second time interval near the second vertical trench-gate 13 contacts the range information that the photo-generated charge carriers of the first charge carrier type 16 of collecting at 33 places determines object based in the interim very first time at the first current collection.In order to calculate the electromagnetic phase delay with first wave length, image processing circuit 235 can compare the quantity of electric charge collected at the first vertical trench-gate 12 and the second vertical trench-gate 13 place.In the first mode of operation, image processing circuit 235 can to perform an algorithm, and the pulse width modulation such as used in TOF phase-detection or continuous wave modulation calculate.
In the above-described embodiments, Semiconductor substrate 10 is assumed that the Semiconductor substrate that p adulterates.Be appreciated that in other embodiments, Semiconductor substrate 10 can be not limited to be p doping Semiconductor substrate and can be alternatively n doping Semiconductor substrate.In these other embodiments., configuration can be reversed.Such as, the doping that the first current collection contact 32 contact 33 with the second current collection such as can be reversed to p from n doping and adulterate.Such as, the doping of block contact such as can be reversed to n doping from p doping.Such as, V1 can be that negative sense is biased instead of forward bias.Such as, V2 can be forward bias or zero.Such as, the first charge carrier type 16 can be positive carrier, such as hole and the second charge carrier type 17 can be charge carriers, such as electronics.
Due to this execution mode (such as, there is the first vertical trench-gate 12, second vertical trench-gate 13, first current collection contact 32 contacts 33 grid control circuit 239 with the second current collection), imaging circuit 1 may be implemented as the phase sensitive photoelectric tube for the Quick Catch cycle, wherein electronics can be collected in trench-gate surface and be extracted from device by the localized contact close to groove subsequently, and simultaneously can be ostracised this block and being collected by substrate contact in hole.
In the second mode of operation, the desired color information can determining about object by the image processing circuit 235 of imaging circuit 1.Image processing circuit 235 can determine the colouring information of multiple colouring information types of object based on the photo-generated charge carriers generated by multiple different voltage, and can produce the coloured image of object based on the colouring information of multiple colouring information type.
Such as, multiple colouring information type can based on the intensity/amplitude information of photo-generated charge carriers, this intensity/amplitude information based on vision circuit for multiple be concerned about wavelength, the spectral response of such as ruddiness or green glow or blue light.Be appreciated that the colouring information number of types of multiple colouring information type is not limited to three, and any integer being greater than can be comprised.In addition, be appreciated that the spectral response of vision circuit is not limited to ruddiness or green glow or blue light, and any number of color being greater than can be comprised.
Fig. 2 illustrates the schematic diagram of the imaging circuit 2 operated in the first mode of operation.It is one or more that imaging circuit 2 can comprise in the feature described about imaging circuit 1, or all.
First vertical trench-gate 12 can be arranged in the first vertical trench 218 and be insulated with Semiconductor substrate 10 by the insulating barrier 216 of the first vertical trench 218.Such as, the first vertical trench 218 can such as be passed through carry out structuring to the end face 101 of Semiconductor substrate and be formed at end face 101 place of Semiconductor substrate 10, and the first vertical trench 218 can extend to Semiconductor substrate 10 from end face 101.
First vertical trench-gate 12 and the second vertical trench-gate 13 can extend in Semiconductor substrate 10 and be greater than 5 μm.Such as, the vertical height h of the first vertical trench-gate 12 and the second vertical trench-gate 13 can between 5 μm to 500 μm, or between 10 μm to 300 μm, or between 10 μm to 100 μm, such as 70 μm.First vertical trench-gate 12 and the second vertical trench-gate 13 can extend to the same or similar degree of depth, although this can change in other embodiments.
First vertical trench-gate 12 and the second vertical trench-gate 13 all can have scope between 0.1 μm to 5 μm, or between 0.1 μm to 4 μm, or between 0.1 μm to 2 μm, the width w(of such as 1 μm such as, extension minimum or average in one direction).
Semiconductor substrate 10 can have the thickness d s measured in the vertical direction between the end face and bottom surface of Semiconductor substrate 10.The example of possible semiconductive substrate thickness is passable, but or is not limited to be between 400 μm to 1mm, or between 500 μm to 900 μm, or between 600 μm to 850 μm.
During the very first time interval t1 of the first operator scheme, the first voltage V1 can be provided to the first vertical trench-gate 12 and the second voltage V2 is provided to the second vertical trench-gate 13(as shown in Figure 3 by grid control circuit 239).First voltage V1 can perform to the supply of the first vertical trench-gate 12 and the second voltage V2 to the supply of the second vertical trench-gate 13 simultaneously.
Can be received by imaging circuit 1 by the electromagnetic wave be concerned about first wave length of object reflection.The electromagnetic wave with first wave length can be irradiated on the imaging circuit 1 and electromagnetic wave receiving area 26 that can enter in Semiconductor substrate 10.Such as, arrow 19(is shown in Figure 2) diagram to irradiate and the electromagnetic of first wave length that have entering the imaging circuit of such as imaging circuit 1 enters from the end face 101 of Semiconductor substrate 10.Be appreciated that in other alternative embodiments, the electromagnetic wave with first wave length can enter from the bottom surface 102 of Semiconductor substrate 10.The electromagnetic wave with first wave length enters the first space charge region 241 and can cause photo-generated charge carriers, the i.e. generation of electron hole pair, electron hole pair comprises the second circuit carrier type 17 in the first charge carrier type 16 of such as electronics and such as hole.
During very first time interval t1, when the first voltage V1 is provided to the first vertical trench-gate 12 and the second voltage V2 is provided to the second vertical trench-gate 13, first space charge region is by the first charge carrier type 16, and the photo-generated charge carriers of such as electronics accelerates to the first current collection contact 32 near the first vertical trench-gate 12.Such as, the photo-generated charge carriers of the first charge carrier type 16 also can arrive the first vertical trench-gate 12 and also can contact 32 by the first current collection and collect due to the diffusion by concentration gradient.In addition, the first space charge region is by the second charge carrier type 17, and the photo-generated charge carriers in such as hole accelerates to the block contact being connected to Semiconductor substrate and/or the second current collection contact accelerated near the second vertical trench-gate 13.First space charge region can be formed as around the first vertical trench-gate 12, and the second vertical trench-gate 13 can remain in the neutral region of Semiconductor substrate 10.
Voltage V1 and V2 being applied to respectively vertical trench-gate 12 and 13 makes the first space charge region 241 flatly launch (being parallel to device surface or end face 101).Such as, separating distance d between first vertical trench-gate 12 and the second vertical trench-gate 13 can contact with substrate doping level, makes its operation as TOF phase sensitive detector such as can generate fully-depleted gap between the first vertical trench-gate 12 and the second vertical trench-gate 13.
Such as, separating distance d can between 0.5 μm to 10 μm, or between 1 μm to 5 μm, or between 1 μm to 3 μm, such as about 1 μm.The extended range of space charge region 241 and the first vertical trench-gate 12 can between 0.5 μm to 10 μm, or between 1 μm to 5 μm, or between 1 μm to 3 μm, such as about 1 μm, but separating distance d can be less than, the second vertical trench-gate 13 is remained in neutral region 108.
First space charge region 241 also can vertically launch, (perpendicular to semiconductor substrate surface or end face 101).The degree of depth d1 of space charge region 241 can between 5 μm to 500 μm, or between 10 μm to 300 μm, or between 10 μm to 100 μm.Height, the grid voltage applied and/or doped level that the degree of depth of space charge region 241 depends on vertical trench-gate, and the height of vertical trench-gate such as slightly can be greater than due to extends perpendicular.
First charge carrier type 16(electronics) photo-generated charge carriers can due in the first mode of operation during very first time interval t1 at the first vertical trench-gate 12 place to apply and to contact at the first current collection (forward) collected at 32 places biased and accelerate towards the first vertical trench-gate 12.Second charge carrier type 17(hole) photo-generated charge carriers can to contact 36(at block shown in Figure 5) place and/or collect in the second current collection contact position at the second vertical trench-gate 13 place.Such as, the photo-generated carrier of the second charge carrier type 17 can be ostracised Semiconductor substrate 10 block and by block contact collect.Similarly, when providing alternate bias during the second time interval t2 in the first operator scheme, the photo-generated charge carriers of the first charge carrier type 16 can be accelerated towards the second vertical trench-gate 13 and the photo-generated charge carriers of the second charge carrier type 17 can be accelerated towards the first vertical trench-gate 12.
Such as, in the very first time interval of the first operator scheme, distance between first vertical trench-gate 12 and the second vertical trench-gate 13 can be selected as the first vertical trench-gate 12 is surrounded by the first space charge region 241, and the second vertical trench-gate 13 remains in the neutral region 108 of Semiconductor substrate 10.The neutral region 108(of Semiconductor substrate 10 is shown in Figure 2) can be the region with the electrical property similar with the block of Semiconductor substrate 10 concentration of free charge charge carrier (such as, when identical voltage being applied to vertical trench-gate and block).Similarly, such as, when applying alternate bias in second time interval in the first operator scheme, distance between first vertical trench-gate 12 and the second vertical trench-gate 13 can be chosen as and the second vertical trench-gate 13 is surrounded by second space charge area, and the first vertical trench-gate 12 remains in the neutral region of Semiconductor substrate 10.
Such as, the pixel element of imaging circuit can be such as have in the first mode of operation to have the photoelectric tube of at least two trench-gates of the depletion-mode operation of fixed frequency.This frequency is locked into the frequency of signal transmitted, therefore can estimate the phasing between light pulse and its reflection.By using trench-gate, space charge region can exhaust lower horizontal development (being parallel to device surface) deeply, because depletion widths is greater than the maximum depletion depth under such as balancing.
Space between two adjacent electrodes can in such a way and substrate doping level contact: operate in the gap of forcing out to exhaust completely between groove as TOF device.The degree of depth of trench-gate can be suitable for use as the optical wavelength of signal source, and namely it can in the scope of some tens of pm.
Such as, in the first mode of operation, image device 1 can be used as phase sensitive detector, and the electrode of adjacent trenches, such as the one 12 and the 2 13 vertical trench-gate is with forward (rapid scanning) alternate bias, and image device 1 is operated with dark spent condition.Reading circuit can subsequently for compare electrode place collect, by close to groove local n doped region and contact reading the quantity of electric charge.Such as, image device 1 can operate similarly with the photonic mixer device under the first operator scheme.
This alternate bias is shown in Figure 3 illustratively, and it illustrates the view indicating the voltage provided in the first mode of operation by grid control circuit.
Can be generated by the electromagnetic wave be concerned about first wave length at least partially in the photo-generated charge carriers of the first charge carrier type 16 accelerated in the interim very first time of the first operator scheme.In addition, can be generated by the electromagnetic wave be concerned about first wave length at least partially in the photo-generated charge carriers of the second charge carrier type 17 accelerated during second time interval of the first operator scheme.
The intensity/amplitude information generated by the photo-generated charge carriers contacting 32 and the collection of block contact position at the first current collection can be converted to the signal of telecommunication, such as current signal or voltage signal or resistance signal by reading circuit.Each during first current collection contact 32 can contact with block by reading circuit is connected to the image processing circuit 235 receiving the signal of telecommunication.
First voltage V1 can be provided to the first vertical trench-gate 12 by grid control circuit 239, make the first space charge region 241 at least extend to the degree of depth d1 of Semiconductor substrate 10, thus in the first space charge region 241, generate the photo-generated charge carriers generated by the electromagnetic wave be concerned about first wave length.The first voltage V1 for controlling the degree of depth d1 of the first space charge region 241 can based on the penetration depth of electromagnetic wave according to Beer-Lambert rule from the end face 101 of Semiconductor substrate 10 be concerned about first wave length.Penetration depth can be defined as the degree of depth from end face 101, or be reduced to from the electromagnetic intensity penetrating Semiconductor substrate and enter about 1/e(of the electromagnetic intensity of Semiconductor substrate such as at end face 101 or surface, about 0.367) time residing Semiconductor substrate the degree of depth that rises of surface.Such as, the first voltage V1 for controlling the degree of depth d1 of the first space charge region 241 can be chosen as make in the first space charge region 241 generate by enter Semiconductor substrate 10 have be concerned about first wave length electromagnetic wave generate photo-generated charge carriers in predefined percentage (such as, be greater than about 80%, 90% or 95%) or major part (such as, being greater than about 50%).In this illustrated examples, the electromagnetic wave be concerned about first wave length can be electromagnetic infrared wave.Such as, if the first wave length be concerned about is about 800nm, 800nm wavelength EM ripple, penetration depth in a silicon substrate can be about 11.8 μm.Predefined percentage in the photo-generated charge carriers generated by electromagnetic wave or major part can generate in the degree of depth of about 11.8 μm, and the first space charge region 241 can at least extend in the degree of depth d1 in this region, such as at least or be greater than 11.8 μm.
In addition, the height of the first and second vertical trench-gate 12,13 can be structured to, and the degree of depth of the space charge region generated by the first and second vertical trench-gate 12,13 can at least be extended in the degree of depth be within it generated by the predefined percentage in the electric charge carrier of specific be concerned about wavelength generation or major part.Such as, the degree of depth, namely the height h of the first vertical trench-gate 12 and the second vertical trench-gate 13 can be suitable for based on be concerned about first wave length, is namely used as the penetration depth of the optical wavelength of signal source.Such as, the first vertical trench-gate 12 and the second vertical trench-gate 13 can extend to some tens of pm in Semiconductor substrate.
During the second follow-up time interval t2, the voltage being applied to the first vertical trench-gate 12 and the second adjacent vertical trench-gate 13 can reverse, as shown in Figure 3.Therefore, during the second follow-up time interval, the second voltage V2 can be provided to the first vertical trench-gate 12 and the first voltage V1 is provided to the second vertical trench-gate 1 by grid control circuit 239.
Second voltage V2 is provided to the first vertical trench-gate 12 and the first voltage V1 is provided to the second vertical trench-gate 13 and generate the 3rd space charge region, it is by the first charge carrier type 16, and the second current collection contact 33(that the photo-generated charge carriers of such as electronics accelerates near the second vertical trench-gate 13 is shown in Figure 2).In addition, the 3rd space charge region is additionally by the second charge carrier type 17, and the photo-generated charge carriers in such as hole accelerates to block contact or the contact of another block, and it is connected to Semiconductor substrate 10, such as, at the back side place of Semiconductor substrate.In other words, when configuring reversion, namely the 3rd space charge region can be formed in around the second vertical trench-gate 13, and the first vertical trench-gate 12 remains in the neutral region of Semiconductor substrate 10.
The data generated by the photo-generated charge carriers contacting 33 and the collection of block contact position at the second current collection can be converted to the signal of telecommunication, such as current signal or voltage signal or resistance signal by reading circuit.Reading circuit can be connected to the image processing circuit receiving the signal of telecommunication.
More details and aspect carry out describing (such as, about Semiconductor substrate, the first vertical trench-gate, the second vertical trench-gate, grid control circuit and image processing circuit) in conjunction with above-mentioned or following embodiment.Embodiment shown in Fig. 2 can comprise one or more optional supplementary features, its correspond to combine the concept that proposes or above-mentioned (such as Fig. 1) or following (such as, Fig. 3 or 4A to 4D, 5 to 7 or 8A to 8B) one or more aspects of describing of one or more embodiments.
Fig. 3 illustrates the diagram indicating the voltage provided in the first mode of operation by grid control circuit.
Grid control circuit is configured to the quick alternate bias of V1 and V2 to be alternately applied to the one 12 and the 2 13 vertical trench-gate, the pixel element of imaging circuit 1,2 is in the first mode of operation and deeply exhausts.Such as, alternating frequency can between 50Hz to 1MHz, or between 100Hz to 800Hz, or between 200Hz to 600Hz, or any value between these values.
Such as, voltage V1 can between 1V to 15V, or between 2V to 12V, or between 5V to 10V.Such as, voltage V2 can be about zero volt () or another reference potential.
Fig. 4 A to 4D illustrates the schematic section of the imaging circuit 1 or 2 operated in the second mode of operation.
In the second mode of operation, switching grid voltage back and forth can be replaced by such as grid voltage scanning (sweep), and it causes the change of gutter channel region place charge carrier concentration.By using this technology, the change of spectral response can be provided and therefore provide colour recognition.The supplementary features realized for colour recognition can be the channel regions changing channel charge along with increasing grid voltage progressively.This can be provided by the substrate region of adulterating gradually.This also can contribute to by using built-in field to increase quantum efficiency and may be used in PMD system.Other method will be the gate-dielectric that cone shape or stoichiometric composition change.
Due to the grid voltage increased or rise, channel region can to accumulate, to exhaust and/or transoid operation.In the second mode of operation, the first vertical trench-gate 12 can operate in Semiconductor substrate, generate multiple different inversion regime under multiple different operating state.Such as, grid control circuit 239 can in the second mode of operation by multiple different voltage, and such as V3, V4, V5 and/or more multivoltage are provided to the first vertical trench-gate 12.
The voltage applied during the second operator scheme, such as V3, V4, V5 can between 1V to 15V, or between 2V to 12V, or between 5V to 10V.In some instances, voltage in the second mode of operation can be scanned up to 15V gradually from 1V, or from 2V to 12V, or from 5V to 10V.In other words, voltage V3, V4, V5 can be between 1V to 15V, or between 2V to 12V, or the discrete selective value between 5V to 10V.
Such as, voltage can be the order according to increasing gate bias.Each voltage of multiple different voltage can continuously (such as, be provided to one by one) the first vertical trench-gate 12, to generate corresponding space charge region in inversion regime to the interface of Semiconductor substrate, and such as it increases to the extension in Semiconductor substrate 10 along with the increase of gate bias.Such as, the photo-generated charge carriers of the first charge carrier type 16 can be accelerated to the first current collection contact 32 by each space charge region.
Fig. 4 A illustrates accumulation area, such as, be formed in have the majority carrier identical with Semiconductor substrate 10, i.e. the channel region in hole around the first vertical trench-gate 12.Accumulation area can be provided to the first vertical trench-gate because negative sense is biased and generate.
Fig. 4 B illustrates the imaging circuit operated during the 3rd time interval t3 illustratively.Tertiary voltage V3 can be provided to the first vertical trench-gate 12 by grid control circuit 239 during the 3rd time interval t3.Tertiary voltage V3 is provided to the first vertical trench-gate 12 and can generates inversion regime 22 in Semiconductor substrate 10.Inversion regime 22 can generate by suitable bulk potential being provided to the first vertical trench-gate 12.Such as, because the first vertical trench-gate 12 is insulated with Semiconductor substrate 10 by the insulating barrier 216 being used as gate-dielectric, the interface between the insulating barrier 216 of first vertical trench-gate 12 of surface charge carrier accumulation in Semiconductor substrate 10 and Semiconductor substrate 10.Such as, the surface charge charge carrier in inversion regime 22 has the charge carrier type contrary with the charge carrier type that the block of Semiconductor substrate 10 adulterates.Therefore, assuming that Semiconductor substrate 10 is semiconductors of p doping, then suitable forward bias is applied to the inversion regime 22 that the first vertical trench-gate generates such as electronics.
During the 3rd time interval t3, the tertiary voltage V3 being provided to the first vertical trench-gate 12 by grid control circuit 239 can generate the inversion regime 22 that can extend in Semiconductor substrate 10, make second space charge area 24(shown in Figure 5) at least extend in the degree of depth d2 of Semiconductor substrate 10, generate the predefined percentage in the photo-generated charge carriers generated by the electromagnetic wave be concerned about second wave length or major part within it.
Such as, during the 3rd time interval t3, inversion regime 22 can extend to the degree of depth (illustrating in figure 4b further) of about 1/3 to about 1/2 of the height h of the first vertical trench-gate 12 in Semiconductor substrate 10.In other words, inversion regime 22 only can be formed in the office, top of the first vertical trench-gate 12.
When light wave enters electromagnetic wave receiving area 26, imaging circuit can be had spectral response by the electromagnetic wave be tuned as having be concerned about second wave length by the supply of voltage V3.The supply of voltage V3 can the degree of depth of tuning second space charge area 24, make second space charge area at least extend in the degree of depth d2 of Semiconductor substrate 10, generate the predefined percentage in the photo-generated charge carriers generated by the electromagnetic wave be concerned about second wave length or major part within it.Such as, the tertiary voltage V3 for controlling the degree of depth d2 of second space charge area 24 can based on the penetration depth of electromagnetic wave according to Beer-Lambert rule from the end face 101 of Semiconductor substrate 10 be concerned about second wave length.Such as, tertiary voltage V1 for controlling the degree of depth d2 of second space charge area 24 can be chosen as make in second space charge area 24 generate by enter Semiconductor substrate 10 have be concerned about second wave length electromagnetic wave generate photo-generated charge carriers in predefined percentage (such as, be greater than about 80%, 90% or 95%) or major part (such as, being greater than about 50%).Such as, the degree of depth d2 of second space charge area can lower than 10 μm, or lower than 8 μm or lower than 5 μm.
Such as, when the electromagnetic wave be concerned about second wave length is the electromagnetic wave in visible spectrum, the electromagnetic wave be concerned about second wave length has the penetration depth less than the electromagnetic wave be concerned about first wave length.The degree of depth that the voltage V3 being provided to the first vertical trench-gate by grid control circuit 239 can be chosen as the second inversion regime 22 of wherein being generated by voltage V3 under inversion mode and second space charge area 24 is thus less than the one 241 and the 3rd degree of depth of space charge region that are generated by voltage V1 and voltage V2 under deeply exhausting.In other words, the first space charge region 241 and second space charge area 24 can extend to the different depth in Semiconductor substrate 10.
Second space charge area 24 can by the first charge carrier type, and the photo-generated charge carriers of such as electronics accelerates to the first current collection contact 32 near the first vertical trench-gate 12.Being generated by the electromagnetic wave be concerned about second wave length at least partially in the photo-generated charge carriers of the first charge carrier type accelerated during the second operator scheme.The photo-generated charge carriers of the first charge carrier type is directed to the first current collection contact 32 of the end face 101 of Semiconductor substrate 10 from the degree of depth of Semiconductor substrate 10 along inversion regime 22, they can be provided to image processing circuit to estimate there.Second space charge area 24 can by the second charge carrier type, and the photo-generated charge carriers in the hole of such as positive charge accelerates to block contact, and can be provided to image processing circuit 235 via block contact.
By grid control circuit 239, multiple voltage such as V3, V4, V5 are provided to the first vertical trench-gate 12 continuously and change the degree of depth of inversion regime 22 and the scope of space charge region 24, thus utilize different bias voltages to create different spectral responses.Such as, V3, V4 and V5 can stepwise or gradually increment ground, i.e. grid voltage scanning, is provided to the first vertical trench-gate 12, thus causes the increase of the extension of inversion regime and vertically enter the extension of the space charge region 24 in Semiconductor substrate 10 thus.
Fig. 4 C illustrates the schematic section of the imaging circuit operated in the second mode of operation.
During the 4th follow-up time interval t4, grid control circuit 239 can be further configured to and the 4th voltage V4 is provided to the first vertical trench-gate 12, and wherein tertiary voltage V3 and the 4th voltage V4 is different.During the 4th time interval, be provided to the 4th voltage V4 generation inversion regime 222 of the first vertical trench-gate 12 by grid control circuit 239, it deeper extends in Semiconductor substrate than the inversion regime 22 generated by applied voltage bias V3 as shown in Figure 4 B.Inversion regime 222 can be formed in upper part and the intermediate portion of the first vertical trench-gate 12.
The voltage V4 being provided to the first vertical trench-gate 12 by grid control circuit 239 can generate the second inversion regime 222, it can extend in Semiconductor substrate 10, to make the 4th space charge region at least extend in the degree of depth d3 of Semiconductor substrate 10, wherein by the predefined percentage had in the electromagnetic wave generation photo-generated charge carriers of be concerned about three-wavelength or major part.Such as, during the 4th time interval t4, the second inversion regime 222 can extend to the degree of depth of about 1/2 to about 3/4 of the height h of most the first vertical trench-gate 12 in Semiconductor substrate 10.
When light wave enters electromagnetic wave receiving area 26, imaging circuit can be had spectral response by the electromagnetic wave be tuned as having be concerned about three-wavelength by the supply of voltage V4.The supply of voltage V4 can the degree of depth of tuning 4th space charge region, make the 4th space charge region at least extend in the degree of depth d3 of Semiconductor substrate 10, generate predefined percentage or the major part of the photo-generated charge carriers generated by the electromagnetic wave be concerned about three-wavelength within it.Such as, the voltage V4 for controlling the degree of depth d3 of the 4th space charge region can based on the penetration depth of electromagnetic wave from the end face 101 of Semiconductor substrate 10 be concerned about three-wavelength.Such as, voltage V4 for the degree of depth d3 controlling the 4th space charge region can be chosen as and make to generate in the 4th space charge region by entering the predefined percentage with the photo-generated charge carriers of the electromagnetic wave generation of be concerned about three-wavelength of Semiconductor substrate 10 (such as, be greater than about 80%, 90% or 95%) or major part (such as, being greater than about 50%).Such as, the degree of depth d3 of the 4th space charge region can lower than 10 μm, or lower than 8 μm or lower than 5 μm.
The electromagnetic wave be concerned about three-wavelength can have the penetration depth larger than the electromagnetic wave be concerned about second wave length.The degree of depth d3 that the voltage V4 being provided to the first vertical trench-gate by grid control circuit 239 can be chosen as the second inversion regime 222 of wherein being generated by voltage V4 and the 4th space charge region is thus greater than the degree of depth of the inversion regime 22 that generated by voltage V3 and second space charge area thus.
Similarly, the 4th space charge region is by the first charge carrier type, and the photo-generated charge carriers of such as electronics accelerates to the first current collection contact 32 near the first vertical trench-gate 12.The photo-generated charge carriers of the first charge carrier type is directed to the first current collection contact 32 of the end face 101 of Semiconductor substrate 10 along the second inversion regime 222 from the degree of depth of Semiconductor substrate 10, they can be provided to image processing circuit to estimate there.The photo-generated charge carriers of the second charge carrier type can be collected in the second current collection and contact 33 places, is provided to image processing circuit.
Therefore be appreciated that in the second mode of operation, imaging circuit can operate under multiple mode of operation, wherein multiple mode of operation each under, the scope that inversion regime 22,222,223 is penetrated into the degree of depth of Semiconductor substrate 10 can change.The degree of depth of each lower inversion regime of mode of operation can be adjusted discretely or little by little.The discrete of the extension of inversion regime or adjustment gradually or change is indicated in the diagram by arrow 23.
Fig. 4 D illustrates the 5th voltage V5 being such as provided to vertical trench-gate 12 by grid control circuit 239.During the 5th time interval, the 5th voltage V5 can generate the 3rd inversion regime 223, and it roughly can extend to the entire depth of the first vertical trench-gate 12.In other words, the degree of depth that the voltage V5 being provided to the first vertical trench-gate 12 by grid control circuit 239 can be chosen as the 3rd inversion regime 223 that wherein generated by voltage V5 and the 5th space charge region is thus greater than the degree of depth of the second inversion regime 222 of being generated by voltage V4 and the 4th space charge region thus.3rd inversion regime 223 can be formed along whole first vertical trench-gate 12.
The electromagnetic wave that imaging circuit can be tuned as having the 4th be concerned about wavelength by the supply of voltage V5 has spectral response.The supply of voltage V5 can the degree of depth of tuning 5th space charge region, make the 5th space charge region at least extend in the degree of depth d4 of Semiconductor substrate 10, generate predefined percentage or the major part of the photo-generated charge carriers generated by the electromagnetic wave with the 4th be concerned about wavelength within it.Such as, the voltage V5 for controlling the degree of depth of the 5th space charge region can based on the penetration depth of electromagnetic wave in Semiconductor substrate 10 with the 4th be concerned about wavelength.Such as, voltage V5 for the degree of depth controlling the 5th space charge region can be chosen as and make to generate in the 5th space charge region by entering the predefined percentage with the photo-generated charge carriers of the electromagnetic wave generation of the 4th be concerned about wavelength of Semiconductor substrate 10 (such as, be greater than about 80%, 90% or 95%) or major part (such as, being greater than about 50%).Such as, the degree of depth d4 of the 5th space charge region can lower than 10 μm, or lower than 8 μm or lower than 5 μm.
Imaging circuit can also comprise the first current collection contact 32 being configured for the photo-generated charge carriers providing the first charge carrier type.Under the first mode of operation of the second operator scheme, first inversion regime 22 can be configured to the Part I optionally collected in the photo-generated charge carriers of the first charge carrier type, and the Part I of collected photo-generated charge carriers is guided to the first current collection contact 32.In the second operating condition, the second inversion regime can be configured to the Part II optionally collected in the photo-generated charge carriers of the first charge carrier type and the Part II of collected photo-generated charge carriers be guided to the first current collection contact 32.
The electromagnetic wave be concerned about second, third or the 4th wavelength can from light wave.Can by the object reflection will taking (three-dimensional) coloured image from the light wave of such as surround lighting or light-emitting device.Light wave can comprise having and is in visible spectrum, such as, from about 380nm to the electromagnetic wave of the wavelength about 750nm.Such as, the light wave reflected can comprise the colouring information about object.
Be appreciated that be concerned about wavelength described here can be different from each other.Such as, the first wave length be concerned about and the second wave length be concerned about can be different.Such as, first, second wavelength, three-wavelength and the 4th wavelength all can be different from each other.Specific voltage can allow imaging circuit for specific institute's wavelength of interest or particular range of wavelengths for the applying of vertical trench-gate, such as, in infrared or visible spectrum, demonstrates maximum spectral response.Imaging circuit can be tuned as the applying of vertical trench-gate by different voltage bias effectively has different spectral responses for be concerned about different wave length.
The execution mode of spectral response in the first vertical trench-gate 12 has been shown illustratively about Fig. 4 A to 4D.But, be appreciated that the first vertical trench-gate 12 not only can be controlled by grid control circuit 235 individually, and side by side can be controlled by grid control circuit 235 with the multiple vertical trench-gate be formed in Semiconductor substrate 10.Such as, in the second mode of operation, tertiary voltage V3 can be provided to the first vertical trench-gate 12 and also be provided to the second vertical trench-gate 13 similarly by grid control circuit 239 during the 3rd time interval, to generate the other space charge region photo-generated charge carriers of the first charge carrier type 16 being accelerated to the second current collection contact 33 near the second vertical trench-gate 13 further.Equally, each continuous voltage in voltage scanning can be provided to multiple vertical trench-gate simultaneously, such as, the first vertical trench-gate 12 in Semiconductor substrate 10 and the second vertical trench-gate 13 and other vertical trench-gate.
Multiple vertical trench-gate can form photodetector array, and each pixel element wherein in photodetector array comprises at least one vertical trench-gate.In the second mode of operation, each pixel element of photodetector array can use the single vertical trench-gate photoelectric detector generation in pixel element about the colouring information of object.In the first mode of operation, a pair adjacent pixel element, such as the first vertical trench-gate 12 and the second vertical trench-gate 13 can use a pair vertical trench-gate photoelectric detector to produce range information about object.
Subsequently, image processing circuit 235 can carry out the view data of the three-dimensional color image of formation object based on range information and colouring information.
Other embodiments describe the mode generating and can extend to the inversion regime in the degree of depth of Semiconductor substrate 10 discretely or little by little.
In one embodiment, Semiconductor substrate 10 can have the doping little by little increased along the first vertical trench-gate 12.Such as, Semiconductor substrate 10 can have the doping little by little increased of the degree of depth vertically entering substrate (that is, from end face 101 towards bottom surface 102).Such as, higher than end face 101 near the bottom of the bottom being entrained in the first vertical trench-gate 12 of Semiconductor substrate 10 and the second vertical trench-gate 13.This can cause higher voltage, and this higher voltage needs to be applied to the first vertical trench-gate 12 can create the inversion regime of the bottom extending to the first vertical trench-gate 12.
Alternatively, alternatively, or in addition, the thickness of insulating barrier 216 can be increased in Semiconductor substrate 10.Insulating barrier 216 can have in the first vertical trench 216 of the degree of depth of increase and becomes thicker in Semiconductor substrate 10.Such as, the thickness of insulating barrier 216 little by little can increase along with the degree of depth increased in Semiconductor substrate 10, can be wherein that the several times of the thickness at groove top are thick at the thickness of the insulating barrier 216 of channel bottom, and such as two or more doubly thick.
Alternatively, alternatively, or in addition, insulating barrier 216 can have incomparable inconsistent stoichiometry.Such as, trench dielectric 216 can change the dielectric property in its penetration depth.This nitrogenize that can be reduced insulating barrier 216 by the degree of depth along with insulating barrier 216 increase is in the semiconductor substrate reached.Such as, the value of the electric field in insulating barrier 216 can than low at top in the bottom of vertical trench 218.
Due to the execution mode of at least one in the thickness adulterating gradually, change insulating barrier 216 of Semiconductor substrate and the non-uniform stoichiometry of insulating barrier, by applying different voltage, the extension of inversion regime 22 can continuously and/or little by little adjustable and the spectral response of photoelectric detector can continuously and/or little by little adjustable.Have measure listed above, such as, in the substrate adulterated gradually and/or the cone shape of gate-dielectric and/or the stoichiometric situation spatially revised, trench-gate TOF device can be used as color detection device concurrently.In addition, can obtain colouring information rapidly, such as, grid voltage scanning can spend and be less than 1ms.
Three or more (such as, four, five, six or seven or more) different voltage can be applied to the first vertical trench-gate to obtain different colouring informations being less than (or be less than 100ns or be less than 10ns) in 1ms.
More details and aspect will carry out describing (such as, about Semiconductor substrate, the first vertical trench-gate, the second vertical trench-gate, grid control circuit and image processing circuit) in conjunction with above-mentioned or following embodiment.Embodiment shown in Fig. 4 A to 4D can comprise one or more optional supplementary features, its correspond to combine the concept that proposes or above-mentioned (such as Fig. 1 to Fig. 3) or following (such as, Fig. 5 to 7,8a to 8b) one or more embodiments describe one or more aspects.
Fig. 5 illustrates to illustrated that describe about Fig. 1 to Fig. 3 and 4A to 4D, under the mode of operation of the second operator scheme imaging circuit 1 or 2 in more detail.Fig. 5 illustrates the generation of the interface space charge region between inversion regime and Semiconductor substrate.Space charge region can have the extension that enter in Semiconductor substrate larger than inversion regime.Such as, owing to generating the inversion regime 22 of n raceway groove in the Semiconductor substrate 10 of adulterating at p, second space charge area 24 can be created on the interface between n channel inversion district 22 and p dope semiconductor substrates 10.Such as, space charge region 24 has the extension that enter in Semiconductor substrate 10 larger than inversion regime 22.
About the block contact 36 that the embodiment of Fig. 1 to 3 and 4A to 4D describes above Fig. 5 illustrates.Block contact 36 can be deposited on p doping injection zone above conductive electrode material.Block contact 36 can be formed in Semiconductor substrate 10 and directly to contact with Semiconductor substrate 10.Such as, block contact 36 and p doping injection zone can be formed in end face 101 place of Semiconductor substrate 10.Block contact 36 can be positioned at such as neutral region 108.Such as, block contact 36 can only about half of place between the first vertical trench-gate 12 and the second vertical trench-gate 13.
Arrow 23 illustrates when the voltage bias changed is applied to the first vertical trench-gate 12, in Semiconductor substrate 10 such as along the height of vertical trench inversion regime and the direction (such as vertical direction) of the change in depth of space charge region thus.
More details and aspect carry out describing (such as, about Semiconductor substrate, the first vertical trench-gate, the second vertical trench-gate, grid control circuit and image processing circuit) in conjunction with above-mentioned or following embodiment.Embodiment shown in Figure 5 can comprise one or more optional supplementary features, and it corresponds to one or more aspects that one or more embodiments of combining the concept that proposes or above-mentioned (such as Fig. 1 to 3 or 4A to 4D) or following (such as 6 to 7 or 8a to 8b) describe.
Fig. 6 illustrates the schematic section of the imaging circuit according to embodiment.
Multiple vertical trench-gate 12,13,14 that imaging circuit 3 comprises Semiconductor substrate 10 and extends in Semiconductor substrate 10.Each corresponding vertical trench-gate has the current collection contact 32,33,34 of the correspondence of the photo-generated charge carriers for collecting the first charge carrier type in its vicinity.
Imaging circuit 3 comprises the grid control circuit 239 of each being configured to be supplied to by different voltage during the tc of collection time interval in multiple vertical trench-gate.Each corresponding vertical trench-gate generates the corresponding space charge region being used for the photo-generated charge carriers of the first charge carrier type being accelerated to its corresponding current collection contact.
Imaging circuit 3 also comprises the image processing circuit 235 of the colouring information of the multiple colouring information types being configured to determine object.The colouring information of each colouring information type can contact the photo-generated charge carriers of the first charge carrier type that 32 places collect based on the current collection of each correspondence.
Due to above execution mode, each in vertical trench-gate can be tuned as and make each vertical trench-gate have the spectral response different from other during identical acquisition time interval tc.This allows imaging circuit 3 obtain rapidly and produce the colouring information of the multiple colouring information types about object.
Such as, in an embodiment, grid control circuit 239 can be configured to simultaneously, namely, in identical current collection time interval tc, voltage V3 be provided to the first vertical trench-gate 12 and voltage V4 be provided to the second adjacent vertical trench-gate 13 and/or voltage V5 be provided to other the 3rd adjacent vertical trench-gate 14.Thus, the first vertical trench-gate 12, second vertical trench-gate 13 and the 3rd vertical trench-gate 13 all can have the spectral response different from other.Such as, assuming that voltage V3 and V4 and V5 is the voltage bias increased, first vertical trench-gate 12 with applied voltage bias V3 can have the spectral response for the wavelength shorter than second vertical trench-gate 13 with applied voltage bias V4.Similarly, second vertical trench-gate 13 with applied voltage bias V4 can have the spectral response for the wavelength shorter than the 3rd vertical trench-gate 14 with applied voltage bias V5.Such as, during identical current collection time interval tc, first vertical trench-gate 12 can have the spectral response for blue light, and the second vertical trench-gate 13 can have can have spectral response for ruddiness for the spectral response of green glow and the 3rd vertical trench-gate 14.
Be appreciated that multiple vertical trench-gate can refer to the vertical trench-gate of any integer number being greater than, it all may be used for detecting the colouring information about object.Such as, the multiple vertical trench-gate mentioned in Fig. 6 can be the subsets of the total number of the vertical trench-gate in imaging circuit 3, and imaging circuit 3 can comprise multiple such subset.
Such as, imaging circuit 3 can comprise with the array of the vertical trench-gate of vertical trench-gate group (or subset) tissue.Often organize vertical trench-gate and can comprise the multiple vertical trench-gate providing different voltage, such as 12,13,14).
Image processing circuit 235 can for the colouring information of multiple colouring information types often organizing vertical trench-gate determination object.
Except or replace the first operator scheme described above and/or the second operator scheme, grid control circuit 239 can also provide about Fig. 6 describe operator scheme.
More details and aspect will carry out describing (such as, about Semiconductor substrate, the first vertical trench-gate, the second vertical trench-gate, grid control circuit and image processing circuit) in conjunction with above-mentioned or following embodiment.Embodiment shown in Fig. 6 can comprise one or more optional supplementary features, it corresponds to the concept or above-mentioned (such as Fig. 1 to Fig. 3 that combine and propose, or 4A to 4D or 5) or following (such as, Fig. 7 or 8A to 8B) one or more embodiments describe one or more aspects.
Fig. 7 illustrates the flow chart of the method 700 for operating imaging circuit.Method 700 comprises in the first mode of operation, provides 710 to the first vertical trench-gate the first voltage and the second voltage is supplied to the second vertical trench-gate to generate the first space charge region photo-generated charge carriers of the first charge carrier type being accelerated to the first current collection contact near the first vertical trench-gate.
Method 700 also comprises in the second mode of operation, tertiary voltage is provided 720 to the first vertical trench-gate to generate the second space charge area photo-generated charge carriers of the first charge carrier type being accelerated to the first current collection contact near the first vertical trench-gate.
Method 700 also comprises the photo-generated charge carriers of the first charge carrier type based on the first current collection contact position collection in the first mode of operation, determines the range information of 730 objects.
Method 700 also comprises the photo-generated charge carriers of the first charge carrier type based on the first current collection contact position collection in the second mode of operation, determines the colouring information of 740 objects.
Owing in the first mode of operation the first voltage being provided to the first vertical trench-gate and the second voltage being provided to the second vertical trench-gate and in the second mode of operation tertiary voltage being provided to the execution mode of the first vertical trench-gate, the range information of object can be determined by identical imaging circuit with colouring information.In addition, the image of the range information and colouring information with object can be produced by imaging circuit.
More details and aspect will carry out describing (such as, about Semiconductor substrate, the first vertical trench-gate, the second vertical trench-gate, grid control circuit and image processing circuit) in conjunction with above-mentioned or following embodiment.Embodiment shown in Fig. 7 can comprise one or more optional supplementary features, it corresponds to the concept or above-mentioned (such as Fig. 1 to Fig. 3 that combine and propose, or 4A to 4D or 6) or following (such as, 8A to 8B) one or more embodiments describe one or more aspects.
Fig. 8 A and 8B all illustrates the diagrammatic top view of the imaging circuit according to various embodiment.Imaging circuit can comprise for various groove and the photoelectric tube contacted in layout.Except the linear field for charge carrier current collection, can exist and use more than the electrode of two to carry out the option of phase-detection.This can cause new reading version.
Fig. 8 A illustrate according to embodiment for photoelectric tube, the such as suitably-arranged of imaging circuit 4.Such as, block contact 36 can only about half of place between the first vertical trench-gate 12 and the second vertical trench-gate 13 and can be arranged as and be orthogonal to the one 12 and the 2 13 vertical trench-gate relative to maximum horizontal expansion.In other examples, block contact 36 can be arranged in Semiconductor substrate 10 Anywhere, such as, away between in a lateral direction several microns of groove and hundreds of micron.
Such as, vertical trench-gate 12,13 all can have between 0.1 μm to 100 μm, or between 10 μm to 80 μm, or between 20 μm to 50 μm, the length l(maximum transversal of such as about 30 μm extends).
Fig. 8 B illustrate according to embodiment for photoelectric tube, another suitably-arranged of the part of such as imaging circuit 5.In an embodiment, may be used for phase-detection more than the electrode of two.Such as, four vertical trench-gate 12,13,14,15 may be used for phase-detection.Such as, the first vertical trench-gate 12 can be parallel to the second adjacent vertical trench-gate 13.3 14 and the 4 15 vertical trench-gate can be orthogonal to the one 12 and the 2 13 vertical trench-gate.Four vertical trench-gate 12,13,14,15 can be arranged as and form annular or square.Four battery grooves take into account circular bias voltage.
Block contact 36 can be arranged in other places of Semiconductor substrate.Such as, block contact 36 can be orientated as and be parallel to vertical trench-gate and between parallel vertical trench-gate.Such as, block contact 36 can be positioned at annular or the square outer of four vertical trench-gate.
The three-dimensionally formed meeting of space charge region generates crosstalk for some device geometries and can contraction (shrinking) current potential of limiting device.Vertical trench-gate can be elongated the crosstalk minimized between vertical trench-gate.In addition, when block contact is orientated as away from vertical trench-gate, can minimise cross talk further.
More details and aspect will carry out describing (such as, the first vertical trench-gate, the second vertical trench-gate, current collection contact contact with block) in conjunction with above-mentioned or following embodiment.Embodiment shown in Fig. 8 A and 8B can comprise one or more optional supplementary features, its one or more aspects described corresponding to the one or more embodiments combining concept or above-mentioned (such as Fig. 1 to Fig. 3, Fig. 4 A to 4D, 5 to 7) proposed.
Fig. 9 illustrates that instruction (in the first mode of operation) space charge region width 910 under deeply exhausting is biased the diagram of 920 relative to grid voltage.Along with doping content reduces, the width of the space charge region under deeply exhausting increases.Such as, in higher grid voltage (being greater than 10V) and lower doping content, such as 1 × 10
13cm
-3under, the width of space charge region can be greater than 35 μm.
Figure 10 illustrates that instruction intensity 1010 enters the diagram of the penetration depth of silicon relative to light 920.Three wavelength, 600nm, 800nm and 1000nm wavelength is illustrated.Although the intensity of the light of 600nm wavelength be less than 20 μm enter penetrating in silicon time drop to zero, under moderate substrate doped level, infrared light generates electron hole pair at least partially in space charge region outside.
Fig. 9 and 10 provides the information of the degree of depth relative to the relation of the photonic absorption degree of depth about deeply exhausting lower space charge region.
Figure 11 illustrates the diagram of the photoelectric current 1110 measured by instruction as the function of trench-gate voltage 1120.Photoelectric current μ A by 850nm photogenerated and in response to increase grid voltage and measured.The change of the grid voltage from-1V to 16V can generate the illustrated various Cumulate Sum transoid stage Fig. 4 A to 4D, such as, the transoid being accumulated to whole flute surfaces near groove.When grid voltage is about 12V, photoelectric tube measures maximum photoelectric current, and the complete transoid of flute surfaces has wherein occurred.
Various embodiment relates to the photoelectric tube of 3D for combining and color imaging.
Various embodiment relates to photoelectric tube, and it is individual to allow phase sensitive to read that it is implemented as the photonic mixer device and two collection diodes or more that use charge-coupled device (CCD) principle.Use instantaneous switch mode to manage the quick current collection of photo-generated charge carriers.Under being biased the condition of scanning fast, the semiconductor regions of MIS base part pulse can turn to dark spent condition.In this mode of operation, depletion widths is greater than the maximum depletion widths under balancing.This effect may be used for the device with the surface electrode caught for charge carrier, i.e. charge coupled device or photonic mixer device, and for using in the various embodiments of vertical trench-gate electrode.
Various embodiment relates to the photoelectric tube based on groove, and it realizes catching very fast of photo-generated charge carriers.It avoids the diffusion of the spended time of charge carrier by use groove to create deep depletion area.Embodiment, by operator scheme and color detection routine assembles, wherein switches grid voltage back and forth and is replaced by grid voltage scanning.Compared to the measuring principle that the TOF being used for infrared light can not carry out colour recognition measures, this arranges the joint-detection allowing 3D and color imaging by single photoelectric tube.
Various embodiment provides its reading circuit is operated in time strict territory imaging circuit due to the high speed of light.According to various embodiment, the Unit Design of imaging circuit and sensing technique can provide Quick Catch and the estimation of photo-generated charge carriers.In addition, the background current of the charge carrier from space charge region outside of the carrier diffusion causing spended time can be avoided.
Example embodiment can provide the computer program with program code further, and when computer program performs on a computer or a processor, program code is for performing one of above method.Those skilled in the art will easily recognize, the action of various said method can be performed by programmed computer.At this, some example embodiment are also intended to overlay program storage device, such as digital data storage medium, it is machine or computer-readable and encoding machine can perform or computer executable instructions program, and wherein instruction performs some or all in the action of said method.Program storage device can be the magnetic-based storage media of such as digital storage, such as Disk and tape, hard disk driver or readable digital data storage medium alternatively.Further example embodiment is also intended to cover (scene) programmable logic array ((F) PLA) or (scene) programmable gate array ((F) PGA) of the computer being programmed for the action performing said method or the action being programmed for execution said method.
Description and accompanying drawing only illustrate principle of the present disclosure.Therefore, clearly do not describe at this although should be understood that those skilled in the art can design or illustrate, embody principle of the present disclosure and be included in the various layouts in its spirit and scope.In addition, all example principles that this records only are intended for instruction object clearly to contribute to the concept of reader understanding's principle of the present disclosure and inventor's contribution, thus expansion prior art, and should not be construed as the example and condition that are limited to and clearly record like this.Further, principle disclosed in this notebook, in and embodiment, and all statements intentions of its concrete example cover its equivalents.
Be expressed as " for ... device " (execution specific function) functional module be understood to include the functional module being configured to the circuit performing specific function respectively.Therefore, " device for something " also can be understood as " device being configured to or being applicable to something ".Therefore, the device being configured to perform specific function not implies that such device must perform this function (at given time).
The function of various element illustrated in the accompanying drawings, comprise and be labeled as " device ", " for providing the device of sensor signal ", " for generating the device of signal transmission " etc., can provide by using specialized hardware, such as " signal provider ", " signal processing unit ", " processor ", " controller " etc., and the hardware of the software be associated with appropriate software can be performed.In addition, any entity being described as " device " at this can correspond to or be embodied as " one or more module ", " one or more device ", " one or more unit " etc.When provided by a processor, multiple separate processors that function can be able to be shared by single application specific processor, single share processor or some of them provide.In addition, clearly the using of term " processor " or " controller " should not be construed as that mention exclusively can the hardware of executive software, but can include but not limited to digital signal processor (DSP) hardware, network processing unit, application-specific integrated circuit (ASIC) (ASIC), field programmable gate array (FPGA), read-only memory (ROM), random-access memory (ram) and Nonvolatile memory devices for storing software implicitly.Also other hardware of routine and/or customization can be comprised.
It will be understood by those skilled in the art that the concept map representing the illustrative circuit embodying principle of the present disclosure at this any block diagram.Similarly, should understand, any flow chart, flow chart, status transition chart, false code etc. represent can find expression in computer-readable medium and the various processes therefore performed by computer or processor substantially, and no matter whether such computer or processor clearly illustrate.
In addition, following claim is merged in detailed description at this, and wherein each claim can be independent as the embodiment of separating.Although each claim can be independent as the embodiment of separating, but note, although dependent claims can mention the concrete combination with other claims one or more in the claims, other embodiments also can comprise the combination of the theme of this dependent claims and other dependent claims each or independent claims.At this, such combination is proposed, the concrete combination be not intended to unless indicated.In addition, also intention comprise the feature of claim for any other independent claims, even if this claim not immediate subordinate in these independent claims.
Be also noted that, disclosed in specification or claims, method can be realized by the equipment had for performing the device of each in the corresponding actions of these methods.
In addition, should be understood that the disclosure of multiple action or function disclosed in specification or claims cannot be interpreted as according to this certain order.Therefore, the disclosure of multiple action or function will not be limited to specific order, unless such action or function not interchangeable for technical reason.In addition, in certain embodiments, individual part can comprise or can be decomposed into multiple sub-action.Unless expressly excluded, so sub-action can be included in the disclosure of this individual part and to be its part.
Claims (20)
1. an imaging circuit (1,2,3,4,5), comprising:
Semiconductor substrate (10);
Extend to the first vertical trench-gate (12) in described Semiconductor substrate (10) and adjacent the second vertical trench-gate (13);
Grid control circuit (239), be configured to operate the first voltage to be supplied to described first vertical trench-gate (12) in a first mode of operation and the second voltage be supplied to described second vertical trench-gate (13), thus generate the first space charge region photo-generated charge carriers of the first charge carrier type being accelerated to the first current collection contact (32) near described first vertical trench-gate (12), and operate tertiary voltage to be supplied to described first vertical trench-gate (12) in the second mode of operation, thus generate the second space charge area photo-generated charge carriers of described first charge carrier type being accelerated to described first current collection contact (32) near described first vertical trench-gate (12), and
Image processing circuit (235), the photo-generated charge carriers being configured to described first charge carrier type collected based on first current collection contact (32) place described under described first operator scheme determines the range information of object, and determines the colouring information of described object based on the photo-generated charge carriers that described first current collection contacts described first charge carrier type that (32) place collects in the second operation mode.
2. imaging circuit according to claim 1, wherein, described grid control circuit (239) is configured to described first operation mode in the interim very first time described first voltage is supplied to described first vertical trench-gate (12) and described second voltage is supplied to described second vertical trench-gate (13), and described second voltage is supplied to described first vertical trench-gate (12) during second time interval and described first voltage is supplied to described second vertical trench-gate (13).
3. imaging circuit according to claim 2, wherein, described second voltage be supplied to described first vertical trench-gate (12) and described first voltage be supplied to the 3rd space charge region that the photo-generated charge carriers of described first charge carrier type is accelerated to the second current collection contact (33) near described second vertical trench-gate (13) by the generation of described second vertical trench-gate (13).
4. the imaging circuit according to any one in aforementioned claim, wherein, described image processing circuit (235) is also configured to the photo-generated charge carriers of described first charge carrier type additionally collected based on second current collection contact (33) place under described first operator scheme near described second vertical trench-gate (13), determines the described range information of described object.
5. the imaging circuit according to any one in aforementioned claim, wherein, in the second operation mode, the photo-generated charge carriers of the second charge carrier type is accelerated to block contact (36) by described second space charge area, and described piece of contact (36) is connected to described Semiconductor substrate (10).
6. the imaging circuit according to any one in aforementioned claim, wherein, being generated by the electromagnetic wave be concerned about first wave length at least partially in the described photo-generated charge carriers of described first charge carrier type accelerated during described first operator scheme, and wherein, being generated by the electromagnetic wave be concerned about second wave length at least partially in the described photo-generated charge carriers of described first charge carrier type accelerated during described second operator scheme, wherein said be concerned about first wave length and described be concerned about second wave length are different.
7. imaging circuit according to claim 6, wherein, the electromagnetic wave with described be concerned about first wave length is the electromagnetic wave in infrared spectrum.
8. the imaging circuit according to claim 6 or 7, wherein, described grid control circuit (239) is configured to described tertiary voltage is supplied to described first vertical trench-gate (12), to make described second space charge area at least extend in a degree of depth of described Semiconductor substrate (10), the predefined percentage in the photo-generated charge carriers wherein generated by the electromagnetic wave with described be concerned about second wave length or major part generate in described second space charge area.
9. the imaging circuit according to any one in claim 6 to 8, wherein, the electromagnetic wave with described be concerned about second wave length is electromagnetic wave in the visible spectrum.
10. the imaging circuit according to any one in aforementioned claim, wherein, described grid control circuit (239) is configured in the second operation mode, during the 3rd time interval, described tertiary voltage is supplied to described first vertical trench-gate (12) and during the 4th time interval, the 4th voltage is supplied to described first vertical trench-gate (12), wherein said tertiary voltage and described 4th voltage are different.
11. imaging circuits according to any one in aforementioned claim, wherein, described grid control circuit (239) is configured to during the 3rd time interval, described tertiary voltage is supplied to described first vertical trench-gate (12) and described second vertical trench-gate (13) with described second operator scheme, thus generates the other space charge region photo-generated charge carriers of described first charge carrier type being accelerated to the second current collection contact (33) near described second vertical trench-gate (13) further.
12. imaging circuits according to any one in aforementioned claim, wherein, described image processing circuit (235) is configured in the second operation mode, based on the described photo-generated charge carriers of described first charge carrier type generated during described tertiary voltage being supplied to described first vertical trench-gate (12), determine the colouring information of the first colouring information type of described object, and based on the photo-generated charge carriers generated during the 4th voltage being supplied to described first vertical trench-gate (12), determine the colouring information of the second colouring information type of described object.
13. imaging circuits according to any one in aforementioned claim, wherein, described image processing circuit (235) is configured to, based on described range information and described colouring information, generate the view data of the three-dimensional color image of described object.
14. imaging circuits according to any one in aforementioned claim, wherein, described Semiconductor substrate (10) has the doping increased gradually along described first vertical trench-gate (12).
15. imaging circuits according to any one in aforementioned claim, wherein, described first vertical trench-gate (12) is arranged in the first vertical trench (218) and is insulated with described Semiconductor substrate (10) by the insulating barrier (216) of described first vertical trench, and wherein said insulating barrier (216) has incomparable inconsistent stoichiometry.
16. imaging circuits according to any one in aforementioned claim, wherein, described first vertical trench-gate (12) is arranged in the first vertical trench (218) and is insulated with described Semiconductor substrate (10) by the insulating barrier (216) of described first vertical trench, and the thickness of wherein said insulating barrier (216) increases in described Semiconductor substrate (10).
17. imaging circuits according to any one in aforementioned claim, wherein, described first vertical trench-gate (12) and described second vertical trench-gate (13) extend in described Semiconductor substrate (10) and are greater than 5 μm.
18. 1 kinds of imaging circuits (3), comprising:
Semiconductor substrate (10);
Extend to the multiple vertical trench-gate (12,13,14) in described Semiconductor substrate (10), each corresponding vertical trench-gate (12,13,14) has current collection contact (32,33,34) of the correspondence of the photo-generated charge carriers for collecting the first charge carrier type in its vicinity;
Grid control circuit (239), be configured to collection time interim different voltage is supplied in described multiple vertical trench-gate (12,13,14) each, each corresponding vertical trench-gate (12,13,14) generates the additional space charge area being used for the photo-generated charge carriers of described first charge carrier type being accelerated to its corresponding current collection contact (32,33,34); And
Image processing circuit (235), be configured to the colouring information of the multiple colouring information types determining object, the described colouring information of each colouring information type contacts the photo-generated charge carriers of described first charge carrier type that (32,33,34) place collects based on the current collection of each correspondence.
19. imaging circuits according to claim 18, comprise with the array of the vertical trench-gate of vertical trench-gate group tissue, wherein each vertical trench-gate group comprises the multiple vertical trench-gate (12,13,14) providing described different voltage, and wherein said image processing circuit (235) is configured to the described colouring information of the described multiple colouring information types each vertical trench-gate group being determined to described object.
20. 1 kinds for operating the method for imaging circuit, described method comprises:
In the first mode of operation, the first voltage be supplied to the first vertical trench-gate (12) and the second voltage be supplied to the second vertical trench-gate (13) to generate the first space charge region photo-generated charge carriers of the first charge carrier type being accelerated to the first current collection contact (32) near described first vertical trench-gate (12);
In the second mode of operation, tertiary voltage is supplied to described first vertical trench-gate (12) to generate the second space charge area photo-generated charge carriers of described first charge carrier type being accelerated to described first current collection contact (32) near described first vertical trench-gate (12);
Based on the photo-generated charge carriers of described first charge carrier type that first current collection contact (32) place described under described first operator scheme collects, determine the range information of object; And
Based on the photo-generated charge carriers of described first charge carrier type of described first current collection contact (32) place collection in the second operation mode, determine the colouring information of described object.
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| DE102014113037.5 | 2014-09-10 | ||
| DE102014113037.5A DE102014113037B4 (en) | 2014-09-10 | 2014-09-10 | Imaging circuits and a method of operating an imaging circuit |
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| CN105405855B CN105405855B (en) | 2019-01-18 |
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| CN110010629A (en) * | 2017-12-12 | 2019-07-12 | 意法半导体(克洛尔2)公司 | Integrated circuit image sensor cell with a swept gate |
| US12123974B2 (en) | 2018-07-18 | 2024-10-22 | Sony Semiconductor Solutions Corporation | Light-receiving element and distance-measuring module |
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| KR101707747B1 (en) | 2017-02-16 |
| US20160073093A1 (en) | 2016-03-10 |
| US9860518B2 (en) | 2018-01-02 |
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| DE102014113037A1 (en) | 2016-03-10 |
| US10205932B2 (en) | 2019-02-12 |
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| DE102014113037B4 (en) | 2018-02-08 |
| KR20170017984A (en) | 2017-02-15 |
| US20180115767A1 (en) | 2018-04-26 |
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