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CN105304597A - Power Semiconductor Module System and manufacture method thereof - Google Patents

Power Semiconductor Module System and manufacture method thereof Download PDF

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Publication number
CN105304597A
CN105304597A CN201510441188.8A CN201510441188A CN105304597A CN 105304597 A CN105304597 A CN 105304597A CN 201510441188 A CN201510441188 A CN 201510441188A CN 105304597 A CN105304597 A CN 105304597A
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power semiconductor
circuit board
semiconductor module
link
support body
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CN105304597B (en
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R·拜雷尔
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Infineon Technologies AG
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Infineon Technologies AG
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0254High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
    • H05K1/0256Electrical insulation details, e.g. around high voltage areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/07Electric details
    • H05K2201/0753Insulation
    • H05K2201/0761Insulation resistance, e.g. of the surface of the PCB between the conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09036Recesses or grooves in insulating substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10166Transistor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10295Metallic connector elements partly mounted in a hole of the PCB
    • H05K2201/10303Pin-in-hole mounted pins
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306Lead-in-hole components, e.g. affixing or retention before soldering, spacing means

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Combinations Of Printed Boards (AREA)
  • Inverter Devices (AREA)
  • Connector Housings Or Holding Contact Members (AREA)

Abstract

本发明涉及功率半导体模块系统,具有功率半导体模块和电路板。功率半导体模块具有模块壳体、第一和第二连接端组。第一连接端组具有第一电连接端。第二连接端组具有第二电连接端。电路板有第一和第二电极且安装至功率半导体模块,使得在安装的状态下每个第一连接端与第一电极导电连接且每个第二电连接与第二电极导电连接。功率半导体模块系统具有第一和/或第二绝缘支撑体。在为一个第一绝缘支撑体的情况下在未安装的状态下固定至电路板且在安装的状态下设置在第一和第二连接端组之间。在为一个第二绝缘支撑体的情况下在未安装的状态下固定至电路板且在安装的状态下设置在第一和第二连接端组之间的电路板的与功率半导体模块相反的侧上。

The invention relates to a power semiconductor module system with a power semiconductor module and a circuit board. The power semiconductor module has a module housing, a first and a second terminal set. The first connection terminal group has first electrical connection terminals. The second connection terminal group has a second electrical connection terminal. The circuit board has first and second electrodes and is mounted to the power semiconductor module such that in the mounted state each first connection is electrically conductively connected to the first electrode and each second electrical connection is electrically conductively connected to the second electrode. The power semiconductor module system has a first and/or a second insulating carrier. In the case of a first insulating support, it is fixed to the circuit board in the unmounted state and is arranged between the first and second connection terminal groups in the mounted state. In the case of a second insulating carrier fixed to the circuit board in the unmounted state and arranged in the mounted state on the side of the circuit board opposite the power semiconductor module between the first and second connection terminal groups superior.

Description

功率半导体模块系统及其制造方法Power semiconductor module system and manufacturing method thereof

技术领域technical field

本发明涉及具有高的绝缘电阻的功率半导体模块系统及用于制造具有高的绝缘电阻的功率半导体模块系统的方法。The invention relates to a power semiconductor module system with a high insulation resistance and a method for producing a power semiconductor module system with a high insulation resistance.

背景技术Background technique

在功率半导体模块的电连接端之间通常具有非常高的电势差值,这将会带来电压电弧的危险。因此必须具有足够的爬电距离,其最小长度取决于最高出现的电势差和处于多个连接端直线的模块表面的期望的污染等级。原则上来说,在半导体模块之中通过合适的措施来延长爬电距离是已知的,但是将电路板安装至功率半导体模块之上将会引起不允许的高的漏电流或者甚至引起沿着电路板的电压电弧。平面的电路板例如再次缩短了例如在模块上由于沟槽或者台阶而存在的爬电距离。所提及的问题虽然能够在一定程度上通过在电连接端之间的更大的距离来加以克服,但是这将相应地提高在连接至该些电连接端的导线之间的电感,因为至少在连接端区域之内的距离同样必须得以增大。提高了的电感但是首先在快速切换的应用之中例如在变频器之中是优缺点的,这是因为由于强烈的随时间的电流变化将会引起不允许的高的感应电压。There are often very high potential differences between the electrical connections of the power semiconductor modules, which pose a risk of voltage arcing. Sufficient creepage distances must therefore be present, the minimum length of which depends on the highest occurring potential differences and the desired degree of contamination of the surface of the modules lying in line with the connections. Prolonging creepage distances by suitable measures in semiconductor modules is known in principle, but mounting circuit boards on top of power semiconductor modules would cause impermissibly high leakage currents or even lead to plate voltage arc. A planar printed circuit board, for example, again shortens creepage distances that exist, for example, on the modules due to grooves or steps. The mentioned problems can be overcome to a certain extent by a greater distance between the electrical connections, but this will correspondingly increase the inductance between the wires connected to the electrical connections, because at least in the The distance within the area of the connection end must likewise be increased. An increased inductance is however advantageous primarily in fast-switching applications, for example in frequency converters, since impermissibly high induced voltages would result due to strong current changes over time.

发明内容Contents of the invention

本发明的任务在于提供一种功率半导体模块系统以及一种用于制造功率半导体模块装置的方法,借助于它们能够避免沿着安装在所述功率半导体模块之上或者能够安装在所述功率半导体模块之上的电路板的电压电弧和不允许的高的漏电流以及不允许的短的爬电距离。The object of the present invention is to provide a power semiconductor module system and a method for producing a power semiconductor module arrangement, by means of which an installation along the power semiconductor module can be avoided or can be installed on the power semiconductor module Voltage arcing of the circuit boards above and impermissibly high leakage currents as well as impermissibly short creepage distances.

该任务将通过依据本发明的功率半导体模块系统或者通过本发明的用于制造功率半导体模块装置的方法来加以解决。This object is solved by the power semiconductor module system according to the invention or by the method according to the invention for producing a power semiconductor module arrangement.

本发明的设计方案和改进方案为从属权利要求的主题。Developments and developments of the invention are the subject matter of the subclaims.

第一方面涉及一种具有功率半导体模块、第一连接端组、第二连接端组和电路板的功率半导体模块系统。该功率半导体模块具有带有顶侧的模块壳体、带有至少一个第一电连接端的第一连接端组以及带有至少一个第二电连接端的第二连接端组。A first aspect relates to a power semiconductor module system having a power semiconductor module, a first connection group, a second connection group and a printed circuit board. The power semiconductor module has a module housing with a top side, a first terminal group with at least one first electrical connection, and a second connection group with at least one second electrical connection.

只要所述第一连接端组具有至少两个第一电连接端,那么该些第一电连接端将持续地相互电导通地加以连接。相应地,这对于所述第二连接端组同样有效,即只要所述第二连接端组具有至少两个第二电连接端,那么该些第二电连接端将持续地相互电导通地加以连接。As long as the first connecting terminal group has at least two first electrical connecting terminals, these first electrical connecting terminals will be continuously connected to each other in an electrically conductive manner. Correspondingly, this is also valid for the second connection terminal group, that is, as long as the second connection terminal group has at least two second electrical connection terminals, then these second electrical connection terminals will be continuously electrically connected to each other. connect.

具有第一电极和第二电极的所述电路板能够如此地安装至所述功率半导体模块,使得在安装的状态之下所述第一连接端中的每个均与所述第一电极电导通地加以连接并且使得所述第二连接端中的每个均与所述第二电极电导通地加以连接。The circuit board with the first electrode and the second electrode can be mounted to the power semiconductor module in such a way that each of the first connection terminals is in electrical conduction with the first electrode in the mounted state ground and such that each of the second connection terminals is electrically conductively connected with the second electrode.

所述功率半导体模块系统还具有第一绝缘支撑体和/或第二绝缘支撑体。只要存在第一绝缘支撑体,那么该第一绝缘支撑体在未安装的状态之下也固定至所述电路板并且在安装的状态之下设置在所述第一连接端组和所述第二连接端组之间。相应地,只要存在第二绝缘支撑体,那么该第二绝缘支撑体在未安装的状态之下也固定至所述电路板并且在安装的状态之下设置在所述第一连接端组和所述第二连接端组之间设置在所述电路板的与所述功率半导体模块相反的侧之上。The power semiconductor module system also has a first insulating carrier and/or a second insulating carrier. As long as there is a first insulating support body, the first insulating support body is also fixed to the circuit board in the unmounted state and is arranged on the first connection terminal group and the second connection terminal group in the installed state. between groups of connections. Correspondingly, as long as there is a second insulating support body, the second insulating support body is also fixed to the circuit board in the unmounted state and is arranged on the first connection terminal group and the set in the installed state. The second connection terminal group is arranged on the side of the circuit board opposite to the power semiconductor module.

然后,在本发明的范围之中“安装的状态”的意义始终在于当所述电路板如此地固定地安装至所述半导体模块之上时,整个第一连接端与所述第一电极电导通并且整个第二连接端与所述第二电极电导通地加以连接。否则处于“未安装的状态”之下。However, "mounted state" within the scope of the present invention always means that when the circuit board is so fixedly mounted on the semiconductor module, the entire first connection terminal is electrically connected to the first electrode And the entire second connection end is electrically connected to the second electrode. Otherwise it is under "uninstalled state".

第二方面涉及一种用于制造功率半导体模块装置的方法。在此将提供依据第一方面所构造的功率半导体模块系统并且其电路板将如此地安装至功率半导体模块,使得在安装的状态之下所述第一连接端中的每个均与第一电极电导通地连接并且使得所述第二连接端中的每个均与第二电极电导通地连接。A second aspect relates to a method for producing a power semiconductor module arrangement. In this case a power semiconductor module system constructed according to the first aspect is provided and its circuit board is mounted to the power semiconductor module in such a way that in the mounted state each of the first connections is connected to the first electrode electrically conductively connected such that each of the second connection terminals is electrically conductively connected with the second electrode.

附图说明Description of drawings

接下来将参照所附的附图借助于多个实施例来阐述本发明。只要未另加说明,相同的附图标记将描述具有相同的功能的相同或者相似地起作用的元件。将给出以下指示,即在附图的图示之中并非成比例的。其中:In the following the invention will be explained by means of a number of exemplary embodiments with reference to the attached drawings. Unless otherwise stated, the same reference numerals will describe identical or similarly acting elements having the same function. Indication will be given that the illustrations in the drawings are not to scale. in:

图1示出了具有第一连接端组和第二连接端组的功率半导体模块的立体图示;FIG. 1 shows a perspective illustration of a power semiconductor module with a first terminal set and a second terminal set;

图2示出了将设置有两个绝缘支撑体的电路板安装至功率半导体模块之前的功率半导体模块装置的截面图;Fig. 2 shows a cross-sectional view of a power semiconductor module arrangement before a circuit board provided with two insulating supports is mounted to the power semiconductor module;

图3示出了依据图2所示的功率半导体模块的顶视图;FIG. 3 shows a top view of the power semiconductor module shown in FIG. 2;

图4示出了依据图2的功率半导体模块装置在将设置有两个绝缘支撑体的电路板安装至功率半导体模块之后的截面图;FIG. 4 shows a cross-sectional view of the power semiconductor module arrangement according to FIG. 2 after mounting a circuit board provided with two insulating supports to the power semiconductor module;

图5示出了依据图4的功率半导体模块装置的顶视图;FIG. 5 shows a top view of the power semiconductor module arrangement according to FIG. 4;

图6示出了另一个功率半导体模块装置的顶视图,其中,该电路板具有比功率半导体模块更大的宽度;FIG. 6 shows a top view of another power semiconductor module arrangement, wherein the circuit board has a greater width than the power semiconductor module;

图7示出了一种功率半导体模块的顶视图,其中,在模块壳体之中的两个连接端组之间走向的沟槽完全穿过该模块壳体地加以延伸;FIG. 7 shows a top view of a power semiconductor module, wherein a groove running between two terminal groups in the module housing extends completely through the module housing;

图8示出了依据图7的功率半导体模块的侧面图示;FIG. 8 shows a side view of the power semiconductor module according to FIG. 7;

图9示出了具有两个安装至其上的绝缘支撑体的电路板的截面图,该电路板的长度小于该电路板的宽度;Figure 9 shows a cross-sectional view of a circuit board having two insulating supports mounted thereon, the length of the circuit board being less than the width of the circuit board;

图10示出了具有两个安装至其上的绝缘支撑体的电路板的截面图,该电路板的长度相应于该电路板的宽度;Figure 10 shows a cross-sectional view of a circuit board having two insulating supports mounted thereon, the length of the circuit board corresponding to the width of the circuit board;

图11示出了具有两个安装至其上的绝缘支撑体的电路板的截面图,该电路板的长度大于该电路板的宽度;Figure 11 shows a cross-sectional view of a circuit board having two insulating supports mounted thereon, the length of the circuit board being greater than the width of the circuit board;

图12A示出了一个电路板和两个待安装至该电路板的绝缘支撑体的截面图,这两个绝缘支撑体分别具有调整引脚;12A shows a cross-sectional view of a circuit board and two insulating supports to be mounted on the circuit board, the two insulating supports respectively have adjustment pins;

图12B示出了依据图12A的电路板在将绝缘支撑体安装至该电路板之后的截面图,其中,该调整引脚分别嵌入该电路板的调整孔之中;Fig. 12B shows a cross-sectional view of the circuit board according to Fig. 12A after the insulating support is installed on the circuit board, wherein the adjustment pins are respectively embedded in the adjustment holes of the circuit board;

图13A示出了具有绝缘支撑体对的电路板的侧面图示,该绝缘支撑体对具有两个待安装至该电路板的绝缘支撑体,其中一个具有槽并且另一个具有弹簧;13A shows a side view of a circuit board with an insulating support pair having two insulating supports to be mounted to the circuit board, one with a slot and the other with a spring;

图13B示出了依据图13A的一部分,依据其该绝缘支撑体对的绝缘支撑体如此地安装至该电路板,使得该弹簧嵌入槽之中;Figure 13B shows a part according to Figure 13A according to which the insulating supports of the pair of insulating supports are mounted to the circuit board such that the springs are embedded in the grooves;

图14A示出了两个相互移动地加以连接的绝缘支撑体在一种状态之下的侧面图示,在该状态之下它们形成环形的闭合的单元;Figure 14A shows a side view of two insulating supports connected to each other movably in a state where they form an annular closed unit;

图14B示出了依据图14A的绝缘支撑体在展开的状态之下;FIG. 14B shows the insulating support according to FIG. 14A in an unfolded state;

图14C示出了依据图14B的绝缘支撑体插入电路板之后;Fig. 14C shows after the insulating support body according to Fig. 14B is inserted into the circuit board;

图14D示出了依据图14C的绝缘支撑体在将该绝缘支撑体闭合至环形闭合环绕该电路板的单元之后;FIG. 14D shows the insulating support according to FIG. 14C after closing the insulating support to a ring-shaped closure around the unit of the circuit board;

图15A示出了两个相关联的形成被构造为闭合的环的绝缘支撑体的侧面图示;Figure 15A shows a side view of two associated insulating supports forming a closed ring;

图15B示出了依据图15A的单元如此地移动至电路板之上从而使得其环形地环绕该电路板之后的电路板的截面图;Figure 15B shows a cross-sectional view of the circuit board after the unit according to Figure 15A has been moved onto the circuit board such that it loops around the circuit board;

图16示出了具有两个绝缘支撑体对的电路板的一段的立体图示,这两个绝缘支撑体对中的每个相应于依据图15B的绝缘支撑体对地安装至该电路板之上;FIG. 16 shows a perspective illustration of a section of a circuit board with two pairs of insulating supports, each of which corresponds to the pair of insulating supports according to FIG. 15B mounted to the circuit board. superior;

图17示出了具有三个相邻地加以设置的连接端组的半导体模块的一段的立体图示,其中,分别位于两个相邻的连接端组之间的该模块壳体具有用于容纳绝缘支撑体的沟槽;17 shows a perspective illustration of a section of a semiconductor module with three adjacently arranged terminal groups, wherein the module housing respectively located between two adjacent terminal groups has a grooves of the insulating support;

图18A示出了穿过在将设置有至少一个绝缘支撑体的电路板安装至半导体模块期间的功率半导体模块系统的截面图;18A shows a cross-sectional view through the power semiconductor module system during mounting of a circuit board provided with at least one insulating support to the semiconductor module;

图18B示出了在安装之后依据图18A地加以构造的功率半导体模块装置,其中,绝缘支撑体嵌入模块壳体的沟槽之中;FIG. 18B shows a power semiconductor module arrangement configured according to FIG. 18A after assembly, wherein the insulating carrier engages in a groove of the module housing;

图19示出了穿过功率半导体模块装置的截面图,其中,该电路板仅仅在其与半导体模块相对的侧之上才设置有绝缘支撑体;19 shows a sectional view through a power semiconductor module arrangement, wherein the circuit board is only provided with an insulating carrier on its side opposite to the semiconductor modules;

图20示出了穿过功率半导体模块装置的截面图,其中,电路板仅仅在其与半导体模块相邻的侧之上才设置有绝缘支撑体,而另一个绝缘支撑体被构造在该模块壳体的与该电路板相对的侧之上;20 shows a sectional view through a power semiconductor module arrangement, wherein the circuit board is only provided with an insulating carrier on its side adjacent to the semiconductor modules, while a further insulating carrier is formed on the module housing on the side of the body opposite the circuit board;

图21示出了具有在其上安装有设置有绝缘支撑体的电路板的功率半导体模块的功率半导体模块装置的立体图示;21 shows a perspective illustration of a power semiconductor module arrangement with a power semiconductor module on which a circuit board provided with an insulating support is mounted;

图22示出了依据图4的功率半导体模块装置的放大的一段。FIG. 22 shows an enlarged section of the power semiconductor module arrangement according to FIG. 4 .

具体实施方式detailed description

图1示出了一种具有模块壳体50的功率半导体模块100。该模块壳体50能够任意地加以设计。其能够尤其是由电绝缘的材料加以组成,例如由塑料组成。该模块壳体50能够一整块地加以构造或者也能够由两个或者多个壳体部分组装而成。在所示出的示例之中,该模块壳体50具有环形的壳体框架51,在该壳体框架之上装配有壳体盖52。在这种情况下,该模块壳体50具有顶侧50t,在该顶侧之上分别具有一个或者多个电连接端1、2或3的多个连接端组10、20、30裸露在该模块壳体50之外。FIG. 1 shows a power semiconductor module 100 with a module housing 50 . The module housing 50 can be designed arbitrarily. It can consist in particular of an electrically insulating material, for example of plastic. The module housing 50 can be constructed in one piece or can also be assembled from two or more housing parts. In the example shown, the module housing 50 has an annular housing frame 51 on which a housing cover 52 is fitted. In this case, the module housing 50 has a top side 50t on which a plurality of terminal groups 10 , 20 , 30 with one or more electrical connections 1 , 2 or 3 respectively are exposed on the top side. Outside the module housing 50 .

在每个连接端组10、20、30中的每个之中,所属的电连接端1、2或3例如通过在该模块壳体50内部的电连接导线而持续地相互电连接。第一连接端组10也含有一个或者至少两个第一电连接端1。在为至少两个第一电连接端1的情况下,它们相互之间持续地电连接。相应地,第二连接端组20也含有一个或者至少两个第二电连接端2,它们也相互之间持续地电连接,并且第三连接端组30也含有一个或者至少两个第三电连接端3,它们在为至少两个第三电连接端3的情况下也相互之间持续地电连接。In each of the terminal groups 10 , 20 , 30 , the associated electrical terminals 1 , 2 or 3 are permanently electrically connected to one another, for example via electrical connecting lines inside the module housing 50 . The first connection terminal group 10 also includes one or at least two first electrical connection terminals 1 . In the case of at least two first electrical connection terminals 1 , they are continuously electrically connected to each other. Correspondingly, the second connection terminal group 20 also contains one or at least two second electrical connection terminals 2, which are also continuously electrically connected to each other, and the third connection terminal group 30 also contains one or at least two third electrical connection terminals 2. Connections 3 which, in the case of at least two third electrical connections 3 , are also permanently electrically connected to one another.

原则上来说,功率半导体模块100具有至少两个连接端组10、20、30。在这些连接端组10、20、30中的两个之间—在当前的功率半导体模块100之中仅仅示例性地为连接端组10和20—该模块壳体50具有可选的沟槽55,该沟槽在这些连接端组10和20之间由该顶侧50t出发进入模块壳体50之中。相应的沟槽能够可选地也存在于连接端组20和30之间。这将尤其是在以下情况,即当连接端组10和30和/或20和30紧邻时非常重要,这是因为在所有三个连接端组10、20和30之间的漏感应当非常小。In principle, the power semiconductor module 100 has at least two terminal groups 10 , 20 , 30 . Between two of these terminal groups 10 , 20 , 30 —in the current power semiconductor module 100 only by way of example connection terminal groups 10 and 20 —the module housing 50 has an optional groove 55 , the groove proceeds from the top side 50 t into the module housing 50 between the terminal groups 10 and 20 . Corresponding grooves can optionally also be present between the terminal groups 20 and 30 . This will be especially important when the terminal sets 10 and 30 and/or 20 and 30 are in close proximity, since the leakage inductance between all three terminal sets 10, 20 and 30 should be very small .

图2示出了该功率半导体模块装置在将设置有两个绝缘支撑体11、12的电路板200安装至该功率半导体模块100之上之前的截面图。FIG. 2 shows a cross-sectional view of the power semiconductor module arrangement before mounting a circuit board 200 provided with two insulating supports 11 , 12 onto the power semiconductor module 100 .

该截面图穿过功率半导体模块100,其为此仅仅是示例性地未示出在模块壳体50内部的部件。该模块壳体50的阴影线仅仅为了说明之用,表明其为截面图。其中,该截面穿过沟槽55以及穿过电连接端1、2和3并且穿过电路板300以及安装至其上的绝缘支撑体11和12。The sectional view goes through the power semiconductor module 100 , which for this purpose is only an example of a component not shown inside the module housing 50 . The hatching of the module housing 50 is for illustrative purposes only, showing that it is a cross-sectional view. Wherein, the section passes through the groove 55 and through the electrical connection terminals 1 , 2 and 3 and through the circuit board 300 and the insulating supports 11 and 12 mounted thereon.

在具有介电的绝缘载体230、第一电极210和第二电极220的电路板200之上固定有两个介电的绝缘支撑体11和12之中的至少一个并且在将电路板200安装至功率半导体模块100之上之前已经固定。第一电极210和第二电极220也通过介电的绝缘载体230相互电绝缘。第一电极210和第二电极220能够例如完全地或者至少大部分地被构造为平的金属膜。它们能够相互平行地加以走向。例如,电路板200能够为波导的,其中,第一电极110和第二电极220基本上被构造为平行的金属膜,它们与绝缘载体230平面地并且材料决定地加以连接(例如被构造为平行板波导)。为了达到较小的电阻的目的,该电极110、220能够例如完全地或者大部分地由铜组成,其他的导电的材料也能够同样地加以使用。作为电路板200将尤其是也能够理解为这样的装置,其中第一电极210和第二电极220被构造为通用总线(“busbars”)。At least one of the two dielectric insulating supports 11 and 12 is fixed on the circuit board 200 having the dielectric insulating carrier 230, the first electrode 210 and the second electrode 220, and the circuit board 200 is mounted on The top of the power semiconductor module 100 has previously been fixed. The first electrode 210 and the second electrode 220 are also electrically insulated from each other by a dielectric insulating carrier 230 . The first electrode 210 and the second electrode 220 can be designed, for example, completely or at least largely as flat metal films. They can be run parallel to each other. For example, the circuit board 200 can be a waveguide, wherein the first electrode 110 and the second electrode 220 are basically formed as parallel metal foils, which are connected planarly and materially to the insulating carrier 230 (for example, formed in parallel plate waveguide). In order to achieve a lower electrical resistance, the electrodes 110 , 220 can, for example, consist entirely or largely of copper, and other electrically conductive materials can likewise be used. A printed circuit board 200 is to be understood in particular as a device in which the first electrode 210 and the second electrode 220 are designed as universal buses (“busbars”).

如在图2之中所示出的那样一样,电路板200在其与功率半导体模块100相反的面之上可选地也具有电绝缘的覆盖层240,其例如具有绝缘漆、绝缘膜等。As shown in FIG. 2 , circuit board 200 optionally also has an electrically insulating cover layer 240 , for example with insulating varnish, insulating film, etc., on its side opposite power semiconductor module 100 .

在安装的状态之下,在没有绝缘支撑体11、12的情况下,在电路板200之上从只要其裸露在过孔201(之上或者之下)的第一电极210和从只要其裸露在过孔2012之上或者之下)的第二电极220形成爬电距离。该爬电距离通常比在功率半导体模块100之上的连接端的自由的距离要短,这是由于该模块连接端1、2、3还能够从裸露的壳或者在电路板200和焊孔之中的过孔接触围绕电路板200的两侧。当在安装的状态之下在连接端组10、20、30之间的爬电距离是重要的,那么所涉及的陈述存在于爬电距离、包括与所涉及的连接端组10、20、30电连接的壳、过孔接触和焊孔的相应的连接端组10、20、30之间的爬电距离(以及存在的壳、过孔接触和焊孔)。In the installed state, in the absence of insulating supports 11, 12, on the circuit board 200, as long as it is exposed on the first electrode 210 of the via hole 201 (above or below) and as long as it is exposed The second electrode 220 above or below the via hole 2012 forms a creepage distance. This creepage distance is generally shorter than the free distance of the connections above the power semiconductor module 100, since the module connections 1, 2, 3 can also be removed from the bare housing or in the circuit board 200 and solder holes. The via contacts surround the two sides of the circuit board 200 . When the creepage distances between the terminal sets 10, 20, 30 in the installed state are important, then the statement in question exists on the creepage distances, including those associated with the terminal sets 10, 20, 30 Creepage distances between the corresponding terminal groups 10 , 20 , 30 of electrically connected housings, via contacts and solder holes (and the existing housings, via contacts and solder holes).

图3示出了依据图2的功率半导体模块之上的顶视图。在此能够看出在每个连接端组10、20或30之中的电连接端1、2、3可选地一列地相继设置并且在这种情况下至少两个连接端组10、20、30的一列的电连接端1、2、3相互平行地加以走向。FIG. 3 shows a top view over the power semiconductor module according to FIG. 2 . It can be seen here that the electrical terminals 1 , 2 , 3 in each terminal group 10 , 20 or 30 are optionally arranged one behind the other in a row and in this case at least two terminal groups 10 , 20 , The electrical connections 1 , 2 , 3 of a row 30 run parallel to one another.

此外能够看出,在其走向方向r之上的沟槽55至少在在其间该沟槽走向的连接端组10和20的一列的长度之上加以延伸。Furthermore, it can be seen that the groove 55 in its direction of progression r extends at least over the length of a row of terminal groups 10 and 20 between which it runs.

图3此外能够看出,该沟槽55能够可选地具有穿过该模块壳体地加以形成的环形的闭合的侧壁55w。FIG. 3 also shows that the groove 55 can optionally have an annular closed side wall 55w formed through the module housing.

图4示出了功率半导体模块装置400,其存在于装备有至少两个绝缘支撑体11、12的电路板200安装至功率半导体模块100。只要其中第一绝缘支撑体11存在,其安装在该电路板200的与该功率半导体模块100相对的侧之上,那么该绝缘支撑体安装在相应的连接端组10、20之间,在这些连接端组之间也有沟槽55并且嵌入在该沟槽55之中。倘若该沟槽55其中具有环形闭合的侧壁55w,那么该侧壁55w环形地围绕第一绝缘支撑体11。其中只要存在第二绝缘支撑体12,其安装在该电路板200的与该功率半导体模块100相反的侧之上,那么该第二绝缘支撑体设置在连接端组10和20之间。FIG. 4 shows a power semiconductor module arrangement 400 , which consists in mounting a circuit board 200 equipped with at least two insulating supports 11 , 12 to a power semiconductor module 100 . Wherever a first insulating support 11 is present, which is mounted on the side of the circuit board 200 opposite to the power semiconductor module 100 , this insulating support is mounted between the corresponding terminal groups 10 , 20 , between these There is also a groove 55 between the terminal groups and is embedded in this groove 55 . If the trench 55 has an annular closed side wall 55 w therein, the side wall 55 w annularly surrounds the first insulating carrier 11 . In so far as a second insulating carrier 12 is present, which is mounted on the side of the printed circuit board 200 opposite to the power semiconductor module 100 , the second insulating carrier is arranged between the terminal groups 10 and 20 .

在安装的状态之下,第一绝缘支撑体11和第二绝缘支撑体12只要它们存在也设置在第一连接端组10和第二连接端组20之间,这将影响在第一连接端组10和第二连接端组20之间的爬电距离延长。In the installed state, the first insulating support body 11 and the second insulating support body 12 are also arranged between the first connection terminal group 10 and the second connection terminal group 20 as long as they exist, which will affect the The creepage distance between the group 10 and the second terminal group 20 is extended.

绝缘支撑体11、12安装至电路板200的类型基本上是任意类型的。它们能够例如粘合、附接、压接、螺接或者啮合至电路板200。可选地,能够总是存在一种具有电绝缘粘合胶的粘合,例如硅胶,其能够完全密封在所涉及的绝缘支撑体11、12和电路板200之间的一列,以便避免漏电流,该漏电流否则在第一连接端组10和第二连接端组20之间通过该列来加以构造。The type of mounting of the insulating supports 11 , 12 to the circuit board 200 is basically any type. They can eg be glued, attached, crimped, screwed or engaged to the circuit board 200 . Alternatively, there can always be a bond with an electrically insulating adhesive, such as silicone, which can completely seal a row between the insulating supports 11, 12 and the circuit board 200 involved, in order to avoid leakage currents , the leakage current is otherwise formed between the first terminal group 10 and the second terminal group 20 through the column.

如借助于图2和图4此外能够看到的是安装至电路板200的绝缘支撑体11、12在其余电路板200相对的侧之上可选地具有轮缘111或121,以便放大相应的粘合面。As can also be seen with the aid of FIGS. 2 and 4 , the insulating supports 11 , 12 mounted to the circuit board 200 optionally have a rim 111 or 121 on the opposite side of the remaining circuit board 200 in order to enlarge the corresponding Adhesive side.

在将电路板200安装至功率半导体模块100时,第一电连接端1在这种情况下与第一电极210导电接触并且第二电连接端2与第二电极220导电接触。When mounting the circuit board 200 to the power semiconductor module 100 , the first electrical connection 1 is in this case in conductive contact with the first electrode 210 and the second electrical connection 2 is in conductive contact with the second electrode 220 .

在本发明的示例之中,在图2中仅仅示例性地示出了电连接端1、2和3,其作为依据DIN41611-9:1987-12的“无焊料的电连接、没有剥离绕组连接;概念、特征值、要求、检验”的所谓的压入连接端(“Press-Fit”),或者依据DINEN(IEC)60352-5,2008-11:“无焊料的连接-部分5:压接连接-通用要求、检验方法和应用指南(IEC60352-5:2008)”,这两个均包含在柏林的Beuth出版社有限公司的出版物之中。In the example of the present invention, only the electrical connections 1, 2 and 3 are shown schematically in FIG. 2 as "solderless electrical connection, without stripped winding connection ; concept, characteristic value, requirements, inspection" of the so-called press-fit connection end ("Press-Fit"), or according to DINEN (IEC) 60352-5, 2008-11: "Connection without solder - Part 5: Press-fit Connections - General requirements, test methods and guidelines for application (IEC60352-5:2008)", both contained in the publication of Beuth Verlag GmbH, Berlin.

替代于压接接触,电连接端1、2、3也能够被构造为焊接连接端,其中,在安装的状态之下该电路板200在功率半导体模块100处使得第一电连接端1与第一电极210焊接或者第二电连接端2与第二电极220焊接。Instead of crimp contacts, the electrical connections 1 , 2 , 3 can also be configured as solder connections, wherein in the mounted state the circuit board 200 is on the power semiconductor module 100 such that the first electrical connection 1 is connected to the second An electrode 210 is welded or the second electrical connection end 2 is welded to the second electrode 220 .

同样地,电连接端1、2、3也能够被构造为烧焊连接端,其中,在安装的状态之下该电路板200在功率半导体模块100处使得第一电连接端1与第一电极210烧焊或者第二电连接端2与第二电极220烧焊。Likewise, the electrical connections 1 , 2 , 3 can also be configured as solder connections, wherein, in the installed state, the circuit board 200 is at the power semiconductor module 100 such that the first electrical connection 1 is connected to the first electrode. 210 is welded or the second electrical connection end 2 is welded to the second electrode 220 .

此外,这些电连接端1、2、3也能够被构造为螺栓连接端,其中,在安装的状态之下在安装的状态之下该电路板200在功率半导体模块100处使得第一电连接端1与第一电极210螺栓连接或者第二电连接端2与第二电极220螺栓连接。Furthermore, the electrical connections 1 , 2 , 3 can also be designed as screw connections, wherein in the installed state the printed circuit board 200 is on the power semiconductor module 100 such that the first electrical connection 1 is connected to the first electrode 210 by bolts or the second electrical connection end 2 is connected to the second electrode 220 by bolts.

此外,电连接端1、2、3也能够被构造为弹簧接触,其中,在安装的状态之下在安装的状态之下该电路板200在功率半导体模块100处使得第一电连接端1弹性地并且在构造电通孔接触连接的情况下压接第一电极210或者第二电连接端2弹性地并且在构造电通孔接触连接的情况下压接第二电极220。Furthermore, the electrical connections 1 , 2 , 3 can also be configured as spring contacts, wherein the printed circuit board 200 makes the first electrical connection 1 elastic on the power semiconductor module 100 in the installed state. The first electrode 210 is crimped to ground and in the case of forming an electrical through-hole contact connection, or the second electrical connection 2 is crimped to the second electrode 220 elastically and in the case of forming an electrical through-hole contact connection.

图5示出了依据图4的功率半导体模块装置400的顶视图。如借助于图4和图5所看出的那样,在安装的状态之下与电极210和220电连接的电连接端1或2的一段位于该电路板200与功率半导体模块100相反的侧之上。同样地以下情况也是可能的,即电连接端1和2也能够在安装的状态之下完全地设置在该电路板200的与功率半导体模块100相对的侧之上或者至少不在该电路板200与功率半导体模块100相反的侧之上延伸出去。FIG. 5 shows a top view of the power semiconductor module arrangement 400 according to FIG. 4 . As can be seen with the aid of FIGS. 4 and 5 , a section of the electrical connection 1 or 2 which is electrically connected to the electrodes 210 and 220 in the assembled state is located on the side of the printed circuit board 200 opposite to the power semiconductor module 100 superior. It is likewise possible that the electrical connections 1 and 2 can also be arranged completely on the side of the printed circuit board 200 opposite the power semiconductor module 100 in the mounted state or at least not on the printed circuit board 200 in relation to the power semiconductor module 100. The power semiconductor module 100 extends over the opposite side.

如同样由图5所看出的那样,该电路板200能够在安装的状态之下在沟槽55的走向方向之上(参见图3)至少在沟槽55的范围之内具有比电路板200更大的或者如图6所示的那样更小的宽度。同样地,该电路板200在安装的状态之下在沟槽55的走向方向之上至少在沟槽55的范围之内具有与功率半导体模块100同样的宽度。As can also be seen from FIG. 5 , the circuit board 200 can, in the mounted state, have a greater thickness than the circuit board 200 at least within the scope of the groove 55 in the direction of the groove 55 (see FIG. 3 ). larger or smaller widths as shown in Figure 6. Likewise, in the installed state, the printed circuit board 200 has the same width as the power semiconductor module 100 above the direction of progression of the groove 55 , at least in the area of the groove 55 .

图7示出了功率半导体模块100的顶视图,其与依据图3的功率半导体模块100仅仅具有以下区别,即该沟槽55在其走向方向之上完全穿过模块壳体50地加以延伸。该沟槽55也将再次沿着其走向方向r地由模块壳体50加以限制。图8示出了依据图7的半导体模块的侧视图。FIG. 7 shows a top view of a power semiconductor module 100 which differs from the power semiconductor module 100 according to FIG. 3 only in that the groove 55 extends completely through the module housing 50 in its direction of progression. This groove 55 is again bounded by the module housing 50 along its direction of progression r. FIG. 8 shows a side view of the semiconductor module according to FIG. 7 .

此外如在图9、10和11之中所示出的那样,绝缘支撑体11、12在其走向方向之上具有小于电路板200的宽度的涨肚,从而使得电路板200超过(图9)绝缘支撑体11、12,或者与电路板200的宽度一样,从而使得绝缘支撑体11、12在其两个相对的末端处与电路板200平齐(图10),或者比电路板200的宽度要大,从而使得绝缘支撑体11、12超过电路板200。Furthermore, as shown in FIGS. 9 , 10 and 11 , the insulating supports 11 , 12 have a bulge in the direction of their orientation that is smaller than the width of the circuit board 200 , so that the circuit board 200 exceeds ( FIG. 9 ) The insulating supports 11, 12 are either as wide as the circuit board 200, so that the insulating supports 11, 12 are flush with the circuit board 200 at their two opposite ends (Fig. 10), or are wider than the width of the circuit board 200. be large so that the insulating supports 11 , 12 exceed the circuit board 200 .

依据借助于图12A和12B所示出的那样,可选地,在一个或者两个绝缘支撑体11、12(只要存在)时,第一绝缘支撑体11具有第一调整引脚112并且第二绝缘支撑体12具有第二调整引脚122,它们在将所涉及的绝缘支撑体11、12固定至电路板200之后分别嵌入该电路板200的相应的调整孔212或者222之中。图12A和图12B示出了绝缘支撑体11和12在固定至电路板200之前和之后的图示。明显地,此类的嵌入至电路板200的调整孔212、222之中的绝缘支撑体11、12的调整引脚也能够在存在绝缘支撑体11、12之一时实现。12A and 12B, optionally, when one or two insulating supports 11, 12 (as long as they exist), the first insulating support 11 has a first adjustment pin 112 and a second The insulating support 12 has second adjustment pins 122 , which are inserted into corresponding adjustment holes 212 or 222 of the circuit board 200 after the insulating support 11 , 12 is fixed to the circuit board 200 . 12A and 12B show illustrations of the insulating supports 11 and 12 before and after being fixed to the circuit board 200 . Obviously, such adjustment pins of the insulating supports 11 , 12 embedded in the adjusting holes 212 , 222 of the circuit board 200 can also be realized when one of the insulating supports 11 , 12 exists.

只要第一和第二绝缘支撑体11和12存在,那么其中任意一个具有槽116并且另一个具有弹簧126,其在将两个绝缘支撑体11和12固定至电路板200之后嵌入槽116之中,这将由图13A和图13B加以示出,电路板200在固定至绝缘支撑体11和12之前和之后。As long as the first and second insulating supports 11 and 12 exist, either one of them has a groove 116 and the other has a spring 126 which is embedded in the groove 116 after fixing the two insulating supports 11 and 12 to the circuit board 200 , which will be illustrated by FIGS. 13A and 13B , before and after the circuit board 200 is fixed to the insulating supports 11 and 12 .

依据另一个选项,第一绝缘支撑体11和第二绝缘支撑体12能够被构造为相关联的单元,其例如在图14A之中加以示出,该单元你那个具有合页15,通过其该绝缘支撑体11和12在安装至电路板200之前相互相对运动。为此,绝缘支撑体11和12例如由单一的材料例如塑料组成并且一体成型。在这样的情况下,该单元能够以简单的方式通过浇筑或者注塑来制造。合页15由该单元的切割面来组成,通过该切割面在绝缘支撑体11、12之间形成狭窄的弹性的连接网16,鉴于该单一的材料的弹性的缘故能够承担该合页的功能。According to another option, the first insulating support body 11 and the second insulating support body 12 can be configured as an associated unit, which is shown, for example, in FIG. The insulating supports 11 and 12 move relative to each other before being mounted on the circuit board 200 . For this purpose, the insulating supports 11 and 12 consist, for example, of a single material, such as plastic, and are integrally formed. In such a case, the unit can be produced in a simple manner by casting or injection moulding. The hinge 15 consists of the cut surfaces of the unit, through which a narrow elastic connecting web 16 is formed between the insulating supports 11, 12, capable of taking over the function of the hinge due to the elasticity of the single material .

图14B示出了依据图14A的单元在折叠的状态之下,从而使得该电路板200嵌入该单元之中,这将在图14C之中加以示出。可选地,能够由第一和第二绝缘支撑体11、12具有任意一个引脚,其根据嵌入在其中构造另一个绝缘支撑体11、12的开口的折叠来构造。其中,该引脚125可选地相对于该开口具有过量并且压入该开口之中,从而使得在该绝缘支撑体11、12的自由端之间形成材料决定的连接。Fig. 14B shows the unit according to Fig. 14A in a folded state so that the circuit board 200 is embedded in the unit, which will be shown in Fig. 14C. Alternatively, it is possible for the first and the second insulating support body 11 , 12 to have any one of the pins, which are configured according to a fold embedded in an opening in which the other insulating support body 11 , 12 is formed. In this case, the pin 125 optionally has an excess relative to the opening and is pressed into the opening so that a material-dependent connection is formed between the free ends of the insulating supports 11 , 12 .

同样地,在任意一个绝缘支撑体11、12的自由端处构造一个抓钩,其在与另一个绝缘支撑体11、12的自由端折叠时抓接。Likewise, at the free end of any one insulating support body 11 , 12 , a gripping hook is formed, which catches when being folded with the free end of the other insulating support body 11 , 12 .

在折叠之后,该单元与两个绝缘支撑体11和12形成一个环,该环环形地围绕该电路板200,其在图14D之中加以示出。该环能够如所示出的那样一体地加以构造,但是能够包含多个部分。After folding, the unit and the two insulating supports 11 and 12 form a ring that annularly surrounds the circuit board 200 , which is shown in FIG. 14D . The ring can be integrally constructed as shown, but can comprise multiple parts.

依据另一个在图15A之中示出的变型,具有第一绝缘支撑体11和第二绝缘支撑体12的单元能够被构造为闭合的环,其在电路板200安装至功率半导体100之前移动至该电路板200之上。图15B示出了移动至该电路板200之上的单元。According to another variant shown in FIG. 15A , the unit with the first insulating carrier 11 and the second insulating carrier 12 can be configured as a closed ring, which is moved to the on the circuit board 200 . FIG. 15B shows the unit moved onto the circuit board 200 .

此外借助于图16示出了能够在电路板200之上存在多个连接端组10、20、30,它们之中在两个不同的对的连接端组10、20、30在此在两个连接端组10和20以及在连接端组20和30之间分别设置有至少一个绝缘支撑体11-1、12-1或者11-2、12-2,如先前所描述的那样。在图16之中所示出的那样实现了将绝缘支撑体11-1、12-1或者11-2、12-2固定至电路板200,其仅仅是示例性的依据图13A和图13B。同样地,也能够选择所有其他所阐述过的变型。Furthermore, FIG. 16 shows that a plurality of terminal groups 10 , 20 , 30 can be present on the circuit board 200 , of which the terminal groups 10 , 20 , 30 are in two different pairs here on two At least one insulating support 11 - 1 , 12 - 1 or 11 - 2 , 12 - 2 is arranged respectively between the terminal groups 10 and 20 and between the terminal groups 20 and 30 , as previously described. Fixing the insulating support 11 - 1 , 12 - 1 or 11 - 2 , 12 - 2 to the circuit board 200 is achieved as shown in FIG. 16 , which is only exemplary in accordance with FIGS. 13A and 13B . Likewise, all other variants described can also be selected.

相应地,所属的半导体模块100然后也能够具有两个沟槽55-1和55-2,它们之中的一个(55-1)在两个连接端组10和20之间并且另一个(55-2)在两个连接端组20和30之间设置,如在图17之中所示出的那样。Correspondingly, the associated semiconductor module 100 can then also have two trenches 55 - 1 and 55 - 2 , one of which ( 55 - 1 ) is between the two terminal groups 10 and 20 and the other ( 55 - 1 ) -2) Arranged between two connection terminal groups 20 and 30 as shown in FIG. 17 .

图18A和18B也示出了依据图15B的具有至少一个第一绝缘支撑体11的示例的电路板200,如第一绝缘支撑体11在将电路板200安装至功率半导体模块100之上时正好落入沟槽55之内。FIGS. 18A and 18B also show an exemplary circuit board 200 according to FIG. 15B with at least one first insulating support 11 , such that the first insulating support 11 is just right when the circuit board 200 is mounted on the power semiconductor module 100 into the groove 55.

如由依据图19所示出的示例能够看出的那样,在两个连接端组10和20之间仅仅能够引入一个第一绝缘支撑体11,其在将电路板200安装至功率半导体模块100之前已经固定至电路板200并且其在将电路板200安装至功率半导体模块100之上之后落入该电路板200与功率半导体模块200相对的侧之上并且落入沟槽55之中。As can be seen from the example shown in FIG. 19 , only one first insulating carrier 11 can be introduced between the two terminal groups 10 and 20 , which is important when mounting the circuit board 200 to the power semiconductor module 100 . It has been fixed to the circuit board 200 before and it falls onto the side of the circuit board 200 opposite the power semiconductor module 200 and into the groove 55 after mounting the circuit board 200 onto the power semiconductor module 100 .

与依据图19所示的功率半导体模块装置400无关地,电连接端1、2和3并非构造为压入连接端并且相应地并未通过电路板200来引入,取而代之地它们分别接触在该电路板200的与功率半导体模块100相对的底侧之上电极210或220之中的一个。为了进一步布线该电极220该电路板200能够例如具有通孔接触。Regardless of the power semiconductor module arrangement 400 shown in FIG. 19 , the electrical connections 1 , 2 and 3 are not designed as press-in connections and are correspondingly not introduced through the printed circuit board 200 , but instead they are respectively contacted on the circuit board 200 . One of the electrodes 210 or 220 is on the bottom side of the board 200 opposite to the power semiconductor module 100 . For further wiring of the electrodes 220 the circuit board 200 can have via contacts, for example.

还依据另一个借助于图20所阐述的变型,在两个连接端组10和20之间仅仅能够引入一个第二绝缘支撑体,其在将电路板200安装至功率半导体模块100之前已经固定至电路板200并且其在将电路板200安装至功率半导体模块100之后处于该电路板200与功率半导体模块200相反的侧之上。According to yet another variant explained with the aid of FIG. 20 , only a second insulating support can be introduced between the two terminal groups 10 and 20 , which has already been fixed to the The circuit board 200 and it is on the side of the circuit board 200 opposite to the power semiconductor module 200 after mounting the circuit board 200 to the power semiconductor module 100 .

在此类的设计之中,电绝缘的第三绝缘支撑体13能够存在,其被构造为模块壳体50的组成部分或者与该模块壳体50相连接,并且在第一连接端组10和第二连接端组20之间加以设置。在将电路板200安装至功率半导体模块100之上以后,第三绝缘支撑体13处于该电路板200与功率半导体模块100相对的侧之上和/或与其借助于粘合剂相互粘合,该粘合剂完全地密封在第三绝缘支撑体13和电路板200之间的一列。In a design of this type, an electrically insulating third insulating carrier 13 can be present, which is formed as a component of the module housing 50 or is connected to it and is connected between the first terminal group 10 and the Set between the second connection terminal groups 20 . After mounting the circuit board 200 on the power semiconductor module 100, the third insulating carrier 13 is located on the side of the circuit board 200 opposite to the power semiconductor module 100 and/or is bonded to one another by means of an adhesive, which The adhesive completely seals a column between the third insulating support 13 and the circuit board 200 .

图21示出了具有功率半导体模块100的功率半导体模块装置400的整体示图,在该功率半导体模块之上安装有电路板200,在该电路板之上在安装至功率半导体模块100之前固定有至少一个绝缘支撑体11-1、11-2、12-1、12-2。可选地,该电路板200能够通过一个或者多个连接装置例如通过螺栓而与功率半导体模块100相连接。21 shows an overall view of a power semiconductor module arrangement 400 with a power semiconductor module 100 on which is mounted a circuit board 200 on which a At least one insulating support 11-1, 11-2, 12-1, 12-2. Optionally, the circuit board 200 can be connected to the power semiconductor module 100 by one or more connection means, for example by screws.

依据另一个选项,在功率半导体模块100之上在与电路板200相反的侧之上还安装有散热体300。功率半导体模块100固定至散热体300能够同样以任意的方式例如通过螺栓来实现。According to another option, a heat sink 300 is also mounted on the power semiconductor module 100 on the side opposite to the circuit board 200 . The fastening of the power semiconductor modules 100 to the cooling body 300 can likewise be effected in any desired manner, for example by means of screws.

电路板200的设计原则上能够是任意形式的,其能够例如被构造为印刷电路板或者被构造为叠层母线,在其中两个电极210和220相互电绝缘叠加成一个组合物。The design of the circuit board 200 can in principle be of any desired form, and it can be designed, for example, as a printed circuit board or as a laminated busbar, in which the two electrodes 210 and 220 are superimposed electrically insulated from one another to form a composite.

在模块壳体50的内部能够具有至少一个功率半导体构件,例如MOSFET、IGBT、JFET、半导体闸流管、二极管或者任意其他的功率器件。该半导体模块100能够在使用至少一个功率半导体构件的情况下含有受控的半导体开关、半桥、两个半桥(例如H桥)、三个半桥或者任意其他的配置。Inside the module housing 50 there can be at least one power semiconductor component, for example a MOSFET, IGBT, JFET, thyristor, diode or any other power component. Using at least one power semiconductor component, the semiconductor module 100 can contain controlled semiconductor switches, a half bridge, two half bridges (for example an H bridge), three half bridges or any other desired arrangement.

在依据本发明的功率半导体模块装置400运行时,至少在第一连接端组10的第一电连接端1和第二连接端组20的第二电连接端2之间施加高的电势差,在两个电连接端之间走向有第一绝缘支撑体11和/或第二绝缘支撑体20,该电势差然后也施加在电极210、220之间。由于电路板200的通孔接触或者过孔201、202的缘故,该电势差也能够施加在该绝缘支撑体230的处于连接端组10和20之间的分段231之上,这示例性地借助于图22加以示出,其示出了依据图4的功率半导体模块装置的放大的分段。在这种意义上来说所阐述的标准然而对于所有其他的设计也同样适用。例如绝缘载体230能够在分段231之中具有光纤,沿着其下降有电势差。当在模块壳体50之中设置有功率半导体构件时,最大允许的截止电压为600V,从而使得在连接端组10和20之间的运行电压(直流或者交流电压)为200V至450V。在这种情况下具有最大允许截止电压为1200V的功率半导体构件来说能够在连接端组10和20之间甚至施加400V至900V的运行电压,并且在具有最大允许的截止电压为1700V的功率半导体构件来说甚至施加600V至1400V的运行电压。短时间的电压峰值能够在极端情况下达到最大允许的运行电压Umax,其允许施加在连接端组10和20之间。其中,不会引起对于在功率半导体模块100之中所构建的电构件的任何干扰。在功率半导体构件之中其能够例如为二极管,或者为受控的半导体构件,在其中借助于控制连接端(例如栅极或者基极)来控制通过负载段(例如在射极和集电极、在源极和漏极或者在阴极和阳极之间)的电流。合适的受控的功率半导体构件例如为IGBT、MOSFET、JFET、晶闸管、HEMT等。所给出的最大允许的截止电压根据构件的不同能够在射极和集电极之间、源极和漏极之间或者阴极和阳极之间的最大允许的截止电压。例如,在该功率半导体模块100的壳体50之中能够设置有至少一个功率半导体根据,其具有至少300V或者至少600V的最大允许的截止电压。During operation of the power semiconductor module arrangement 400 according to the invention, a high potential difference is applied at least between the first electrical connection 1 of the first connection group 10 and the second electrical connection 2 of the second connection group 20, at A first insulating support 11 and/or a second insulating support 20 runs between the two electrical connection ends, and the potential difference is then also applied between the electrodes 210 , 220 . Due to the through-hole contacts or vias 201, 202 of the circuit board 200, this potential difference can also be applied to the section 231 of the insulating carrier 230 between the terminal groups 10 and 20, for example by means of This is shown in FIG. 22 , which shows an enlarged section of the power semiconductor module arrangement according to FIG. 4 . In this sense, however, the stated criteria apply equally to all other designs. For example, the insulating carrier 230 can have optical fibers in a section 231 along which a potential difference falls. When the power semiconductor components are arranged in the module housing 50 , the maximum permissible cut-off voltage is 600 V, so that the operating voltage (DC or AC voltage) between the terminal groups 10 and 20 is 200 V to 450 V. In this case for power semiconductor components with a maximum permissible cut-off voltage of 1200 V, even an operating voltage of 400 V to 900 V can be applied between the terminal groups 10 and 20, and for power semiconductor components with a maximum permissible cut-off voltage of 1700 V For components, even an operating voltage of 600V to 1400V is applied. Brief voltage peaks can in extreme cases reach the maximum permissible operating voltage U max , which is permissible to be applied between the terminal groups 10 and 20 . In this case, no interference is caused to the electrical components built in the power semiconductor module 100 . Among power semiconductor components it can be, for example, a diode, or a controlled semiconductor component in which the passage of load segments (eg at emitter and collector, at source and drain or between cathode and anode). Suitable controlled power semiconductor components are, for example, IGBTs, MOSFETs, JFETs, thyristors, HEMTs or the like. Depending on the components, the specified maximum permissible cut-off voltage can be the maximum permissible cut-off voltage between emitter and collector, source and drain or cathode and anode. For example, at least one power semiconductor substrate can be arranged in the housing 50 of the power semiconductor module 100 , which has a maximum permissible cut-off voltage of at least 300V or at least 600V.

通过应用一个或者多个绝缘支撑体11、12能够使得在一方面包含该电路板200(电极210、通孔接触211、焊孔等)与其电连接的元件的第一连接端组10和另一方面包含该电路板200(电极220、通孔接触221、焊孔等)的与其电连接的元件的第二连接端组20之间的(最小的)间距相较于传统的功率半导体模块装置显著地得以减小。该电极组间距w给出了在第一电极组和第二电极组之间的(最小的)间距。其中,第一电极组包括所有的元件,其只要该电路板200安装至半导体模块100之上时与第一电连接端持续地电连接。相应地,第二电极组包括所有的元件,其只要电路板200安装至半导体模块100之上时与第二连接端组20的第二电连接端2持续地导电连接。在每个电极组之中,所有导电地相互连接的元件能够由金属所组成。由此使得电极组的这些元件在功率半导体装置的运行时基本上具有相同的电势。当在功率半导体装置运行时在第一连接端组10和第二连接端组20之间存在电势差,那么其降落在电极组间距w之上。By using one or more insulating supports 11, 12 it is possible to make, on the one hand, the first connection terminal group 10 and the other end group 10 of the components that are electrically connected to the circuit board 200 (electrodes 210, through-hole contacts 211, solder holes, etc.) The (minimum) spacing between the second terminal group 20 of the components electrically connected to the circuit board 200 (electrodes 220, through-hole contacts 221, solder holes, etc.) land is reduced. The electrode group spacing w specifies the (minimum) distance between the first electrode group and the second electrode group. Wherein, the first electrode group includes all components, which are continuously electrically connected to the first electrical connection end as long as the circuit board 200 is installed on the semiconductor module 100 . Correspondingly, the second electrode group includes all elements which are continuously conductively connected to the second electrical connection terminals 2 of the second connection terminal group 20 as long as the circuit board 200 is mounted on the semiconductor module 100 . Within each electrode group, all electrically conductively interconnected elements can consist of metal. As a result, the elements of the electrode group have essentially the same potential during operation of the power semiconductor arrangement. If a potential difference exists between the first terminal group 10 and the second terminal group 20 during operation of the power semiconductor arrangement, it falls above the electrode group spacing w.

示例性地,接下来要描述为“连接端组间距”的间距在功率半导体模块100的连接端组10和20之间选择具有d<Umax*0.0070mm/V或者甚至具有d<Umax*0.0045mm/V,其中,Umax为最大允许的运行电压,其在功率半导体模块装置运行时(即具有安装至该功率半导体模块100之上的电路板200)施加在第一连接端组10和第二连接端组20之间,而不会导致构建在该功率半导体模块100之中的电子构件的损坏。Exemplarily, the spacing to be described below as "connection group spacing" is chosen between the connection groups 10 and 20 of the power semiconductor module 100 with d<U max *0.0070 mm/V or even with d<U max * 0.0045mm/V, wherein, Umax is the maximum allowable operating voltage, which is applied to the first connection terminal group 10 and the second terminal group 10 when the power semiconductor module device is running (that is, with the circuit board 200 mounted on the power semiconductor module 100) between the two terminal groups 20 without causing damage to the electronic components built in the power semiconductor module 100 .

示例性地,在两个相邻的连接端组10和20之间的间距d对于Umax=1200V来说小于7mm(例如在3mm至5mm的范围内),或者对于Umax=1700V来说小于11.5mm(例如在5mm至7mm的范围内)。与该标准无关地在运行时在第一连接端组10和第二连接端组20之间施加的电压的间距d至少为1.5mm。Exemplarily, the distance d between two adjacent terminal groups 10 and 20 is smaller than 7 mm (for example in the range of 3 mm to 5 mm) for U max = 1200V , or smaller than 11.5mm (for example in the range of 5mm to 7mm). Regardless of the standard, the distance d of the voltage applied between the first terminal group 10 and the second terminal group 20 during operation is at least 1.5 mm.

电路板200的电极210和220的间距能够在绝缘载体230的绝缘位置内部水平地沿着绝缘位置结构(例如光纤)在电路板200内部缩短至约最小间距,其为了在电路板200内部起到足够的电绝缘作用而必须的。其中,电路板200之中的故障机制考虑例如CAF(导电阳极丝)。该机制在光纤或者光纤纤维的方案之中优选地沿着光纤起作用。因此,电极组间距w不允许太短。该电极组间距能够由于本发明的缘故但是实质上比最小爬电距离更短地加以选择,该最小的爬电距离当在电极组之间施加最大允许的运行电压Umax时是必须的。The distance between the electrodes 210 and 220 of the circuit board 200 can be shortened to approximately the minimum distance inside the circuit board 200 horizontally along the insulating position structure (such as an optical fiber) inside the insulating position of the insulating carrier 230, which in order to play a role in the circuit board 200. necessary for adequate electrical insulation. Among them, the failure mechanism in the circuit board 200 is considered, for example, CAF (Conductive Anode Filament). This mechanism works preferably along the fiber optic in the solution of an optical fiber or a fiber optic fiber. Therefore, the electrode group spacing w is not allowed to be too short. Due to the invention, this distance between the electrode groups can be chosen substantially shorter than the minimum creepage distance which is required when the maximum permissible operating voltage Umax is applied between the electrode groups.

在本发明之中,功率半导体装置能够如此地加以设计,使得在第一连接端组10的第一电连接端1和第二连接端组20的第二电连接端2之间在运行时以不同的电势加以施加而不存在直接的分段,该分段仅仅通过空气来加以走向。换句话说,在第一连接端组10的第一电连接端1和第二连接端组20的第二电连接端2之间不存在任何“视觉连接(Sichtverbindung)”。In the present invention, the power semiconductor device can be designed in such a way that during operation between the first electrical connection 1 of the first connection group 10 and the second electrical connection 2 of the second connection group 20 Different potentials are applied without a direct segment, which is only routed through the air. In other words, there is no “visual connection” between the first electrical connection 1 of the first connection group 10 and the second electrical connection 2 of the second connection group 20 .

通常来说但是不是必须的方式,依据本发明的功率半导体模块能够具有快速切换的转换电路(例如半桥、H-桥、3或者多等级电路等)。同样地,功率半导体模块能够为快速切换的转换电路的一部分。例如,两个半导体模块能够分别含有与一个或者多个并联地电连接的半桥的逻辑电路,并且该逻辑电路能够连接为半桥。该逻辑电路然后能够例如形成DC+断开,另一个形成DC-电路。Generally, but not necessarily, the power semiconductor modules according to the invention can have fast-switching switching circuits (eg half-bridges, H-bridges, 3- or multilevel circuits, etc.). Likewise, the power semiconductor module can be part of a fast-switching conversion circuit. For example, two semiconductor modules can each contain a logic circuit with one or more half-bridges electrically connected in parallel, and the logic circuits can be connected as a half-bridge. This logic circuit can then for example form a DC+ disconnect and another form a DC- circuit.

Claims (19)

1. a power semiconductor module system, it has:
Power semiconductor modular (100), described power semiconductor modular:
-there is module housing (50) with top side (50t);
-there is at least one first electric connecting terminal (1) or there are at least two the first link groups (10) of mutually conducting electricity the first electric connecting terminal (1) connected constantly;
-there is at least one second electric connecting terminal (2) or there are at least two the second link groups (20) of mutually conducting electricity the second electric connecting terminal (2) connected constantly;
Circuit board (200), it has the first electrode (210) and the second electrode (220) and is so mounted to described power semiconductor modular (100), makes under the state of installing:
-each first link (1) is connected conductively with described first electrode (210); And
-each second electrical connection (2) is connected conductively with described second electrode (220);
Wherein, described power semiconductor module system also has one or two following insulation support bodies (11,12), and it has:
-the first insulation support body (11), it is also fixed to described circuit board (200) and is arranged between described first link group (10) and described second link group (20) under the state of installing under uninstalled state;
-the second insulation support body (12), it is also fixed to described circuit board (200) and is arranged between described first link group (10) and described second link group (20) under the state of installing on the side contrary with described power semiconductor modular (100) of described circuit board (200) under uninstalled state.
2. power semiconductor module system according to claim 1, wherein:
Described module housing (50) has groove (55), and between described first link group (10) and described second link group (20), from described top side, (the 50t) extends among described module housing (50) described groove; And
Described first insulation support body 911) embed among described groove (55) under the state of installing.
3. power semiconductor module system according to claim 2, wherein, described groove (55) has the sidewall (r) closed circlewise formed by described module housing (50), described sidewall under the state of installing around described first insulation support body (11).
4. power semiconductor module system according to claim 2, wherein, described groove (55) has and moves towards direction (r) and neither also do not move towards module housing (50) described in the cause of direction (r) limited along described described to move towards on direction (r).
5. according to power semiconductor module system in any one of the preceding claims wherein, wherein, described groove (55) have move towards direction (r) and described module housing (50) install state under on direction (r), at least there is among the scope of described groove (55) width larger than described circuit board (200) described trend.
6. power semiconductor module system according to any one of claim 1 to 4, wherein, described groove (55) have move towards direction (r) and described module housing (50) install state under on direction (r), at least there is among the scope of described groove (55) width (r) less than described circuit board (200) described trend.
7. according to power semiconductor module system in any one of the preceding claims wherein, wherein, loop configuration that is that described first insulation support body (11) and described second insulation support body (12) form monolithic together or polylith, it is circlewise around described circuit board (200).
8. according to power semiconductor module system in any one of the preceding claims wherein, wherein, described first insulation support body (11) and described second insulation support body (12) are dependently of each other constructed and are formed a unit, and described unit is circlewise around described circuit board (200).
9. power semiconductor module system according to claim 8, wherein, described unit is constructed to the ring closed, and described ring moves on described circuit board (200).
10. power semiconductor module system according to any one of claim 1 to 8, wherein:
Described first insulation support body (11) has multiple first adjustment pin (112), and described multiple first adjustment pin embeds among the corresponding the first access (212) of described circuit board (200) respectively; And/or
Described second insulation support body (12) has multiple second adjustment pin (122), and described multiple second adjustment pin embeds among corresponding second adjusting hole (222) of described circuit board (200) respectively.
11. according to power semiconductor module system in any one of the preceding claims wherein, wherein:
Described first insulation support body (11) and described circuit board (200) bond; And/or
Described second insulation support body (12) and described circuit board (200) bond.
12. according to power semiconductor module system in any one of the preceding claims wherein, it has the 3rd insulation support body (13), it is constructed to the part of described module housing (50) or is connected with this module housing (50) regularly, and is arranged between described first link group (10) and described second link group (20).
13. power semiconductor module systems according to claim 12, wherein, described 3rd insulation support body (13) and described circuit board (200) bond.
14. according to power semiconductor module system in any one of the preceding claims wherein, wherein, and described first link (1) and described second link (2):
Be constructed to welded ends respectively, wherein, install state under described first link (1) with described first electrode (210) and described second link (2) weld with described second electrode (220); Or
Be constructed to the link that freezes respectively, wherein, under the state of installing, described first link (1) and described first electrode (210) and described second link (2) and described second electrode (220) are freezed;
Be constructed to bolted end respectively, wherein, under the state of installing, described first link (1) and described first electrode (210) and described second link (2) and described second electrode (220) are spirally connected; Or
Be constructed to according to DIN41611-9:1987-12 or according to DINEN (IEC) 60352-5 respectively, the press-in of 2008-11 connects, wherein, each under the state of installing in described first link (1) is pressed into corresponding first opening (201) of described first electrode (210) respectively and each in described second link (2) is pressed into corresponding second opening (202) of described second electrode (220) respectively;
Be constructed to Elastic Contact respectively, wherein, flexibly each under the state of installing in described first link (1) and compressing relative to described first electrode (210) when the crimping being configured with electricity connects and flexibly each in described second link (2) and compressing relative to described second electrode (220) when the crimping being configured with electricity connects.
15. according to power semiconductor module system in any one of the preceding claims wherein, wherein:
Described power semiconductor modular (100) has the working voltage (U of maximum permission max), described working voltage allows to be applied between described first link group (10) and described second link group (20); And
Described first link group (10) and described second link group (20) have link group spacing (d), described link group spacing at least meets at least one in following standard or combines arbitrarily, as long as these standards are not repelled mutually:
-described link group spacing (d) is less than described maximum permission working voltage (U max) (0.0070mm/V) doubly;
-described link group spacing (d) is less than described maximum permission working voltage (U max) (0.0045mm/V) doubly;
-described link group spacing (d) is less than 7mm and described maximum permission working voltage (U max) be 1200V;
-described link group spacing (d) is less than 11.5mm and described maximum permission working voltage (U max) be 1700V;
-described link group spacing (d) is at least 1.5mm.
16. 1 kinds of methods for the manufacture of power semiconductor modular device, it has following steps:
Power semiconductor module system according to being constructed according to any one of aforementioned claim is provided;
Circuit board (200) is so mounted to described power semiconductor modular (100), each and described first electrode (210) under the state of installing in described first link (1) is conducted electricity be connected and each and described second electrode (220) in described second link (2) is conducted electricity and is connected.
17. method according to claim 16, wherein:
Described power semiconductor module system has the first insulation support body (11), and it was connected with described circuit board (200) regularly before described circuit board (200) being mounted to described power semiconductor modular (100); And/or
Described power semiconductor module system has the second insulation support body (12), and it was connected with described circuit board (200) regularly before described circuit board (200) being mounted to described power semiconductor modular (100).
18. methods according to claim 16 or 17, wherein:
Described power semiconductor module system (400) has the first insulation support body (11) with the first adjustment pin (112), wherein, described first insulation support body (11) was connected with described circuit board (200) regularly before described circuit board (200) being mounted to described power semiconductor modular (100), thus keep embedding with described the first access (212) among the corresponding the first access (212) making described first adjustment pin (112) embed described circuit board (200) respectively and described circuit board (200) being mounted to described power semiconductor modular (100) period, and/or
Described power semiconductor module system (400) has the second insulation support body (12) with the second adjustment pin (212), wherein, described second insulation support body (12) was connected with described circuit board (200) regularly before described circuit board (200) being mounted to described power semiconductor modular (100), thus keep embedding with described second adjusting hole (222) among corresponding second adjusting hole (222) making described second adjustment pin (122) embed described circuit board (200) respectively and described circuit board (200) being mounted to described power semiconductor modular (100) period.
19. according to claim 16 to the method according to any one of 18, wherein, described power semiconductor module system has the first insulation support body (11) and the second insulation support body (12), and they are connected regularly with described circuit board (200) and are mounted to described circuit board (200) at it and are mutually connected movably before.
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CN108231751A (en) * 2016-12-15 2018-06-29 英飞凌科技股份有限公司 For the parallel plate waveguide structure of power circuit

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