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CN105261643B - A kind of high-breakdown-voltage GaN base transistor with high electronic transfer rate - Google Patents

A kind of high-breakdown-voltage GaN base transistor with high electronic transfer rate Download PDF

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CN105261643B
CN105261643B CN201510608178.9A CN201510608178A CN105261643B CN 105261643 B CN105261643 B CN 105261643B CN 201510608178 A CN201510608178 A CN 201510608178A CN 105261643 B CN105261643 B CN 105261643B
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CN105261643A (en
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赵子奇
桂进争
周幸叶
姜涛
张后程
胡子阳
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Nanjing Lvnengxinyao Technology Co ltd
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Ningbo University
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/40FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/475High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
    • H10D30/4755High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies

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Abstract

本发明涉及一种高击穿电压氮化镓基高电子迁移率晶体管,从下至上依次主要由衬底、AlN成核层、GaN缓冲层、GaN沟道层、AlGaN势垒层以及在AlGaN势垒层上形成的源极、漏极和栅极组成,其特征在于,还包括位于AlGaN势垒层之上、栅极与漏极之间的Al组分渐变的AlxGa1‑xN极化掺杂层。AlxGa1‑xN极化掺杂层内的Al组分从上至下线性增大,通过Al组分渐变而产生的三维空穴气与沟道二维电子气相互补偿,形成电荷自平衡的超结结构,解决了电荷不平衡问题,提升了器件击穿电压和稳定性。

The invention relates to a gallium nitride based high electron mobility transistor with high breakdown voltage, which mainly consists of substrate, AlN nucleation layer, GaN buffer layer, GaN channel layer, AlGaN barrier layer and The composition of the source, the drain and the gate formed on the barrier layer is characterized in that it also includes an Al x Ga 1-x N pole with a graded Al composition between the gate and the drain on the AlGaN barrier layer chemically doped layer. The Al composition in the Al x Ga 1‑x N polarized doped layer increases linearly from top to bottom, and the three-dimensional hole gas generated by the gradual change of the Al composition compensates with the two-dimensional electron gas of the channel to form a self-charged The balanced superjunction structure solves the problem of charge imbalance and improves the breakdown voltage and stability of the device.

Description

一种高击穿电压氮化镓基高电子迁移率晶体管A GaN-based High Electron Mobility Transistor with High Breakdown Voltage

技术领域technical field

本发明涉及半导体器件领域,尤其涉及一种高击穿电压氮化镓基高电子迁移率晶体管。The invention relates to the field of semiconductor devices, in particular to a gallium nitride-based high electron mobility transistor with high breakdown voltage.

背景技术Background technique

氮化镓(GaN)基高电子迁移率晶体管(HEMT)不但具有禁带宽度大、临界击穿电场高、电子饱和速度高、导热性能好、抗辐射和良好化学稳定性等优异特性,同时氮化镓(GaN)材料还可以与铝镓氮(AlGaN)等材料形成具有高浓度和高迁移率的二维电子气(2DEG)异质结沟道。因此,氮化镓(GaN)基高电子迁移率晶体管特别适用于高压、大功率和高温应用领域,是电力电子应用最具潜力的晶体管之一。Gallium nitride (GaN)-based high electron mobility transistor (HEMT) not only has excellent characteristics such as large band gap, high critical breakdown electric field, high electron saturation velocity, good thermal conductivity, radiation resistance and good chemical stability, but also nitrogen Gallium nitride (GaN) materials can also form two-dimensional electron gas (2DEG) heterojunction channels with high concentration and high mobility with materials such as aluminum gallium nitride (AlGaN). Therefore, gallium nitride (GaN)-based high electron mobility transistors are especially suitable for high-voltage, high-power and high-temperature applications, and are one of the most potential transistors for power electronics applications.

但目前已制作GaN器件的击穿电压实际值与理论耐压极限相比仍然有较大的差距。其主要原因是GaN基高电子迁移率晶体管存在的栅极电场集中效应的问题难以从根本上得到有效解决。当GaN HEMT在高漏极电压下时,沟道电力线集中指向栅极边缘,在栅极边缘形成电场峰值,沟道电场的不均匀分布使器件在较低漏压下便发生雪崩击穿,无法充分发挥GaN材料的高耐压优势。However, there is still a large gap between the actual breakdown voltage of GaN devices and the theoretical withstand voltage limit. The main reason is that the problem of gate electric field concentration effect existing in GaN-based high electron mobility transistors is difficult to fundamentally and effectively solve. When the GaN HEMT is under high drain voltage, the channel electric force lines point to the edge of the gate, forming a peak electric field at the edge of the gate. The uneven distribution of the channel electric field causes avalanche breakdown of the device at a lower drain voltage, which cannot Give full play to the high withstand voltage advantages of GaN materials.

2011年,Nakajima等人(GaN-based super heterojunction field effecttransistors using the polarization junction concept.IEEE Electron DeviceLetters,2011,32(4):542-544)提出了一种超级异质结AlGaN/GaN HEMT器件来解决栅极电场集中效应。该HEMT器件结构如图1所示,从下至上依次为衬底、GaN缓冲层、GaN沟道层、AlGaN势垒层,以及AlGaN势垒层上形成的栅极、漏极和源极,器件在栅极与漏极之间的AlGaN势垒层上生长了一层GaN层和p型GaN层。由于GaN/AlGaN界面极化电荷的不平衡,在GaN/AlGaN界面会形成二维空穴气(2DHG),2DHG主要来源于p型GaN层内的杂质电离。当器件承受耐压时,2DHG与沟道内2DEG相互耗尽,扩展沟道电场区域,平滑沟道电场分布,从而提升器件击穿电压。In 2011, Nakajima et al. (GaN-based super heterojunction field effect transistors using the polarization junction concept.IEEE Electron Device Letters, 2011,32(4):542-544) proposed a super heterojunction AlGaN/GaN HEMT device to solve Grid electric field concentration effect. The structure of the HEMT device is shown in Figure 1. From bottom to top, there are substrate, GaN buffer layer, GaN channel layer, AlGaN barrier layer, and gate, drain and source formed on the AlGaN barrier layer. A GaN layer and a p-type GaN layer are grown on the AlGaN barrier layer between the gate and the drain. Due to the imbalance of polarization charges at the GaN/AlGaN interface, two-dimensional hole gas (2DHG) will be formed at the GaN/AlGaN interface. The 2DHG mainly comes from the impurity ionization in the p-type GaN layer. When the device withstands the withstand voltage, the 2DHG and the 2DEG in the channel deplete each other, expand the channel electric field area, and smooth the channel electric field distribution, thereby increasing the breakdown voltage of the device.

对于GaN材料,通常采用镁(Mg)掺杂来实现p型GaN材料,已知GaN材料p型杂质中,Mg杂质具有最低的激活能(约为200meV),但仍远高于室温下的热电势(26meV)。过高的杂质激活能导致室温下p型杂质的激活率非常低(仅为1%左右),并会随着温度的降低而急剧降低,即产生“冻析效应”。因此,采用p-GaN制备超结GaN HEMT器件,不但很难保证器件电荷平衡,同时会影响器件热稳定性,限制了GaN器件的耐压能力与应用范围。For GaN materials, magnesium (Mg) doping is usually used to realize p-type GaN materials. Among the p-type impurities of GaN materials, Mg impurities have the lowest activation energy (about 200meV), but it is still much higher than the thermoelectricity at room temperature. Potential (26meV). Excessively high impurity activation energy leads to a very low activation rate of p-type impurities at room temperature (only about 1%), and it will decrease sharply as the temperature decreases, that is, a "freeze-out effect". Therefore, using p-GaN to prepare super-junction GaN HEMT devices not only makes it difficult to ensure device charge balance, but also affects device thermal stability, which limits the withstand voltage capability and application range of GaN devices.

由于2DEG来源于AlGaN势垒层表面陷阱放电,2DEG和2DHG来源不同,同时由于P型GaN材料存在“冻析效应”,2DEG和2DHG之间很难做到电荷平衡,而超结中的电荷不平衡问题,会导致击穿电压随栅漏间距的增加而趋于饱和,无法充分发挥GaN材料的高耐压特性。此外,P型GaN材料中的“冻析效应”还会影响器件的热稳定性。GaN层和AlGaN势垒层之间由于应力而产生的界面陷阱会导致电流崩塌效应,降低器件的可靠性。Since 2DEG comes from trap discharges on the surface of the AlGaN barrier layer, 2DEG and 2DHG have different sources, and because of the "freeze-out effect" in P-type GaN materials, it is difficult to achieve charge balance between 2DEG and 2DHG, and the charges in the superjunction are not The balance problem will cause the breakdown voltage to become saturated with the increase of the gate-drain distance, and the high withstand voltage characteristics of GaN materials cannot be fully utilized. In addition, the "freeze-out effect" in the P-type GaN material will also affect the thermal stability of the device. The interfacial traps between the GaN layer and the AlGaN barrier layer due to the stress will lead to the current collapse effect and reduce the reliability of the device.

发明内容Contents of the invention

本发明所要解决的技术问题是针对上述现有技术提供一种既能够避免出现电荷不平衡和热稳定性差的问题,又能提升自身击穿电压的高击穿电压氮化镓基高电子迁移率晶体管。The technical problem to be solved by the present invention is to provide a high breakdown voltage GaN-based high electron mobility solution that can avoid the problems of charge imbalance and poor thermal stability, and can improve its own breakdown voltage. transistor.

本发明解决上述技术问题所采用的技术方案为:一种高击穿电压氮化镓基高电子迁移率晶体管,从下至上依次主要由衬底、AlN成核层、GaN缓冲层、GaN沟道层、AlGaN势垒层以及在AlGaN势垒层上形成的源极、漏极和栅极组成,其特征在于,还包括位于AlGaN势垒层之上、栅极与漏极之间的Al组分渐变的AlxGa1-xN极化掺杂层。The technical solution adopted by the present invention to solve the above technical problems is: a high breakdown voltage GaN-based high electron mobility transistor, which mainly consists of a substrate, an AlN nucleation layer, a GaN buffer layer, and a GaN channel from bottom to top. layer, an AlGaN barrier layer, and a source electrode, a drain electrode, and a gate formed on the AlGaN barrier layer, and is characterized in that it also includes an Al component located on the AlGaN barrier layer, between the gate electrode and the drain electrode Graded AlxGa1 - xN polarized doped layer.

进一步地,所述AlxGa1-xN极化掺杂层的厚度位于50nm~500nm之间。Further, the thickness of the AlxGa1 - xN polarized doped layer is between 50nm and 500nm.

进一步地,所述AlxGa1-xN极化掺杂层的上表面Al组分为0,AlxGa1-xN极化掺杂层的下表面Al组分与AlGaN势垒层组分相同,从上至下线性增大。Further, the Al composition on the upper surface of the AlxGa1 - xN polarized doped layer is 0, the Al composition on the lower surface of the AlxGa1 - xN polarized doped layer and the AlGaN barrier layer group The points are the same, increasing linearly from top to bottom.

为了避免漏极和栅极通过AlxGa1-xN极化掺杂层直接导通,所述AlxGa1-xN极化掺杂层与漏极相连,AlxGa1-xN极化掺杂层与栅极之间通过绝缘介质相互隔离;或者所述AlxGa1-xN极化掺杂层与栅极相连,AlxGa1-xN极化掺杂层与漏极之间通过绝缘介质相互隔离;或者所述AlxGa1-xN极化掺杂层分别与栅极、漏极通过绝缘介质相互隔离。In order to avoid direct conduction between the drain and the gate through the AlxGa1 - xN polarized doped layer, the AlxGa1 - xN polarized doped layer is connected to the drain, and the AlxGa1 - xN The polarized doped layer and the gate are isolated from each other by an insulating medium; or the Al x Ga 1-x N polarized doped layer is connected to the gate, and the Al x Ga 1-x N polarized doped layer is connected to the drain The poles are isolated from each other by an insulating medium; or the Al x Ga 1-x N polarized doped layer is respectively isolated from the gate and the drain by an insulating medium.

进一步地,所述绝缘介质为高k介质,高k介质的相对介电常数大于15,所述绝缘介质宽度处于50nm~3μm之间。Further, the insulating medium is a high-k medium, the relative permittivity of the high-k medium is greater than 15, and the width of the insulating medium is between 50 nm and 3 μm.

为了避免AlxGa1-xN极化掺杂层出现的电位浮空,更好的控制器件特性,所述AlxGa1-xN极化掺杂层上制备有金属电极。其中,所述金属电极与AlxGa1-xN极化掺杂层之间形成肖特基接触或欧姆接触。In order to avoid potential floating in the AlxGa1 - xN polarized doped layer and better control device characteristics, a metal electrode is prepared on the AlxGa1 - xN polarized doped layer. Wherein, a Schottky contact or an ohmic contact is formed between the metal electrode and the AlxGa1 - xN polarized doped layer.

进一步地,所述金属电极的偏置电压介于栅极偏置电压、漏极偏置电压之间。Further, the bias voltage of the metal electrode is between the gate bias voltage and the drain bias voltage.

与现有技术相比,本发明的优点在于:在AlxGa1-xN极化掺杂层内,Al组分从上至下逐渐增大,因此AlxGa1-xN极化掺杂层内由于自发极化和压电极化产生的极化电荷密度也是沿着垂直方向变化的。由于极化电荷不平衡,AlxGa1-xN极化掺杂层内会形成高浓度三维空穴气(3DHG)。由于AlxGa1-xN极化掺杂层下表面Al组分与AlGaN势垒层相同,界面处不会形成界面陷阱,器件沟道2DEG并非来自AlGaN势垒层表面陷阱。同时AlxGa1-xN极化掺杂层内的3DHG会屏蔽AlxGa1-xN极化掺杂层表面陷阱对沟道2DEG的影响,沟道2DEG也不是来源于AlxGa1-xN极化掺杂层表面陷阱放电,而是来源于AlxGa1-xN极化掺杂层内的3DHG。根据电中性原理,AlxGa1-xN极化掺杂层内3DHG与沟道2DEG电荷数量相等,形成电荷自平衡的超结结构,可有效解决已有超结GaN HEMT中由于电荷不平衡而导致的击穿电压过低问题;同时AlxGa1-xN极化掺杂层内3DHG不存在“冻析效应”,器件具有更好的热稳定性。此外,由于AlxGa1-xN极化掺杂层和AlGaN势垒层界面处Al组分相同,界面处没有晶格应力,不会形成界面陷阱;同时3DHG有效屏蔽了AlxGa1-xN极化掺杂层表面陷阱充放电对沟道2DEG的影响,可以有效抑制电流崩塌效应,使器件具有更高的可靠性。Compared with the prior art, the present invention has the advantage that: in the Al x Ga 1-x N polarized doped layer, the Al composition increases gradually from top to bottom, so the Al x Ga 1- x N polarized doped layer The polarization charge density generated by spontaneous polarization and piezoelectric polarization in the dopant layer also changes along the vertical direction. Due to the imbalance of polarization charges, a high concentration of three-dimensional hole gas (3DHG) will be formed in the Al x Ga 1-x N polarization doped layer. Since the Al composition of the lower surface of the Al x Ga 1-x N polarized doped layer is the same as that of the AlGaN barrier layer, no interface traps will be formed at the interface, and the device channel 2DEG does not come from the surface traps of the AlGaN barrier layer. At the same time, the 3DHG in the Al x Ga 1- x N polarized doped layer will shield the influence of the surface traps of the Al x Ga 1-x N polarized doped layer on the channel 2DEG, and the channel 2DEG is not derived from Al x Ga 1 -x N polarized doped layer surface trap discharge, but from the 3DHG in the Al x Ga 1-x N polarized doped layer. According to the principle of electrical neutrality, the 3DHG in the Al x Ga 1-x N polarized doped layer is equal to the charge of the channel 2DEG, forming a self-balanced superjunction structure of charges, which can effectively solve the problems caused by the lack of charge in the existing superjunction GaN HEMT. The breakdown voltage is too low due to balance; at the same time, there is no "freeze-out effect" in the 3DHG in the Al x Ga 1-x N polarized doped layer, and the device has better thermal stability. In addition, since the Al composition at the interface between the Al x Ga 1-x N polarized doped layer and the AlGaN barrier layer is the same, there is no lattice stress at the interface, and no interface traps will be formed; at the same time, 3DHG effectively shields the Al x Ga 1- The impact of charge and discharge on the surface traps of the x N polarized doped layer on the channel 2DEG can effectively suppress the current collapse effect and make the device have higher reliability.

附图说明Description of drawings

图1是已有技术的超结GaN HEMT结构示意图;FIG. 1 is a schematic diagram of the structure of a super-junction GaN HEMT in the prior art;

图2是本发明实施例中的GaN HEMT结构示意图;Fig. 2 is a schematic diagram of the GaN HEMT structure in the embodiment of the present invention;

图3是图1所示GaN HEMT有无表面陷阱时的能带结构比较示意图;Fig. 3 is a schematic diagram of the energy band structure comparison of the GaN HEMT shown in Fig. 1 with or without surface traps;

图4是本发明实施例中GaN HEMT有无表面陷阱时的能带结构比较示意图;Fig. 4 is a schematic diagram of the energy band structure comparison of GaN HEMT with or without surface traps in the embodiment of the present invention;

图5是本发明实施例中改进措施一所对应的GaN HEMT结构示意图;FIG. 5 is a schematic diagram of a GaN HEMT structure corresponding to improvement measure 1 in the embodiment of the present invention;

图6是本发明实施例中改进措施二所对应的GaN HEMT结构示意图;FIG. 6 is a schematic diagram of the GaN HEMT structure corresponding to the second improvement measure in the embodiment of the present invention;

图7是本发明实施例中改进措施三所对应的GaN HEMT结构示意图;FIG. 7 is a schematic diagram of a GaN HEMT structure corresponding to improvement measure 3 in the embodiment of the present invention;

图8是图1所示超结GaN HEMT与本发明中GaN HEMT中击穿电压随着栅漏间距变化示意图。FIG. 8 is a schematic diagram showing the variation of the breakdown voltage with the gate-to-drain distance in the super-junction GaN HEMT shown in FIG. 1 and the GaN HEMT in the present invention.

其中,图中附图标记对应的零部件名称为:Among them, the names of parts corresponding to the reference signs in the figure are:

101-衬底,102-AlN成核层,103-GaN缓冲层,104-GaN沟道层,105-AlGaN势垒层,106-源极,107-漏极,108-栅极,109-AlxGa1-xN极化掺杂层,110-栅极与AlxGa1-xN极化掺杂层之间的绝缘介质,111-漏极与AlxGa1-xN极化掺杂层之间的绝缘介质,112-金属电极。101-substrate, 102-AlN nucleation layer, 103-GaN buffer layer, 104-GaN channel layer, 105-AlGaN barrier layer, 106-source, 107-drain, 108-gate, 109-Al x Ga 1-x N polarized doped layer, 110—insulation medium between gate and Al x Ga 1-x N polarized doped layer, 111—drain and Al x Ga 1 -x N polarized doped layer Insulation medium between heterogeneous layers, 112—metal electrode.

具体实施方式Detailed ways

以下结合附图实施例对本发明作进一步详细描述。The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

如图2所示,本实施例中的高击穿电压氮化镓基高电子迁移率晶体管,从下至上依次主要由衬底101、AlN成核层102、GaN缓冲层103、GaN沟道层104、AlGaN势垒层105,以及在AlGaN势垒层105上形成的源极106、漏极107和栅极108组成,作为改进之处,该氮化镓基高电子迁移率晶体管还包括位于AlGaN势垒层105之上、栅极108与漏极107之间形成有Al组分渐变的AlxGa1-xN极化掺杂层109。As shown in FIG. 2 , the GaN-based high electron mobility transistor with high breakdown voltage in this embodiment mainly consists of a substrate 101, an AlN nucleation layer 102, a GaN buffer layer 103, and a GaN channel layer from bottom to top. 104, an AlGaN barrier layer 105, and a source 106, a drain 107, and a gate 108 formed on the AlGaN barrier layer 105. As an improvement, the GaN-based high electron mobility transistor also includes an AlGaN On the barrier layer 105 and between the gate 108 and the drain 107 is formed an Al x Ga 1-x N polarization doped layer 109 with a graded Al composition.

本实施例中AlxGa1-xN极化掺杂层109的厚度处于50nm~500nm之间,AlxGa1-xN极化掺杂层109上表面的Al组分为0,其下表面Al组分与AlGaN势垒层105相同,且从上至下线性增大。In this embodiment, the thickness of the AlxGa1 - xN polarized doped layer 109 is between 50nm and 500nm, the Al composition on the upper surface of the AlxGa1 - xN polarized doped layer 109 is 0, and the lower surface The surface Al composition is the same as that of the AlGaN barrier layer 105 and increases linearly from top to bottom.

由图3可以看出,对于传统GaN HEMT,当AlGaN势垒层105没有表面陷阱时,AlGaN势垒层105和GaN沟道层104界面处导带底高于费米能级,无法形成2DEG,这说明传统GaN HEMT的沟道2DEG来源于AlGaN势垒层105的表面陷阱放电。It can be seen from FIG. 3 that for conventional GaN HEMTs, when the AlGaN barrier layer 105 has no surface traps, the bottom of the conduction band at the interface between the AlGaN barrier layer 105 and the GaN channel layer 104 is higher than the Fermi level, and 2DEG cannot be formed. This shows that the channel 2DEG of the conventional GaN HEMT originates from the surface trap discharge of the AlGaN barrier layer 105 .

由图4可以看出,无论AlxGa1-xN极化掺杂层109表面有无表面陷阱,AlGaN势垒层105和GaN沟道层104界面均可形成2DEG,这说明HEMT器件的2DEG并非来源于表面陷阱放电,而是来自于AlxGa1-xN极化掺杂层109内因极化电荷不平衡而产生的3DHG。根据电中性原理,3DHG与2DEG电荷面密度相等,二者形成电荷自平衡的超结结构。当器件承受耐压时,3DHG和2DEG相互完全耗尽,扩展器件沟道耗尽区域,提升器件耐压。It can be seen from Figure 4 that regardless of whether there are surface traps on the surface of the AlxGa1 - xN polarized doped layer 109, the interface between the AlGaN barrier layer 105 and the GaN channel layer 104 can form a 2DEG, which shows that the 2DEG of the HEMT device It does not come from the surface trap discharge, but from the 3DHG generated in the Al x Ga 1-x N polarized doped layer 109 due to the imbalance of polarized charges. According to the principle of electrical neutrality, 3DHG and 2DEG have the same charge surface density, and the two form a self-balanced superjunction structure. When the device is subjected to withstand voltage, 3DHG and 2DEG are completely depleted each other, which expands the channel depletion region of the device and improves the withstand voltage of the device.

由于AlxGa1-xN极化掺杂层109下表面Al组分与AlGaN势垒层105的Al组分相同,因此在AlxGa1-xN极化掺杂层109、AlGaN势垒层105的界面处不会形成界面陷阱。此外,AlxGa1-xN极化掺杂层109内的高浓度3DHG可以有效屏蔽AlxGa1-xN极化掺杂层109表面陷阱充放电对沟道2DEG的影响,从而抑制器件的电流崩塌效应,提升器件可靠性。Since the Al composition of the lower surface of the Al x Ga 1-x N polarized doped layer 109 is the same as the Al composition of the AlGaN barrier layer 105, the Al x Ga 1-x N polarized doped layer 109, the AlGaN barrier No interface traps are formed at the interface of layer 105 . In addition, the high concentration of 3DHG in the AlxGa1 - xN polarized doped layer 109 can effectively shield the influence of the charge and discharge of surface traps on the AlxGa1 - xN polarized doped layer 109 on the channel 2DEG, thereby inhibiting the device The current collapse effect improves device reliability.

为了避免漏极107和栅极108通过AlxGa1-xN极化掺杂层109直接导通,作为改进,可以采取如下三种措施:(改进措施一)AlxGa1-xN极化掺杂层109与漏极107相连,AlxGa1-xN极化掺杂层109与栅极108之间通过绝缘介质110相互隔离,如图5所示;(改进措施二)AlxGa1-xN极化掺杂层10与栅极108相连,而AlxGa1-xN极化掺杂层10与漏极107之间通过绝缘介质111相互隔离,如图6所示;(改进措施三)AlxGa1-xN极化掺杂层109与栅极108、漏极107分别通过绝缘介质110、绝缘介质111相互隔离,如图7所示。其中,本实施例中的绝缘介质110和绝缘介质111均为高k介质,相对介电常数大于15,宽度位于50nm~3μm之间。In order to avoid direct conduction between the drain 107 and the gate 108 through the AlxGa1 - xN polarized doped layer 109, as an improvement, the following three measures can be taken: (Improvement 1) AlxGa1 - xN pole The polarized doped layer 109 is connected to the drain 107, and the Al x Ga 1-x N polarized doped layer 109 is isolated from the gate 108 by an insulating medium 110, as shown in FIG. 5; (improvement measure 2) Al x The Ga 1-x N polarized doped layer 10 is connected to the gate 108, and the Alx Ga 1-x N polarized doped layer 10 is isolated from the drain 107 by an insulating medium 111, as shown in FIG. 6 ; (Improvement Measure 3) Al x Ga 1-x N polarized doped layer 109 is isolated from gate 108 and drain 107 by insulating medium 110 and insulating medium 111 respectively, as shown in FIG. 7 . Wherein, the insulating medium 110 and the insulating medium 111 in this embodiment are high-k dielectrics, the relative permittivity is greater than 15, and the width is between 50 nm and 3 μm.

在采用改进措施三基础上,为了避免AlxGa1-xN极化掺杂层109出现的电位浮空,更好的控制器件特性,在AlxGa1-xN极化掺杂层109上制备有金属电极112。参见图7所示。金属电极112与AlxGa1-xN极化掺杂层109之间可以是肖特基接触,也可以是欧姆接触。其中,金属电极112的偏置电压介于栅极108偏置电压与漏极107偏置电压之间。On the basis of the improvement measure 3, in order to avoid the potential floating in the AlxGa1 - xN polarized doped layer 109 and better control the device characteristics, the AlxGa1 - xN polarized doped layer 109 A metal electrode 112 is prepared on it. See Figure 7. The metal electrode 112 and the AlxGa1 - xN polarized doped layer 109 may be a Schottky contact or an ohmic contact. Wherein, the bias voltage of the metal electrode 112 is between the bias voltage of the gate 108 and the bias voltage of the drain 107 .

由图8中超结GaN HEMT与本实施例中GaN HEMT击穿电压随栅漏间距变化比较情况可以看出,已有技术的超结GaN HEMT由于电荷不平衡效应,器件击穿电压随着栅漏间距的增大呈现饱和趋势,这限制了GaN器件的耐压能力和应用范围;而本实施例提供的GaNHEMT,由于AlxGa1-xN极化掺杂层109内的3DHG与沟道2DEG形成电荷自平衡的超结结构,击穿电压随着栅漏间距的增大而不断增大,充分发挥了GaN材料的高耐压优势,提高了器件的高耐压能力。It can be seen from the comparison between the breakdown voltage of the super-junction GaN HEMT and the GaN HEMT in this embodiment with the change of the gate-drain spacing in Fig. The increase of pitch shows a saturation trend, which limits the withstand voltage capability and application range of GaN devices; and the GaNHEMT provided in this embodiment, due to the 3DHG in the AlxGa1 - xN polarization doped layer 109 and the channel 2DEG A charge self-balanced superjunction structure is formed, and the breakdown voltage increases continuously with the increase of the gate-drain distance, which gives full play to the high withstand voltage advantage of GaN material and improves the high withstand voltage capability of the device.

综上知,在AlxGa1-xN极化掺杂层109内,Al组分从上至下逐渐增大,因此AlxGa1-xN极化掺杂层109内由于自发极化和压电极化产生的极化电荷密度也是沿着垂直方向变化的。由于极化电荷不平衡,AlxGa1-xN极化掺杂层109内会形成高浓度三维空穴气(3DHG),该3DHG会屏蔽AlxGa1-xN极化掺杂层109表面陷阱对沟道2DEG的影响,其中沟道2DEG并非来源于AlxGa1-xN极化掺杂层109表面陷阱放电,而是来源于AlxGa1-xN极化掺杂层109内的3DHG。根据电中性原理,AlxGa1-xN极化掺杂层109内3DHG与沟道2DEG电荷数量相等,形成电荷自平衡的超结结构,从而可有效解决因电荷不平衡导致的击穿电压过低问题;同时AlxGa1-xN极化掺杂层109内的3DHG不存在“冻析效应”,器件具有更好的热稳定性。此外,AlxGa1-xN极化掺杂层109内的3DHG有效屏蔽了AlxGa1-xN极化掺杂层109表面陷阱充放电对沟道2DEG浓度的影响,从而可抑制电流崩塌效应,提升器件可靠性。To sum up, in the AlxGa1 - xN polarized doped layer 109, the Al composition gradually increases from top to bottom, so the spontaneous polarization in the AlxGa1 - xN polarized doped layer 109 And the polarization charge density generated by piezoelectric polarization also varies along the vertical direction. Due to the imbalance of polarization charges, a high concentration of three-dimensional hole gas (3DHG) will be formed in the Al x Ga 1-x N polarization doped layer 109, and the 3DHG will shield the Al x Ga 1-x N polarization doped layer 109 The effect of surface traps on the channel 2DEG, where the channel 2DEG is not derived from the surface trap discharge of the Al x Ga 1- x N polarized doped layer 109, but from the Al x Ga 1-x N polarized doped layer 109 3DHG inside. According to the principle of electrical neutrality, the 3DHG in the Al x Ga 1-x N polarized doped layer 109 is equal to the charge of the channel 2DEG, forming a charge self-balancing superjunction structure, which can effectively solve the breakdown caused by the charge imbalance. The voltage is too low; at the same time, the 3DHG in the Al x Ga 1-x N polarized doped layer 109 does not have the "freeze-out effect", and the device has better thermal stability. In addition, the 3DHG in the AlxGa1 - xN polarized doped layer 109 effectively shields the influence of the charge and discharge of traps on the surface of the AlxGa1 - xN polarized doped layer 109 on the channel 2DEG concentration, thereby suppressing the current Collapse effect, improve device reliability.

Claims (7)

1. a kind of high-breakdown-voltage GaN base transistor with high electronic transfer rate, from bottom to up successively mainly by substrate (101), AlN nucleating layers (102), GaN cushions (103), GaN channel layers (104), AlGaN potential barrier (105) and in AlGaN potential barriers Source electrode (106), drain electrode (107) and grid (108) composition formed on layer (105), it is characterised in that further include positioned at AlGaN The Al of Al content gradually variationals on barrier layer (105), between grid (108) and drain electrode (107)xGa1-xN polarization doped layers (109);The AlxGa1-xThe upper surface Al components of N polarization doped layers (109) are 0, AlxGa1-xUnder N polarization doped layers (109) Surface A l components are identical with AlGaN potential barrier (105) component, from top to bottom linear increase.
2. high-breakdown-voltage GaN base transistor with high electronic transfer rate according to claim 1, it is characterised in that described AlxGa1-xThe thickness of N polarization doped layers (109) is between 50nm~500nm.
3. high-breakdown-voltage GaN base transistor with high electronic transfer rate according to claim 1, it is characterised in that described AlxGa1-xN polarization doped layers (109) are connected with drain electrode (107), AlxGa1-xBetween N polarization doped layers (109) and grid (108) It is mutually isolated by dielectric.
4. high-breakdown-voltage GaN base transistor with high electronic transfer rate according to claim 1, it is characterised in that described AlxGa1-xN polarization doped layers (109) are connected with grid (108), AlxGa1-xBetween N polarization doped layers (109) and drain electrode (107) It is mutually isolated by dielectric.
5. high-breakdown-voltage GaN base transistor with high electronic transfer rate according to claim 1, it is characterised in that described AlxGa1-xN polarization doped layers (109) are mutually isolated by dielectric with grid (108), drain electrode (107) respectively;It is described AlxGa1-xBeing prepared on N polarization doped layers (109) has metal electrode (112);The bias voltage of the metal electrode (112) between Between grid (108) bias voltage, drain electrode (107) bias voltage.
6. high-breakdown-voltage GaN base transistor with high electronic transfer rate according to claim 5, it is characterised in that described Dielectric is high K medium, and the relative dielectric constant of high K medium is more than 15, the dielectric width be in 50nm~3 μm it Between.
7. high-breakdown-voltage GaN base transistor with high electronic transfer rate according to claim 6, it is characterised in that described Metal electrode (112) and AlxGa1-xSchottky contacts or Ohmic contact are formed between N polarization doped layers (109).
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