CN105210460A - Manufacturing method for wiring board - Google Patents
Manufacturing method for wiring board Download PDFInfo
- Publication number
- CN105210460A CN105210460A CN201480029187.6A CN201480029187A CN105210460A CN 105210460 A CN105210460 A CN 105210460A CN 201480029187 A CN201480029187 A CN 201480029187A CN 105210460 A CN105210460 A CN 105210460A
- Authority
- CN
- China
- Prior art keywords
- solder mask
- pad
- thickness
- filming
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 186
- 229910000679 solder Inorganic materials 0.000 claims abstract description 1000
- 238000000034 method Methods 0.000 claims description 330
- 239000000758 substrate Substances 0.000 claims description 146
- 230000008569 process Effects 0.000 claims description 115
- 230000004888 barrier function Effects 0.000 claims description 87
- 239000012530 fluid Substances 0.000 claims description 78
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 52
- 239000001301 oxygen Substances 0.000 claims description 52
- 229910052760 oxygen Inorganic materials 0.000 claims description 52
- 239000012298 atmosphere Substances 0.000 claims description 39
- 238000012545 processing Methods 0.000 abstract description 12
- 239000010409 thin film Substances 0.000 abstract description 2
- 239000004020 conductor Substances 0.000 description 118
- 230000003746 surface roughness Effects 0.000 description 98
- 239000007788 liquid Substances 0.000 description 57
- 238000001723 curing Methods 0.000 description 36
- 238000006116 polymerization reaction Methods 0.000 description 33
- 239000010408 film Substances 0.000 description 32
- 238000005507 spraying Methods 0.000 description 25
- 239000007864 aqueous solution Substances 0.000 description 19
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 description 18
- 230000007423 decrease Effects 0.000 description 18
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- 235000019795 sodium metasilicate Nutrition 0.000 description 10
- NTHWMYGWWRZVTN-UHFFFAOYSA-N sodium silicate Chemical compound [Na+].[Na+].[O-][Si]([O-])=O NTHWMYGWWRZVTN-UHFFFAOYSA-N 0.000 description 10
- 229910052911 sodium silicate Inorganic materials 0.000 description 10
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 10
- 230000015572 biosynthetic process Effects 0.000 description 9
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- 229910000029 sodium carbonate Inorganic materials 0.000 description 9
- 238000011049 filling Methods 0.000 description 8
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- 239000011256 inorganic filler Substances 0.000 description 8
- 229910003475 inorganic filler Inorganic materials 0.000 description 8
- 238000005476 soldering Methods 0.000 description 8
- 238000007747 plating Methods 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 5
- 150000007514 bases Chemical class 0.000 description 5
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- 229920000647 polyepoxide Polymers 0.000 description 5
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910000318 alkali metal phosphate Inorganic materials 0.000 description 4
- 229910052910 alkali metal silicate Inorganic materials 0.000 description 4
- 230000000903 blocking effect Effects 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 4
- 238000005470 impregnation Methods 0.000 description 4
- -1 light trigger Substances 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- LSNNMFCWUKXFEE-UHFFFAOYSA-L sulfite Chemical compound [O-]S([O-])=O LSNNMFCWUKXFEE-UHFFFAOYSA-L 0.000 description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 4
- BVKZGUZCCUSVTD-UHFFFAOYSA-L Carbonate Chemical compound [O-]C([O-])=O BVKZGUZCCUSVTD-UHFFFAOYSA-L 0.000 description 3
- ZMANZCXQSJIPKH-UHFFFAOYSA-N Triethylamine Chemical compound CCN(CC)CC ZMANZCXQSJIPKH-UHFFFAOYSA-N 0.000 description 3
- 150000008044 alkali metal hydroxides Chemical class 0.000 description 3
- OEYIOHPDSNJKLS-UHFFFAOYSA-N choline Chemical compound C[N+](C)(C)CCO OEYIOHPDSNJKLS-UHFFFAOYSA-N 0.000 description 3
- 229960001231 choline Drugs 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 238000013007 heat curing Methods 0.000 description 3
- 238000009434 installation Methods 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
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- 206010000060 Abdominal distension Diseases 0.000 description 2
- ROSDSFDQCJNGOL-UHFFFAOYSA-N Dimethylamine Chemical compound CNC ROSDSFDQCJNGOL-UHFFFAOYSA-N 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- DGAQECJNVWCQMB-PUAWFVPOSA-M Ilexoside XXIX Chemical compound C[C@@H]1CC[C@@]2(CC[C@@]3(C(=CC[C@H]4[C@]3(CC[C@@H]5[C@@]4(CC[C@@H](C5(C)C)OS(=O)(=O)[O-])C)C)[C@@H]2[C@]1(C)O)C)C(=O)O[C@H]6[C@@H]([C@H]([C@@H]([C@H](O6)CO)O)O)O.[Na+] DGAQECJNVWCQMB-PUAWFVPOSA-M 0.000 description 2
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 description 2
- BAVYZALUXZFZLV-UHFFFAOYSA-N Methylamine Chemical compound NC BAVYZALUXZFZLV-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- ZLMJMSJWJFRBEC-UHFFFAOYSA-N Potassium Chemical compound [K] ZLMJMSJWJFRBEC-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-L Sulfate Chemical compound [O-]S([O-])(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-L 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- HVVWZTWDBSEWIH-UHFFFAOYSA-N [2-(hydroxymethyl)-3-prop-2-enoyloxy-2-(prop-2-enoyloxymethyl)propyl] prop-2-enoate Chemical compound C=CC(=O)OCC(CO)(COC(=O)C=C)COC(=O)C=C HVVWZTWDBSEWIH-UHFFFAOYSA-N 0.000 description 2
- TZCXTZWJZNENPQ-UHFFFAOYSA-L barium sulfate Chemical compound [Ba+2].[O-]S([O-])(=O)=O TZCXTZWJZNENPQ-UHFFFAOYSA-L 0.000 description 2
- 208000024330 bloating Diseases 0.000 description 2
- 230000001680 brushing effect Effects 0.000 description 2
- 150000001732 carboxylic acid derivatives Chemical class 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- PAFZNILMFXTMIY-UHFFFAOYSA-N cyclohexylamine Chemical compound NC1CCCCC1 PAFZNILMFXTMIY-UHFFFAOYSA-N 0.000 description 2
- 238000000280 densification Methods 0.000 description 2
- 239000004744 fabric Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052744 lithium Inorganic materials 0.000 description 2
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 2
- 229910052700 potassium Inorganic materials 0.000 description 2
- 239000011591 potassium Substances 0.000 description 2
- 238000007790 scraping Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229910052708 sodium Inorganic materials 0.000 description 2
- 239000011734 sodium Substances 0.000 description 2
- 230000001629 suppression Effects 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- SMZOUWXMTYCWNB-UHFFFAOYSA-N 2-(2-methoxy-5-methylphenyl)ethanamine Chemical compound COC1=CC=C(C)C=C1CCN SMZOUWXMTYCWNB-UHFFFAOYSA-N 0.000 description 1
- HZAXFHJVJLSVMW-UHFFFAOYSA-N 2-Aminoethan-1-ol Chemical compound NCCO HZAXFHJVJLSVMW-UHFFFAOYSA-N 0.000 description 1
- RJFMDYQCCOOZHJ-UHFFFAOYSA-L 2-hydroxyethyl(trimethyl)azanium dihydroxide Chemical compound [OH-].[OH-].C[N+](C)(C)CCO.C[N+](C)(C)CCO RJFMDYQCCOOZHJ-UHFFFAOYSA-L 0.000 description 1
- LWRBVKNFOYUCNP-UHFFFAOYSA-N 2-methyl-1-(4-methylsulfanylphenyl)-2-morpholin-4-ylpropan-1-one Chemical compound C1=CC(SC)=CC=C1C(=O)C(C)(C)N1CCOCC1 LWRBVKNFOYUCNP-UHFFFAOYSA-N 0.000 description 1
- ATRRKUHOCOJYRX-UHFFFAOYSA-N Ammonium bicarbonate Chemical compound [NH4+].OC([O-])=O ATRRKUHOCOJYRX-UHFFFAOYSA-N 0.000 description 1
- 239000004254 Ammonium phosphate Substances 0.000 description 1
- OYPRJOBELJOOCE-UHFFFAOYSA-N Calcium Chemical compound [Ca] OYPRJOBELJOOCE-UHFFFAOYSA-N 0.000 description 1
- QUSNBJAOOMFDIB-UHFFFAOYSA-N Ethylamine Chemical compound CCN QUSNBJAOOMFDIB-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- NXQNMWHBACKBIG-UHFFFAOYSA-N OC(=O)C=C.OC(=O)C=C.OC(=O)C=C.CCCC(O)(O)O Chemical compound OC(=O)C=C.OC(=O)C=C.OC(=O)C=C.CCCC(O)(O)O NXQNMWHBACKBIG-UHFFFAOYSA-N 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- GSEJCLTVZPLZKY-UHFFFAOYSA-N Triethanolamine Chemical compound OCCN(CCO)CCO GSEJCLTVZPLZKY-UHFFFAOYSA-N 0.000 description 1
- DAKWPKUUDNSNPN-UHFFFAOYSA-N Trimethylolpropane triacrylate Chemical compound C=CC(=O)OCC(CC)(COC(=O)C=C)COC(=O)C=C DAKWPKUUDNSNPN-UHFFFAOYSA-N 0.000 description 1
- 150000008065 acid anhydrides Chemical class 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 229910052783 alkali metal Inorganic materials 0.000 description 1
- 229910000288 alkali metal carbonate Inorganic materials 0.000 description 1
- 150000008041 alkali metal carbonates Chemical class 0.000 description 1
- 229910052936 alkali metal sulfate Inorganic materials 0.000 description 1
- 150000001340 alkali metals Chemical class 0.000 description 1
- 229910052784 alkaline earth metal Inorganic materials 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 239000001099 ammonium carbonate Substances 0.000 description 1
- 235000012501 ammonium carbonate Nutrition 0.000 description 1
- 229910000148 ammonium phosphate Inorganic materials 0.000 description 1
- 235000019289 ammonium phosphates Nutrition 0.000 description 1
- 238000004873 anchoring Methods 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 229910052791 calcium Inorganic materials 0.000 description 1
- 239000011575 calcium Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003153 chemical reaction reagent Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 239000007822 coupling agent Substances 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 239000013530 defoamer Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- MNNHAPBLZZVQHP-UHFFFAOYSA-N diammonium hydrogen phosphate Chemical compound [NH4+].[NH4+].OP([O-])([O-])=O MNNHAPBLZZVQHP-UHFFFAOYSA-N 0.000 description 1
- ZBCBWPMODOFKDW-UHFFFAOYSA-N diethanolamine Chemical compound OCCNCCO ZBCBWPMODOFKDW-UHFFFAOYSA-N 0.000 description 1
- 229940043237 diethanolamine Drugs 0.000 description 1
- HPNMFZURTQLUMO-UHFFFAOYSA-N diethylamine Chemical compound CCNCC HPNMFZURTQLUMO-UHFFFAOYSA-N 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
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- 238000007756 gravure coating Methods 0.000 description 1
- 239000012943 hotmelt Substances 0.000 description 1
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 1
- 238000001802 infusion Methods 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 239000011777 magnesium Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229910052753 mercury Inorganic materials 0.000 description 1
- 239000000693 micelle Substances 0.000 description 1
- 210000003205 muscle Anatomy 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
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- 239000002245 particle Substances 0.000 description 1
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- 238000001556 precipitation Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 238000005096 rolling process Methods 0.000 description 1
- 239000010458 rotten stone Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 238000003756 stirring Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000004094 surface-active agent Substances 0.000 description 1
- 239000000454 talc Substances 0.000 description 1
- 235000012222 talc Nutrition 0.000 description 1
- 229910052623 talc Inorganic materials 0.000 description 1
- 229940073455 tetraethylammonium hydroxide Drugs 0.000 description 1
- LRGJRHZIDJQFCL-UHFFFAOYSA-M tetraethylazanium;hydroxide Chemical compound [OH-].CC[N+](CC)(CC)CC LRGJRHZIDJQFCL-UHFFFAOYSA-M 0.000 description 1
- 230000008719 thickening Effects 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- 229940096522 trimethylolpropane triacrylate Drugs 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/288—Removal of non-metallic coatings, e.g. for repairing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09845—Stepped hole, via, edge, bump or conductor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Abstract
The present invention is a manufacturing method for a wiring board, which is characterized in including steps for: (A) forming solder mask layers of different thickness on both surfaces of a circuit board; (C1) for a solder mask layer of a first surface which is of thinner thickness than a solder mask layer of a second surface, exposing portions other than areas to be thinned in step (B), which is a later step; (C2) for the solder mask layer of the second surface, exposing portions other than areas to be developed in step (D), which is a later step; (B) by way of a thin-film processing solution, thinning the solder mask layer of the first surface of the non-exposed portions until reaching thicknesses that are less than or equal to connection pads; (C3) for the solder mask layer of the first surface, exposing the area-portions that have been thinned in step (B); and (D) removing, by way of a developer solution, the solder mask layers of the non-exposed portions of the second surface.
Description
Technical field
The present invention relates to the manufacture method of circuit board, relate in more detail and having for connecting semiconductor chip, other the manufacture method of circuit board of multiple connection pads of the electronic unit such as printed wiring board.
Background technology
The circuit board of various electric device interior has circuit substrate on its single surface or two sides, and described circuit substrate has insulating barrier and is formed in the conductor wiring on surface of insulating barrier.In addition, on the circuit substrate surface of circuit board, being not attached to the conductor wiring not needing to weld to make solder, forming solder mask on the whole surface of the part of not welding.The oxidation that this solder mask realizes conductor wiring prevents, electric insulation and from the such effect of the protection of external environment condition.
In addition, circuit board is mounted with the electronic units such as semiconductor chip, the many connection pads for being connected with semiconductor chip, other the electronic unit such as printed wiring board are formed on the surface of circuit board.Connect pad and expose making by the entirety or a part making the conductor wiring on circuit substrate surface from solder mask.In recent years, the densification development of this connection pad, the connection pad spacing each other of configuration narrows, and such as, has the thin space of less than 50 μm.
As the method for loading electronic unit at the connection pad configured to high-density, there is the method utilizing flip-chip to connect.It is instigate to be arranged on electronic unit on circuit board and to connect corresponding with the configuration of the electrode terminal of the part with electronic unit that connect pad and expose and this electronic unit is connected and be electrically connected via soldering projection in opposite directions with the electrode terminal of the exposed division with electronic unit that connect pad that flip-chip connects.
Exist in connection pad: partly remove solder mask and make the SMD(SolderMaskDefined that the entirety of connection bond pad surface or a part are exposed, solder mask limits) construct and partly remove solder mask and make the NSMD(NonSolderMaskDefined that connection pad exposes completely, non-solder mask limits) structure.
Figure 1A is the summary section of the example that the circuit board with SMD structure is shown.Be provided with conductor wiring 7 on insulating barrier 8 surface and be formed with solder mask 2 as circuit substrate 1 surface of the connection pad 3 of a part for conductor wiring.About connection pad 3, its near its circumference is coated by solder mask 2 institute.Therefore, there is the such advantage of broken string being difficult to cause the peeling off of the connection pad 3 that causes due to mechanical shock, neck from the lead-out wiring connecting pad 3.Its reverse side is, the amount of solder guaranteeing to be formed in required for the junction surface of the exposed surface connecting pad 3 is needed in order to the electrical connection of the electrode terminal and the connection pad 3 corresponding with it of reliably fixing electronic unit, connect pad 3 to maximize, therefore, the requirement of the densification tackled along with the miniaturization of electronic unit and the connection pad 3 of high performance is difficult to.
Figure 1B is the summary section of the example that the circuit board with NSMD structure is shown.Be provided with conductor wiring 7 on insulating barrier 8 surface and form solder mask 2 as circuit substrate 1 surface of the connection pad 3 of a part for conductor wiring.In the same opening of solder mask 2, be configured with multiple connection pad 3, these connect pad 3 and expose from solder mask 2.In NSMD structure, about connection pad 3, the solder mask 2 near around it is completely removed, and the side connecting pad 3 is fully exposed.Therefore, compared with constructing with SMD, even little connection pad 3, the adhesive strength connecting pad 3 and solder also can be guaranteed.Its reverse side is, the side connecting pad 3 is fully exposed, and thus, there is the possibility connecting the adhesive strength between pad 3 and insulating barrier 8 and reduce.In addition, in the connection pad 3 configured with thin space, exist due to the plating of the electroless in rear operation/gold connect be short-circuited between pad 3 situation, when want connect pad 3 arranges soldering projection time melting after solder flow out to adjacent connection pad 3 and connecting situation about being short-circuited between pad 3.
In order to solve the problem of the adhesive strength connected between pad and insulating barrier, propose following method: irradiated by laser and be arranged at the peristome of a part of Formation Depth about 0 ~ 15 μm of solder mask on circuit substrate surface, thus, the printed wiring board (for example, referring to patent documentation 1) of the structure that the part that manufacture has connection pad side is exposed from solder mask.Use the printed wiring board obtained by the method described in patent documentation 1, thus, compared with the printed wiring board making the connection pad of the bottom being present in solder mask fully expose, the adhesive strength connected between pad and insulating barrier can be improved.
In addition, in order to solve with the problem of the short circuit in the connection pad 3 of thin space configuration, following method is proposed: be manufactured on the circuit board (for example, referring to patent documentation 2) being filled with solder mask 2 between adjacent connection pad 3.According to the method for patent documentation 2, can be formed as shown in Figure 2 connect be filled with solder mask 2 between pad 3 and the thickness position of the solder mask 2 of filling connect pad 3 thickness below NSMD structure.Particularly, circuit substrate 1 is formed solder mask 2, to making the thickness thin film of solder mask 2 until become connect pad 3 thickness below region beyond part expose, afterwards, utilize the filming treatment fluid as alkaline aqueous solution to make solder mask 2 filming in non-exposed portion until become connect pad 3 thickness below.Thus, the solder mask 2 of multi-stage configuration of the part having and comprise below the thickness connecting pad 3 and the part exceeding the thickness being connected pad 3 is formed, the circuit board that the conductor wiring that can create a part for connection pad 3 exposes.
Usually, in the circuit board of device electronic unit, form many outsides overleaf to high-density and connect with connecting pad.Outside connection also exposes making by a part for the conductor wiring at the circuit substrate back side from solder mask with connecting pad.This outside being connected with connecting the conductor wiring of the outside electric substrates such as the exposed division of pad and motherboard in opposite directions, being electrically connected via soldering projection.
When the two sides of circuit substrate forms solder mask, the thickness connecting the solder mask on pad according to comprise connection pad its around conductor wiring density and change.Such as, when the density of conductor wiring is little, the quantitative change of the solder mask of the gap-fill between conductor wiring is many, and the thickness connecting the solder mask on pad has thinning trend.On the other hand, when the density of conductor wiring is large, the quantitative change of the solder mask of the gap-fill between conductor wiring is few, and the thickness connecting the solder mask on pad has thickening trend.
When connecting by flip-chip the circuit board loading electronic unit, exist to connect with the electronic unit comprising surface with connect pad its around conductor wiring density compared with comprise the back side outside connect with connect pad its around the large situation of the density of conductor wiring.Therefore, the outside that there is the back side connects and connects by the thick situation of the thickness of the solder mask connected on pad with the electronic unit on the Thickness Ratio surface of the solder mask connected on pad.Utilizing filming treatment fluid to make solder mask filming in the method making connection pad and expose, when want two sides side by side filming, there is the situation producing following such problem.
First, when will make solder mask 2 filming on surface until become electronic unit connect situation below with the thickness connecting pad 3 as benchmark, the solder mask 2 at the back side is also simultaneously by amount that filming is identical with surface, but, the solder mask 2 of solder mask 2 specific surface at the back side is thick, therefore, there is following situation: the outside connection that solder mask 2 stays the back side as residue and residual produces due to the bad such problem (Fig. 3) of this residue generation electric insulation with connecting on pad 4.
On the contrary, when will make solder mask 2 filming at the back side until become outside connect situation below with the thickness connecting pad 4 as benchmark, the solder mask 2 on surface is also simultaneously by amount that filming is identical with the back side, but, the solder mask 2 of solder mask 2 specific surface at the back side is thick, therefore, there is following situation: produce the electronic unit connection problem that the electronic unit connection short circuit connected between pad 3 that is that occur to adjoin is such with the thickness of the Thickness Ratio expectation connecting the solder mask 2 of filling between pad 3 is thin on surface.
But, circuit substrate carries out electronic unit in the printed wiring board of flip-chip connection, in order to ensure the connection reliability of electronic unit and circuit substrate, the space of being filled electronic unit and circuit substrate by underfill (sealing resin) is strengthened.In order to ensure increase effect, the underfill must measured fully at the fill gaps of electronic unit and circuit substrate.But, when using the printed wiring board utilizing patent documentation 1 to obtain to carry out the chip of falling stake connection, when being filled with sufficient underfill in order to ensure enhancing effect, there is underfill and overflow towards periphery from the space of electronic unit and circuit substrate and electricity work caused to the situation of bad influence.Therefore, in order to prevent underfill from overflowing towards periphery, propose the printed wiring board (for example, referring to patent documentation 3 ~ 5) with dam structure.
In patent documentation 3, disclose following method: define solder mask on the circuit substrate with conductor circuit after, carry out Partial exposure, afterwards development treatment is carried out to unexposed portion, thus, form the peristome that connection pad top is partly exposed from solder mask, then, carry out secondary Partial exposure, utilize the unexposed portion of abatement processes to secondary Partial exposure to carry out filming afterwards, form dam shape.Utilize the peristome of the solder mask of the method to be SMD structure, therefore, be difficult to reliably fix the electrode terminal of electronic unit and the electrical connection of the connection pad corresponding with it, there is the situation that the electrical connection of connection pad and solder ball is insufficient.In addition, the formation utilizing the dam of the method to construct is undertaken by abatement processes, and therefore, solder mask is by matsurface, and thus, the intensity of solder mask reduces, and there is the situation can not guaranteeing the reliability of printed wiring board fully.
In patent documentation 4, disclose following method: define solder mask on the circuit substrate with conductor circuit after, carry out Partial exposure, afterwards development treatment is carried out to unexposed portion, thus, form the peristome that connection pad is fully exposed from solder mask, then, after defining secondary solder resist, secondary Partial exposure that the unexposed portion carrying out 1 circle larger than primary partial exposure area occurs, developed in unexposed portion afterwards, thus, form dam shape.Utilize the peristome of the solder mask of the method to be NSMD structure, about connection pad, the solder mask of its near its circumference is completely removed, and the side connecting pad is fully exposed, and thus, there is the possibility connecting the adhesive strength between pad and insulating barrier and reduce.
In patent documentation 5, disclose following method: define solder mask on the circuit substrate with conductor circuit after, carry out Partial exposure operation, afterwards filming is carried out to the solder mask in unexposed portion, thus, peristome and dam shape is formed at solder mask.The peristome of the solder mask of the method is utilized to be SMD structure, about connection pad, its near its circumference is coated by solder mask institute, therefore, be difficult to reliably fix the electrode terminal of electronic unit and the electrical connection of the connection pad corresponding with it, there is the situation that the electrical connection of connection pad and solder ball is insufficient.
Prior art document
Patent documentation
Patent documentation 1: Japanese Patent No. 3346263 publications;
Patent documentation 2: International Publication No. 2012/043201 book;
Patent documentation 3: Japanese Unexamined Patent Publication 2012-238668 publication;
Patent documentation 4: Japanese Unexamined Patent Publication 05-226505 publication;
Patent documentation 5: Japanese Unexamined Patent Publication 2011-77191 publication.
Summary of the invention
The problem that invention will solve
Problem of the present invention is the manufacture method providing a kind of circuit board, described circuit board has the circuit substrate of the connection pad on the surface having insulating barrier on two sides and be formed in insulating barrier, on the two sides of circuit substrate, there is solder mask, the part connecting pad is exposed from solder mask, there is not electrical short on the two sides of circuit board in the manufacture method of described circuit board, the residue of not residual solder mask on the connection pad exposed between the connection pad exposed from solder mask.In addition, other problem of the present invention is the manufacture method providing a kind of printed wiring board, the manufacture method of described printed wiring board can obtain connecting pad and insulating barrier and be connected the adhesive strength of pad and solder high, flow out the high printed wiring board of the electricity work caused intensity that is not good, solder mask less than due to underfill.
For solving the scheme of problem
The present inventors in order to solve that above-mentioned problem discusses with keen determination as a result, found to solve above-mentioned problem by following invention.
(1) a kind of manufacture method of circuit board, described circuit board has the circuit substrate on two sides with insulating barrier and the connection pad formed on the surface of insulating barrier and has solder mask on the two sides of circuit substrate and the part being connected pad is exposed from solder mask, the feature of described manufacture method is, comprises:
(A) form the operation of the different solder mask of thickness on the two sides of circuit substrate, described circuit substrate has insulating barrier and is formed in the connection pad on surface of insulating barrier on two sides;
(C1) for the solder mask of the thin first surface of the solder mask of Thickness Ratio second to the operation exposed by the part beyond the region of filming in as the operation (B) of rear operation;
(C2) for the operation that the solder mask of second exposes the part beyond the region be developed in as the operation (D) of rear operation;
(B) first surface utilize filming treatment fluid to make the solder mask filming in non-exposed portion until become connect pad thickness below expose the operation of a part connecting pad;
(C3) for the operation that the solder mask of first surface exposes the area part after filming in operation (B); And
(D) developer solution is utilized to remove the operation of the solder mask in the non-exposed portion of second.
(2) a kind of manufacture method of circuit board, described circuit board has the circuit substrate on two sides with insulating barrier and the connection pad formed on the surface of insulating barrier and has solder mask on the two sides of circuit substrate and the part being connected pad is exposed from solder mask, the feature of described manufacture method is, comprises:
(A) form the operation of the different solder mask of thickness on the two sides of circuit substrate, described circuit substrate has insulating barrier and is formed in the connection pad on surface of insulating barrier on two sides;
(C1) for the solder mask of the thin first surface of the solder mask of Thickness Ratio second to the operation exposed by the part beyond the region of filming in as the operation (B1) of rear operation;
(C2) for the operation that the solder mask of second exposes the part beyond the region be developed in as the operation (D) of rear operation;
(B1) filming treatment fluid is utilized the solder mask in non-exposed portion to be carried out to the operation of filming in the scope that connection pad does not expose at first surface;
(C4) for the solder mask of first surface to the operation exposed by the part beyond the region of filming in as the operation (B2) of rear operation;
(B2) first surface utilize filming treatment fluid to make the solder mask filming in non-exposed portion until become connect pad thickness below expose the operation of a part connecting pad;
(C5) for the operation that the solder mask of first surface exposes the area part after filming in operation (B2); And
(D) developer solution is utilized to remove the operation of the solder mask in the non-exposed portion of second.
(3) a kind of manufacture method of circuit board, described circuit board has the circuit substrate on two sides with insulating barrier and the connection pad formed on the surface of insulating barrier and has solder mask on the two sides of circuit substrate and the part being connected pad is exposed from solder mask, the feature of described manufacture method is, comprises:
(A1) form the operation of different the first solder mask of thickness on the two sides of circuit substrate, described circuit substrate has insulating barrier and is formed in the connection pad on surface of insulating barrier on two sides;
(C1) for the first solder mask of the thin first surface of the first solder mask of Thickness Ratio second to the operation exposed by the part beyond the region of filming in as the operation (B) of rear operation;
(C2) for the operation that first solder mask of second exposes the part beyond the region be developed in as the operation (D1) of rear operation;
(B) first surface utilize filming treatment fluid to make the first solder mask filming in non-exposed portion until become connect pad thickness below expose the operation of a part connecting pad;
(C3) for the operation that the first solder mask of first surface exposes the area part after filming in operation (B);
(A2) be accomplished to (C3) operation circuit substrate first surface the first solder mask on form the operation of the second solder mask;
(C6) for the operation that the second solder mask of first surface exposes the part beyond the region be developed in as the operation (D1) of rear operation; And
(D1) utilize developer solution to the operation of first solder mask in the non-exposed portion of the second solder mask and second that remove the non-exposed portion of first surface.
(4) a kind of manufacture method of circuit board, described circuit board has the circuit substrate on two sides with insulating barrier and the connection pad formed on the surface of insulating barrier and has solder mask on the two sides of circuit substrate and the part being connected pad is exposed from solder mask, the feature of described manufacture method is, comprises:
(A1) form the operation of different the first solder mask of thickness on the two sides of circuit substrate, described circuit substrate has insulating barrier and is formed in the connection pad on surface of insulating barrier on two sides;
(C1) for the first solder mask of the thin first surface of the first solder mask of Thickness Ratio second to the operation exposed by the part beyond the region of filming in as the operation (B) of rear operation;
(C2) for the operation that first solder mask of second exposes the part beyond the region be developed in as the operation (D) of rear operation;
(B) first surface utilize filming treatment fluid to make the first solder mask filming in non-exposed portion until become connect pad thickness below expose the operation of a part connecting pad;
(C3) for the operation that the first solder mask of first surface exposes the area part after filming in operation (B);
(D) developer solution is utilized to remove the operation of first solder mask in the non-exposed portion of second;
(A2) be accomplished to (D) operation circuit substrate first surface the first solder mask on form the operation of the second solder mask;
(C6) for the operation that the second solder mask of first surface exposes the part beyond the region be developed in as the operation (D2) of rear operation; And
(D2) utilize developer solution to remove the operation of second solder mask in the non-exposed portion of first surface.
(5) a kind of manufacture method of circuit board, described circuit board has the circuit substrate on two sides with insulating barrier and the connection pad formed on the surface of insulating barrier and has solder mask on the two sides of circuit substrate and the part being connected pad is exposed from solder mask, the feature of described manufacture method is, comprises:
(A1) form the operation of different the first solder mask of thickness on the two sides of circuit substrate, described circuit substrate has insulating barrier and is formed in the connection pad on surface of insulating barrier on two sides;
(C2) for the operation that first solder mask of second exposes the part beyond the region be developed in as the operation (D1) of rear operation;
(B) first surface utilize filming treatment fluid to make the first solder mask filming in non-exposed portion until become connect pad thickness below expose the operation of a part connecting pad;
(C3) for the operation that the first solder mask of first surface exposes the area part after filming in operation (B);
(A2) be accomplished to (C3) operation circuit substrate first surface the first solder mask on form the operation of the second solder mask;
(C6) for the second solder mask of first surface to the operation exposed by the part beyond the region of filming in as the operation (B3) of rear operation;
(B3) filming treatment fluid is utilized second solder mask in non-exposed portion to be carried out to the operation of filming in the scope that connection pad does not expose at first surface;
(C7) for the operation that the second solder mask of first surface exposes the part beyond the region be developed in as the operation (D1) of rear operation; And
(D1) utilize developer solution to the operation of first solder mask in the non-exposed portion of the second solder mask and second that remove the non-exposed portion of first surface.
(6) manufacture method of the circuit board according to any one of above-mentioned (1) ~ (4), wherein, carried out operation (C2) before operation (C1).
(7) manufacture method of the circuit board according to any one of above-mentioned (1) ~ (4), wherein, carries out operation (C1) and operation (C2) simultaneously.
(8) manufacture method of the circuit board according to any one of above-mentioned (1), (3), (4), wherein, the exposure in operation (C3) is undertaken by noncontact Exposure mode under an oxygen atmosphere.
(9) manufacture method of the circuit board according to above-mentioned (5), wherein, the exposure in operation (C3) and operation (C7) is undertaken by noncontact Exposure mode under an oxygen atmosphere.
(10) manufacture method of the circuit board according to above-mentioned (2), wherein, the exposure in operation (C4) and operation (C5) is undertaken by noncontact Exposure mode under an oxygen atmosphere.
(11) manufacture method of the circuit board according to any one of above-mentioned (1), (3), (4), (8), wherein, the exposure in operation (C3) is more than 1 times less than 5 times of the exposure in operation (C1).
(12) manufacture method of the circuit board according to above-mentioned (5) or (9), wherein, the exposure in operation (C3) and operation (C7) is more than 1 times less than 5 times of the exposure in operation (C6).
(13) manufacture method of the circuit board according to above-mentioned (2) or (10), wherein, the exposure in operation (C4) and operation (C5) is more than 1 times less than 5 times of the exposure in operation (C1).
(14) manufacture method of the circuit board according to any one of above-mentioned (1), (3), (4), (8), (11), wherein, the filming process of the solder mask in operation (B) with make filming treated side be on mode carry out.
(15) manufacture method of the circuit board according to any one of above-mentioned (5), (9), (12), wherein, the filming process of the solder mask in operation (B) and operation (B3) with make filming treated side be on mode carry out.
(16) manufacture method of the circuit board according to any one of above-mentioned (2), (10), (13), wherein, the filming process of the solder mask in operation (B1) and operation (B2) with make filming treated side be on mode carry out.
Invention effect
According to the present invention, a kind of manufacture method of circuit board can be provided, described circuit board has the circuit substrate of the connection pad on the surface having insulating barrier on two sides and be formed in insulating barrier, on the two sides of circuit substrate, there is solder mask, the part connecting pad is exposed from solder mask, between the connection pad exposed from solder mask, electrical short is there is not in the manufacture method of described circuit board on the two sides of circuit board, in addition, and the residue of not residual solder mask on the connection pad exposed.In addition, according to the present invention, the manufacture method of printed wiring board can be provided, the manufacture method of described printed wiring board can obtain connecting pad and insulating barrier and be connected the adhesive strength of pad and solder high, flow out the high printed wiring board of the electricity work caused intensity that is not good, solder mask less than due to underfill.
Accompanying drawing explanation
Fig. 1 is the summary section of the example that circuit board is shown.
Fig. 2 is the summary section of the example that circuit board is shown.
Fig. 3 is the summary section of the example that circuit board is shown.
Fig. 4 is the section process chart of an example of the manufacture method that circuit board of the present invention is shown.
Fig. 5 is the section process chart of an example of the manufacture method that circuit board of the present invention is shown.
Fig. 6 is the section process chart of an example of the manufacture method that circuit board of the present invention is shown.
Fig. 7 is the section process chart of an example of the manufacture method that circuit board of the present invention is shown.
Fig. 8 is the section process chart of an example of the manufacture method that circuit board of the present invention is shown.
Fig. 9 is the summary section of the example that the circuit board that the present invention can be utilized to manufacture is shown.
Figure 10 is the summary section of the example that the circuit board that the present invention can be utilized to manufacture is shown.
Figure 11 is the summary section of the example that the circuit board that the present invention can be utilized to manufacture is shown.
Figure 12 is the summary section of the example that the circuit board that the present invention can be utilized to manufacture is shown.
Figure 13 is the summary section of the example that Mulitilayer circuit board is shown.
Embodiment
Below, the manufacture method of circuit board of the present invention is described in detail.
Fig. 4-1 and Fig. 4-2 is section process charts of an example of the manufacture method (1) that circuit board is shown.Prepare the circuit substrate of the conductor wiring 7 on the surface that there is on two sides insulating barrier 8 and be formed in insulating barrier 8.A part for conductor wiring 7 connects pad 3 and 4.In operation (A), form welding resistance (solderresist) layer 2 on the two sides of circuit substrate 1 in the mode covering whole surface.The formation of the solder mask 2 of first surface and second can be two sides simultaneously, also can be one side one side ground, but needing to set according to the thickness of formed solder mask can not such heating condition of excessively hot curing.The thickness of the solder mask 2 on two sides is different, and one that thickness is thin is " first surface ", and one that thickness is thick is " the second face ".When two sides defines solder mask 2 with identical condition, the thickness of solder mask 2 according to comprise each connection pad 3 and 4 conductor wiring 7 density and change.In Fig. 4-1, the density of second conductor wiring 7 compared with the first surface of upside of downside is larger, and the thickness of the solder mask 2 on the conductor wiring 7 of the Thickness Ratio first surface of the solder mask 2 on the conductor wiring 7 of second is thick.Have again, when loading the circuit board of electronic unit, exist the outside comprising the back side connect with connect pad 4 its around conductor wiring 7 density with comprise surperficial electronic unit connect with connect pad 3 its around conductor wiring 7 density compared with large situation, surface is first surface, and the back side is second.
In operation (C1), for the solder mask 2 of first surface, exposed by the part beyond the region of filming in as the operation (B) of rear operation.In operation (C2), for the solder mask 2 of second, the part beyond the region be developed in as the operation (D) of rear operation is exposed.In the part be exposed of solder mask 2, solder resist carries out photo polymerization, has patience for filming operation and developing procedure.
In operation (B), at first surface, utilize the solder mask 2 of filming treatment fluid to non-exposed portion to carry out filming until become connect pad 3 thickness below a part for connection pad 3 is exposed.When loading the circuit board of electronic unit, being used in the connection pad 3 exposed in this operation (B) and being used as electronic unit connection with connecting pad 3.In operation (B), the solder mask 2 in the non-exposed portion of second also simultaneously by filming, but, compared with the solder mask 2 on the connection pad 3 of first surface, solder mask 2 on the connection pad 4 of second is thicker, therefore, is connecting residue pad 4 remaining solder mask 2.
In operation (C3), for the solder mask 2 of first surface, the area part after filming in operation (B) is exposed.In the part be exposed of solder mask 2, solder resist carries out photo polymerization, has patience for developing procedure.
In operation (D), at second, utilize developer solution to remove the solder mask 2 in non-exposed portion, a part for connection pad 4 is exposed.The residue of the solder mask 2 connected on pad 4 is remained in by operation (D) removing.When loading the circuit board of electronic unit, being used in the connection pad 4 exposed in this operation (D) and being used as outside connection with connecting pad 4.In the solder mask 2 of first surface, be exposed in the operation (C3) that the area part in operation (B) after filming carried out before operation (D), there is the patience for developing procedure, therefore, liquid removing can not be developed.
In the manufacture method (1) of circuit board, the exposure area of operation (C1) can be made to be changed to arbitrary shape, the circuit board of production example section shape as shown in Figure 9 can be carried out by the change of exposure area.In a of Fig. 9, between the connection pad 3 of first surface, be formed with the protuberance of solder mask 2.In the b of Fig. 9, at first surface, the connection pad 3 exposed from solder mask 2 and alternately being arranged by the conductor wiring 7 that solder mask 2 is coated.
Fig. 5-1, Fig. 5-2 and Fig. 5-3 is section process charts of an example of the manufacture method (2) that circuit board is shown.With the manufacture method (1) of circuit board be not all following aspect: at first surface, add exposure process and the filming operation of solder mask 2 respectively again and again.When electronic unit being loaded into circuit board by flip-chip (flipchip) connection, there is following situation: due to the difference of the thermal coefficient of expansion of electronic unit and circuit board, when applying thermal shock, stress concentrates on connecting portion and causes the distortion of connecting portion, destruction.Improving connection reliability to prevent stress from concentrating to connecting portion, usually using the resin combination being called as underfill (underfill) to come between encapsulated electronic components and circuit board.By the manufacture method (2) of circuit board, can form the solder mask of the second configuration with dam structure, described dam structure is the structure for blocking the underfill of filling between electronic unit and circuit board.
In operation (A), form solder mask 2 on the two sides of circuit substrate 1 in the mode covering whole surface.In operation (C1), for the solder mask 2 of first surface, exposed by the part beyond the region of filming in as the operation (B1) of rear operation.In operation (C2), for the solder mask 2 of second, the part beyond the region be developed in as the operation (D) of rear operation is exposed.
In operation (B1), at first surface, filming treatment fluid is utilized to carry out filming to the solder mask 2 in non-exposed portion in the scope that connection pad 3 does not expose.In operation (B1), the solder mask 2 in the non-exposed portion of second is also simultaneously by filming.
In operation (C4), for the solder mask 2 of first surface, the part beyond the region of the middle filming of operation (B2) as rear operation is exposed.
In operation (B2), at first surface, utilize the solder mask 2 of filming treatment fluid to non-exposed portion to carry out filming until become connect pad 3 thickness below a part for connection pad 3 is exposed.When loading the circuit board of electronic unit, being used in the connection pad 3 exposed in this operation (B2) and being used as electronic unit connection with connecting pad 3.In operation (B2), the solder mask 2 in the non-exposed portion of second also simultaneously by filming, but, compared with the solder mask 2 on the connection pad 3 of first surface, solder mask 2 on the connection pad 4 of second is thicker, therefore, is connecting residue pad 4 remaining solder mask 2.
In operation (C5), for the solder mask 2 of first surface, the area part after filming in operation (B2) is exposed.
In operation (D), at second, utilize developer solution to remove the solder mask 2 in non-exposed portion, a part for connection pad 4 is exposed.The residue of the solder mask 2 connected on pad 4 is remained in by operation (D) removing.When loading the circuit board of electronic unit, being used in the connection pad 4 exposed in this operation (D) and being used as outside connection with connecting pad 4.
In the manufacture method (2) of circuit board, the exposure area of operation (C4) can be made to be changed to arbitrary shape, the circuit board of production example section shape as shown in Figure 10 can be carried out by the change of exposure area.In the c of Figure 10, between the connection pad 3 of first surface, be formed with the protuberance of solder mask 2.In the d of Figure 10, at first surface, the connection pad 3 exposed from solder mask 2 and alternately being arranged by the conductor wiring 7 that solder mask 2 is coated.
Fig. 6-1, Fig. 6-2 and Fig. 6-3 is section process charts of an example of the manufacture method (3) that circuit board is shown.With the manufacture method (2) of circuit board be not all following aspect: the solder mask of first surface is made up of the first solder mask 2-1 and the second solder mask 2-2.In the manufacture method (3) of circuit board, the thickness of the first solder mask 2-1 in the non-exposed portion to first surface carry out filming until become connect pad 3 thickness below, the surface of the first solder mask 2-1 is formed the second solder mask 2-2, after exposition, development treatment is carried out to the second solder mask 2-2 in non-exposed portion.Thus, identical with the situation of the manufacture method (2) employing circuit board, can form the solder mask of the second configuration with dam structure, described dam structure is the structure for blocking the underfill of filling between electronic unit and circuit board.
In operation (A1), form the first different solder mask 2-1 of thickness at the first surface of circuit substrate 1 with second.The formation of the first solder mask 2-1 of first surface and second can be two sides simultaneously, also can be one side one side ground, but needing to set according to the thickness of formed solder mask can not such heating condition of excessively hot curing.
In operation (C1), for the first solder mask 2-1 of the thin first surface of the first solder mask 2-1 of Thickness Ratio second, exposed by the part beyond the region of filming in as the operation (B) of rear operation.In operation (C2), for the first solder mask 2-1 of second, the part beyond the region be developed in as the operation (D1) of rear operation is exposed.
In operation (B), at first surface, utilize the first solder mask 2-1 of filming treatment fluid to non-exposed portion to carry out filming until become connect pad 3 thickness below a part for connection pad 3 is exposed.In operation (B), the first solder mask 2-1 in the non-exposed portion of second is also simultaneously by filming.But compared with the first solder mask 2-1 on the connection pad 3 of first surface, the first solder mask 2-1 on the connection pad 4 of second is thicker, therefore, residue pad 4 remaining the first solder mask 2-1 is being connected.
In operation (C3), for the first solder mask 2-1 of first surface, the area part after filming in operation (B) is exposed.
In operation (A2), be accomplished to operation (C3) circuit substrate first surface the first solder mask 2-1 on formation second solder mask 2-2.Now, adjust the heating condition of the second solder mask 2-2 putting on first surface, the non-exposed portion of the first solder mask 2-1 of second can not excessively hot curing.
In operation (C6), for the second solder mask 2-2 of first surface, the part beyond the region be developed in as the operation (D1) of rear operation is exposed.
In operation (D1), utilize developer solution to remove the first solder mask 2-1 in the non-exposed portion of the second solder mask 2-2 and second in the non-exposed portion of first surface, a part for connection pad 3 and 4 is exposed.The residue of the first solder mask 2-1 connected on pad 4 is remained in by operation (D1) removing.When loading the circuit board of electronic unit, being used in the connection pad 3 exposed in this operation (D1) and being used as electronic unit connection with connecting pad 3, using connection pad 4 to be used as outside connection with connecting pad 4.
Fig. 7-1, Fig. 7-2 and Fig. 7-3 is section process charts of an example of the manufacture method (4) that circuit board is shown.With the manufacture method (3) of circuit board be not all following aspect: before forming the second solder mask 2-2 of first surface, utilize developer solution to remove the first solder mask 2-1 of second.First utilize developer solution to remove the first solder mask 2-1 in the non-exposed portion of second, thus, when forming the second solder mask 2-2 of first surface, not needing the first solder mask 2-1 in the non-exposed portion of simultaneously heating second and the mode of excessively hot curing can not adjust heating condition.In the manufacture method (4) of circuit board, identical with the situation of (3) with the manufacture method (2) employing circuit board, can form the solder mask of the second configuration with dam structure, described dam structure is the structure for blocking the underfill of filling between electronic unit and circuit board.
In operation (A1), form the first different solder mask 2-1 of thickness at the first surface of circuit substrate 1 with second.In operation (C1), for the first solder mask 2-1 of the thin first surface of the first solder mask 2-1 of Thickness Ratio second, exposed by the part beyond the region of filming in as the operation (B) of rear operation.In operation (C2), for the first solder mask 2-1 of second, the part beyond the region be developed in as the operation (D) of rear operation is exposed.
In operation (B), at first surface, utilize the first solder mask 2-1 of filming treatment fluid to non-exposed portion to carry out filming until become connect pad 3 thickness below a part for connection pad 3 is exposed.In operation (B), the first solder mask 2-1 in the non-exposed portion of second is also simultaneously by filming.But compared with the first solder mask 2-1 on the connection pad 3 of first surface, the first solder mask 2-1 on the connection pad 4 of second is thicker, therefore, connection pad 4 remains the first solder mask 2-1.
In operation (C3), for the first solder mask 2-1 of first surface, the area part after filming in operation (B) is exposed.
In operation (D), utilize developer solution to remove the first solder mask 2-1 in the non-exposed portion of second, a part for connection pad 4 is exposed.The residue remaining in the first solder mask 2-1 connected on pad 4 is removed by operation (D).When loading the circuit board of electronic unit, being used in the connection pad 4 exposed in this operation (D) and being used as outside connection with connecting pad 4.
In operation (A2), be accomplished to operation (D) circuit substrate first surface the first solder mask 2-1 on formation second solder mask 2-2.
In operation (C6), for the second solder mask 2-2 of first surface, the part beyond the region be developed in as the operation (D2) of rear operation is exposed.
In operation (D2), utilize developer solution to remove the second solder mask 2-2 in the non-exposed portion of first surface, a part for connection pad 3 is exposed.When loading the circuit board of electronic unit, being used in the connection pad 3 exposed in this operation (D2) and being used as electronic unit connection with connecting pad 3.
In the manufacture method (3) and (4) of circuit board, the exposure area of operation (C1) can be made to be changed to arbitrary shape, the circuit board of production example section shape as shown in figure 11 can be carried out by the change of exposure area.In the e of Figure 11, between the connection pad 3 of first surface, be formed with the protuberance of the first solder mask 2-1.In the f of Figure 11, the connection pad 3 exposed from the first solder mask 2-1 and alternately being arranged by the conductor wiring 7 that the first solder mask 2-1 is coated.
Fig. 8-1, Fig. 8-2 and Fig. 8-3 is section process charts of an example of the manufacture method (5) that circuit board is shown.In the manufacture method (5) of circuit board, at first surface, before the first solder mask 2-1 is exposed, filming process is carried out to the thickness of the first solder mask 2-1 until become connect pad 3 thickness below.Afterwards, the surface of the first solder mask 2-1 forms the second solder mask 2-2, after exposition, filming process is carried out to the second solder mask 2-2 in non-exposed portion, afterwards, again expose, development treatment is carried out to the second solder mask 2-2 in residual non-exposed portion.In the manufacture method (5) of circuit board, identical with the situation of manufacture method (2) ~ (4) employing circuit board, can form the solder mask of the second configuration with dam structure, described dam structure is the structure for blocking the underfill of filling between electronic unit and circuit board.
In operation (A1), form the first different solder mask 2-1 of thickness at the first surface of circuit substrate 1 with second.In operation (C2), for the first solder mask 2-1 of second, the part beyond the region be developed in as the operation (D1) of rear operation is exposed.
In operation (B), at first surface, utilize the first solder mask 2-1 of filming treatment fluid to non-exposed portion to carry out filming until become connect pad 3 thickness below a part for whole connection pads 3 is exposed.In operation (B), the first solder mask 2-1 in the non-exposed portion of second is also simultaneously by filming.But compared with the first solder mask 2-1 on the connection pad 3 of first surface, the first solder mask 2-1 on the connection pad 4 of second is thicker, therefore, residue pad 4 remaining the first solder mask 2-1 is being connected.
In operation (C3), for the first solder mask 2-1 of first surface, the area part after filming in operation (B) is exposed.
In operation (A2), be accomplished to operation (C3) circuit substrate first surface the first solder mask 2-1 on formation second solder mask 2-2.
In operation (C6), for the second solder mask 2-2 of first surface, exposed by the part beyond the region of filming in as the operation (B3) of rear operation.
In operation (B3), at first surface, filming treatment fluid is utilized to carry out filming to the second solder mask 2-2 in non-exposed portion in the scope that connection pad 3 does not expose.In operation (B3), the first solder mask 2-1 in the non-exposed portion of second is also simultaneously by filming.But, exist and connecting situation pad 4 remaining the residue of the first solder mask 2-1.
In operation (C7), for the second solder mask 2-2 of first surface, the part beyond the region be developed in as the operation (D1) of rear operation is exposed.
In operation (D1), utilize developer solution to remove the first solder mask 2-1 in the non-exposed portion of the second solder mask 2-2 and second in the non-exposed portion of first surface, a part for connection pad 3 is exposed again, makes a part for connection pad 4 expose simultaneously.The residue remaining in the first solder mask 2-1 connected on pad 4 is removed by operation (D1).When loading the circuit board of electronic unit, being used in the connection pad 3 exposed in this operation (D1) and being used as electronic unit connection with connecting pad 3, using connection pad 4 to be used as outside connection with connecting pad 4.
In the manufacture method (5) of circuit board, the exposure area of operation (C7) can be made to be changed to arbitrary shape, the circuit board of production example section shape as shown in figure 12 can be carried out by the change of exposure area.In the g of Figure 12, between the connection pad 3 of first surface, be formed with the protuberance of the second solder mask 2-2.In the h of Figure 12, the connection pad 3 exposed from the first solder mask 2-1 and alternately being arranged by the conductor wiring 7 that the first solder mask 2-1 and the second solder mask 2-2 is coated.
Circuit substrate 1 of the present invention has insulating barrier 8 and is formed in the connection pad 3 and 4 on surface of insulating barrier 8.Be formed with conductor wiring 7 on the surface of insulating barrier 8, connect the part that pad 3 and 4 is conductor wirings 7.Circuit board of the present invention has solder mask 2 on the two sides of circuit substrate 1, and the part connecting pad 3 and 4 is exposed from solder mask 2.When loading the circuit board of electronic unit, there is on surface electronic unit and connect with connecting pad 3, there is outside connection with connecting pad 4 overleaf.The electronic unit on surface is connected and engages with electronic unit with connecting pad 3, the outside at the back side is connected and engages with connecting the conductor wiring of pad 4 with outside electric substrate.
Such as the insulated substrate being equipped with conductor wiring alternately the insulating barrier of stacked assembling (build-up), conductor wiring to make circuit substrate of the present invention.Figure 13 A, B illustrate at the insulated substrate the being equipped with conductor wiring alternately summary section of an example of circuit substrate that makes of the insulating barrier of stacked assembling, conductor wiring.As Fig. 4 ~ 8 of section process chart of an example of manufacture method that circuit board of the present invention is shown, as illustrate the circuit board that the present invention can be utilized to manufacture an example summary section Fig. 9 ~ 12 in, describe and there is a layer insulating 8 and the circuit substrate 1 with the conductor wiring 7 on the two sides being formed in insulating barrier 8, but, as the circuit substrate 1 used in the manufacture method of circuit board of the present invention, comprise as Figure 13 A, B is like that at the insulating barrier of the insulated substrate being equipped with conductor wiring alternately stacked assembling, conductor wiring makes and has insulating barrier 8 on two sides and be formed in the circuit substrate 1 of conductor wiring 7 on surface of insulating barrier 8.As insulated substrate, such as, can enumerate the resin-made substrate be made up of the electrical insulating material etc. making the heat-curing resin such as bismaleimide-triazine resin, epoxy resin impregnated in glass cloth (glasscloth).As the insulating barrier of assembling, such as can enumerate to make in the same manner as insulated substrate heat-curing resin impregnated in glass cloth electrical insulating material, make the inorganic fillers such as silicon dioxide be dispersed in the electrical insulating material etc. of the heat-curing resins such as epoxy resin.Conductor wiring is such as formed by cancellation (subtractive) method, half addition (semi-additive) method, addition (additive) method etc.In elimination approach, such as, form resist layer after forming layers of copper on the insulating layer, enforcement exposes, develop, etch, come unstuck (resiststripping), form conductor wiring.In semi-additive process, the foundation metal layer of cathode copper plating is set by the plating of non-electrolytic copper on the surface of insulating barrier.Then, form the plating resist layer with the opening corresponding with conductor wiring, the surface being plated in the foundation metal layer exposed by cathode copper forms electrolytic copper plating layer.Afterwards, peel off plating resist layer, use sudden strain of a muscle etching (flashetching) to remove the foundation metal layer exposed, thus, form conductor wiring.
When loading the circuit board of electronic unit, the connection pad on the surface of circuit board is the connecting pad for being connected with electronic unit.Electronic unit is connected pad via soldering projection with this and is electrically connected, and thus, carries out flip-chip installation at circuit board.In order to improve the close property with solder mask, also can carry out matsurface process to connection bond pad surface, also can carry out coupling agent treatment.The connection pad at the back side of circuit board is the connecting pad connected for outside.Make via soldering projection this connection pad be electrically connected with the conductor wiring of the outside electric substrates such as motherboard (motherboard), thus, carry out flip-chip installation at motherboard.
As solder resist of the present invention, the solder resist of alkali-developable can be used.In addition, be 1 fluidity, 2 fluidities, any aqueous resist can, also can be dry film shape resist.Solder resist such as forms containing alkali soluble resins, simple function acrylic monomers, polyfunctional acrylic monomer, light trigger, epoxy resin, inorganic filler etc.
As alkali soluble resins, the alkali soluble resins of the characteristic with photo-curable and Thermocurable both sides can being enumerated, such as, can enumerating making acrylic acid be additional to phenol aldehyde type epoxy resin and the hydroxyl of 2 grades of resin after epoxy acrylic esterification adds the resin of acid anhydrides.As polyfunctional acrylic monomer, such as, can enumerate trihydroxymethyl propane triacrylate (TrimethylolPropaneTriacrylate), two-pentaerythrite polyacrylate (Di-pentaerythritolPolyacrylate), pentaerythritol triacrylate (Pentaerythritoltriacrylate) etc.As light trigger, 2-methyl isophthalic acid-(4-methylphenyl-sulfanyl)-2-morpholine propane-1-ketone (2-Methyl-1-(4-Methylthiophenyl)-2-Morpholinopropan-1-one can be enumerated) etc.Epoxy resin is used as curing agent.Be cross-linked by the carboxylic acid reaction with alkali soluble resins, seek the raising of characteristic of thermal endurance, resistance to chemical reagents, but, even if carboxylic acid and epoxy also react at normal temperatures, therefore, storage stability is poor, and alkali-developable solder resist takes the situation of the mode of 2 fluidities mixed before use more usually.As inorganic filler, such as, talcum, tripoli (silica), barium sulfate, titanium oxide, zinc oxide etc. can be enumerated.
Solder mask is formed in the mode covering whole surface on the two sides of circuit substrate.In the formation of solder mask, such as, as long as aqueous resist, then can use silk screen print method, rolling method, spray-on process, infusion process, showering (curtaincoat) method, stick coating method, air knife method, hot melt, gravure coating method, hairbrush coating process, flexographic printing process.In addition, as long as film-form resist, then lamination (laminate) method, vacuum layer platen press is used.
By the manufacture method (1) of circuit board and the solder mask 2 that the operation (A) in (2) is formed and the first solder mask 2-1 thickness in the two sides of circuit substrate of being formed by the operation (A1) in manufacture method (3) ~ (5) of circuit board different, the side that thickness is thin is " first surface ", and the side that thickness is thick is " the second face ".When forming solder mask on the two sides of circuit substrate, usually set identical condition on two sides.This is derived from solder resist to have Thermocurable.When aqueous resist, need the heat drying carrying out desolventizing after coating, therefore, when coating amount is when each surface is different, must drying condition be changed on each surface, but must be set at that time can not such condition of excessively hot curing.In addition, when dry film shape resist, heating is needed when lamination, therefore, when using thickness according to the dry film shape resist that each surface is different, heating condition during lamination must be changed on each surface, but must be set at that time can not such condition of excessively hot curing.Not being the thickness of the solder mask changed like this on each surface, heat drying condition etc. but making the kind of the solder mask on two sides, thickness, heat drying condition etc. flow chart more can be made simple for the same terms, is preferred.
When the two sides of circuit substrate defines solder mask with the same terms, the thickness of solder mask according to comprise each connection pad its around the density of conductor wiring change.Such as, in the circuit board being mounted with electronic unit, outside overleaf connects with connecting pad by situation about arranging in face formation, with the electronic unit comprising surface connects with connects pad its around conductor wiring density compared with, the outside connection comprising the back side with connect pad its around conductor wiring density change greatly.Consequently, the outside at the back side connects with the electronic unit connection on the Thickness Ratio surface of the solder mask connected on pad thick with the thickness of the solder mask connected on pad.In this case, surface is first surface, and the back side is second.
The operation of solder mask of the present invention being carried out to filming is the operation comprising the micellization process (filming process) utilizing filming treatment fluid that the solder mask composition micella (micelle) in non-exposed portion is changed, the micella removing process then utilizing micella removing liquid removing micella.And then, also can comprise the washing process of not removed most micella, remaining filming treatment fluid and micella removing liquid being rinsed by washing, the drying process removing washing water.
Filming process (micellization process) utilizes the solder mask composition in filming treatment fluid micellization non-exposed portion and makes this micella for the undissolved process of filming treatment fluid.
In filming treatment fluid of the present invention, alkaline aqueous solution can be used.As the alkaline aqueous solution that can be used as filming treatment fluid, can enumerate: the aqueous solution of the inorganic alkaline compounds such as alkali silicate (AlkaliMetalSilicate), alkali metal hydroxide (AlkaliMetalHydroxide), alkali metal phosphate (AlkaliMetalPhosphate), alkali carbonate (AlkaliMetalCarbonate), ammonium phosphate, ammonium carbonate; Monoethanolamine, diethanol amine, triethanolamine, methylamine, dimethylamine, ethamine, diethylamine, triethylamine, cyclohexylamine, Tetramethylammonium hydroxide (TetramethylammoniumHydroxide, TMAH), the aqueous solution of the organic basic compound such as tetraethylammonium hydroxide, trimethyl-2-hydroxyethylammoniumhydroxide hydroxide (choline, Choline).As alkali metal, lithium, sodium, potassium etc. can be enumerated.Above-mentioned inorganic alkaline compound and organic basic compound also can use individually, also can combine multiple use.Also inorganic alkaline compound can be combined and organic basic compound uses.
In addition, in order to make solder mask surface more uniformly filming, also sulfate, sulphite can be added in filming treatment fluid.As sulfate or sulphite, alkaline-earth metal sulfate or the sulphite such as the alkali metal sulfates such as lithium, sodium or potassium or sulphite, magnesium, calcium can be enumerated.
As filming treatment fluid, among those, especially, in order to can more uniformly filming surface and preferably can use the inorganic alkaline compound that comprises and select from alkali carbonate, alkali metal phosphate, alkali metal hydroxide, alkali silicate and from TMAH(Tetramethylammonium hydroxide), at least any one and the amount of this inorganic alkaline compound and organic basic compound among the organic basic compound selected of choline be the filming treatment fluid of 3 ~ 25 quality %.When less than 3 quality %, exist and easily uneven situation occurs in the process of filming.In addition, when more than 25 quality %, easily cause the precipitation of inorganic alkaline compound and there is the bad situation of the stability in time of liquid, workability.Amount more preferably 5 ~ 20 quality % of alkali compounds, further preferred 7 ~ 15 quality %.The pH of filming treatment fluid is preferably more than 10.In addition, surfactant, defoamer, solvent etc. can also suitably be added.
In the filming of solder mask, the existence of the inorganic filler being insoluble to the filming treatment fluid comprised in solder mask can not be ignored.The size of inorganic filler according to its kind, but, have from the submicron order being called as nano-filled dose to large be some tens of pm particle size distribution to a certain degree, exist with the amount of 30 ~ 70 quality % in layer.Filming is undertaken by the micellization of solder mask composition and micella removing process after alkali compounds infiltration is in solder mask, but, due to the existence of insoluble inorganic filler, there is the infiltration and situation that filming slows that suppress alkali compounds.
Infiltration for the alkali compounds caused due to such inorganic filler hinders, and the pH of filming treatment fluid is preferably more than 12.5, and more preferably more than 13.0.The pH of filming treatment fluid is higher, and the expansion of solder mask during alkali compounds infiltration is larger, is difficult to be subject to the impact of the infiltration obstruction caused due to inorganic filler.
In the present invention, when utilizing filming to expose to a part for the connection pad making first surface, the connection pad that this exposes can be used as electronic unit and connect with connecting pad.Usually, connect bond pad surface by matsurface, utilize its anchoring effect to improve the close property connecting pad and solder mask, maintain high insulating reliability throughout long-time.During soldering-resistant pattern is in the past formed, when removing solder mask and making connection bond pad surface expose, usually the aqueous sodium carbonate of low concentration superior for dispersibility is used as developer solution, produces the residue of solder mask in connection bond pad surface hardly.But, when using the aqueous sodium carbonate of low concentration to carry out the filming of solder mask, filming and uneven in generating plane can not be carried out in face equably.
About the temperature of filming treatment fluid, preferably 15 ~ 35 DEG C, and then preferably 20 ~ 30 DEG C.When the temperature is too low, exist to the slack-off situation of the seepage velocity of the alkali compounds of solder mask, need long-time in order to the thickness of filming expectation.On the other hand, when temperature is too high, there is following situation: side by side carry out micella by the micellization with solder mask composition and remove process, thus it is uneven that thickness easily occurs in face, therefore, is not preferred.
In the filming process utilizing filming treatment fluid, the method such as impregnation process, stir process, spraying process, brushing (brushing), scraping (scraping) can be used, but, preferred impregnation process.About the processing method beyond impregnation process, there is easy gassing in filming treatment fluid and the bubble of this generation be attached in filming solder mask surface and thickness becomes uneven situation.When use spraying process etc., preferably make spraying pressure little as far as possible, to make not gassing.
After the filming process utilizing filming treatment fluid, in the micella removing process of removing relative to the micella of the thawless solder mask composition of filming treatment fluid, dissolve removing micella at one stroke by spraying micella removing liquid.
As micella removing liquid, running water, water for industrial use, pure water etc. can be used.In addition, by the aqueous solution comprised from least pH5 ~ 10 of any one among the inorganic alkaline compound of alkali carbonate, alkali metal phosphate, alkali silicate selection is used as micella removing liquid, thus thawless solder mask composition in filming treatment fluid is easily made again to disperse.When the pH of micella removing liquid is less than 5, there is solder mask composition and assemble and become insoluble mud and be attached to the possibility on the solder mask surface after filming.On the other hand, when the pH of micella removing liquid is more than 10, exists and promote that the micellization of solder mask composition and micella remove process and the situation of thickness inequality easily occurs in face simultaneously.In addition, micella removing liquid can use sulfuric acid, phosphoric acid, hydrochloric acid etc. to adjust pH.
The condition of the spraying in micella removing process is described.The condition (temperature, time, spraying pressure) of spraying coordinates the dissolution velocity of the solder mask of filming process suitably to adjust.Particularly, about treatment temperature, preferably 10 ~ 50 DEG C, more preferably 22 ~ 50 DEG C.When the temperature of the aqueous solution is less than 10 DEG C, there is the situation of the easy residue of residual solder mask of the not good and connection bond pad surface after matsurface of the dissolving causing solder mask to be divided into.On the other hand, when more than 50 DEG C, there is situation because the restriction on the problem of the evaporation of the aqueous solution, the temperature treatment of continuously running, apparatus design occurs instead of preferred.In addition, spraying pressure preferably adopts 0.01 ~ 0.5MPa, and more preferably 0.1 ~ 0.3MPa is preferred.About the supply flow rate of micella removing liquid, the every 1cm of preferred solder mask
2be 0.030 ~ 1.0L/min, more preferably 0.050 ~ 1.0L/min, preferred 0.10 ~ 1.0L/min further.When supply flow rate is this scope, can not solder mask remained on surface not solvent components after filming, micella can be removed roughly equably in face.At the every 1cm of solder mask
2supply flow rate less than 0.030L/min time, there is the situation of the not solvent components of residual solder mask.On the other hand, when supply flow rate is more than 1.0L/min, there are the parts such as the pump needed to supply and become huge and the situation needing large-scale device.And then when the quantity delivered more than 1.0L/min, the dissolving existed to solder mask composition removes the effect provided and can not change.
According to the operation (A) in the manufacture method (1) and (2) of circuit board, the solder mask 2 of first surface is formed in operation (A1) in manufacture method (3) ~ (5) of circuit board and (A2), first solder mask 2-1, the thickness of the second solder mask 2-2 and the manufacture method (1) of circuit board, (3) operation (B) in ~ (5), operation (B1) in the manufacture method (2) of circuit board and (B2), solder mask 2 to the non-exposed portion of first surface in operation (B3) in the manufacture method (5) of circuit board, first solder mask 2-1, amount after second solder mask 2-2 carries out filming decides the solder mask 2 around the connection pad 3 exposed of first surface, the thickness of the first solder mask 2-1 and become the solder mask 2 of a part of the dam that underfill is blocked, first solder mask 2-1, the thickness of the second solder mask 2-2.In addition, in the present invention, in the scope of 0.01 ~ 500 μm, suitably freely filming amount can be adjusted.Suitably adjust from the height on solder mask 2, the first solder mask 2-1 surface to connection pad 3 surface of exposing that are thinned to below the thickness connecting pad according to the amount of solder needed afterwards.In addition, become solder mask 2, the first solder mask 2-1 of a part for the dam that underfill is blocked, the thickness of the second solder mask 2-2 suitably adjusts according to the size of the size of electronic unit, the splicing ear of electronic unit, the amount of underfill of filling between electronic unit and circuit board.
The manufacture method (6) of circuit board carried out operation (C2) in manufacture method (1) ~ (4) of circuit board before operation (C1).In addition, the manufacture method (7) of circuit board carries out operation (C1) and operation (C2) in manufacture method (1) ~ (4) of circuit board simultaneously.Like this, in manufacture method (1) ~ (4) of circuit board, also can exchange the order of operation (C1) and operation (C2), also can carry out operation (C1) and operation (C2) simultaneously.
In operation (C1) in the manufacture method (1) of circuit board, for the solder mask 2 of first surface, exposed by the partial selective beyond the region of filming as in the operation (B) of rear operation.In operation (C1) in the manufacture method (2) of circuit board, for the solder mask 2 of first surface, exposed by the partial selective beyond the region of filming in as the operation (B1) of rear operation.In the operation (C1) in the manufacture method (3) and (4) of circuit board, for the first solder mask 2-1 of first surface, exposed by the partial selective beyond the region of filming in as the operation (B) of rear operation.In operation (C4) in the manufacture method (2) of circuit board, for the solder mask 2 of first surface, exposed by the partial selective beyond the region of filming in as the operation (B2) of rear operation.In operation (C7) in operation (C6) in the manufacture method (3) of circuit board and the manufacture method (5) of circuit board, for the second solder mask 2-2 of first surface, the partial selective beyond the region be developed in as the operation (D1) of rear operation is exposed.In operation (C6) in the manufacture method (4) of circuit board, for the second solder mask 2-2 of first surface, the partial selective beyond the region be developed in as the operation (D2) of rear operation is exposed.In operation (C6) in the manufacture method (5) of circuit board, for the second solder mask 2-2 of first surface, exposed by the part beyond the region of filming in as the operation (B3) of rear operation.Solder resist after exposure carries out photo polymerization, and solder mask 2, first solder mask 2-1, the second solder mask 2-2 solidify.In Fig. 4-1 ~ Fig. 8-3, expose via photomask 5 pairs of active rays 6, but, also can carry out directly to describe mode.As Exposure mode, such as, can enumerate using xenon lamp, high-pressure mercury-vapor lamp, Cooper-Hewitt lamp, extra-high-pressure mercury vapour lamp, UV fluorescent lamp as light source reflected image Exposure mode, employ photomask be close to Exposure mode, close to mode, projection pattern, laser scanning exposure mode etc.In first surface, " region by filming " such as comprises the region around the connection pad on connection pad, between connection pad.More specifically, be installation region for loading electronic unit and around.
In the operation (C2) in the manufacture method (1) and (2) of circuit board, for the solder mask 2 of second, the partial selective beyond the region be developed in as the operation (D) of rear operation is exposed.In operation (C2) in the manufacture method (4) of circuit board, for the first solder mask 2-1 of second, the partial selective beyond the region be developed in as the operation (D) of rear operation is exposed.In the operation (C2) in the manufacture method (3) and (5) of circuit board, for the first solder mask 2-1 of second, the partial selective beyond the region be developed in as the operation (D1) of rear operation is exposed.Solder resist after exposure carries out photo polymerization, and solder mask 2, first solder mask 2-1 solidifies.As Exposure mode, the mode same with operation (C1) in the manufacture method of above-mentioned circuit board (1) etc. can be used.In second " region be developed " refer to such as comprise connect on pad, connect between pad connection pad around region.More specifically, be make to be configured to the peristome region of the circle that the part being connected pad is exposed of face battle array (Areaarray) type to install with the conductor wiring of outside electric substrate.
In operation (C3) in the manufacture method (1) of circuit board, for the solder mask 2 of first surface, the area part after filming in operation (B) is exposed.In operation (C3) in manufacture method (3) ~ (5) of circuit board, for the first solder mask 2-1 of first surface, the area part after filming in operation (B) is exposed.In operation (C5) in the manufacture method (2) of circuit board, for the solder mask 2 of first surface, the area part after filming in operation (B2) is exposed.As Exposure mode, the mode same with operation (C1) in the manufacture method of above-mentioned circuit board (1) etc. can be used.In the manufacture method (1) of circuit board, (3) operation (C3) in ~ (5), after operation (C5) in the manufacture method (2) of circuit board, there is the solder mask 2 in development removing non-exposed portion, first solder mask 2-1, operation (the manufacture method (1) of circuit board of the second solder mask 2-2, (2) operation (D) and in (4), operation (D1) in the manufacture method (3) of circuit board and (5), operation (D2) in the manufacture method (4) of circuit board), therefore, need to carry out exposure to make solder resist photo polymerization to the final region forming solder mask.Preferably, in operation (C3) in the manufacture method (1) of circuit board, (3), (4), the part of exposure is at least included in the region in operation (B) after filming, is included in the boundary portion in the part of exposure in operation (C1) and the region in operation (B) after filming.In addition, preferably, in operation (C5) in the manufacture method (2) of circuit board, the part of exposure is at least included in the region in operation (B2) after filming, is included in the boundary portion in the part of exposure in operation (C4) and the region in operation (B2) after filming.
Operation (C1) in manufacture method (1) ~ (4) of circuit board, the manufacture method (1) of circuit board, (3) operation (C3) in ~ (5), operation (C2) in manufacture method (1) ~ (5) of circuit board, operation (C4) in the manufacture method (2) of circuit board and (C5), operation (C6) in manufacture method (3) ~ (5) of circuit board, exposure in operation (C7) in the manufacture method (5) of circuit board suitably determines according to the luminous sensitivity of solder resist.In more detail, as long as the manufacture method (1) at circuit board, (3) operation (B) in ~ (5), operation (B1) in the manufacture method (2) of circuit board and (B2), the filming treatment fluid used in operation (B3) in the manufacture method (5) of circuit board or the manufacture method (1) at circuit board, (2), (4) operation (D) in, operation (D1) in the manufacture method (3) of circuit board and (5), the developer solution used in operation (D2) in the manufacture method (4) of circuit board can make solder resist photo polymerization and be cured as solder resist and do not dissolve or non-bloating degree, be generally 100 ~ 600mJ/cm
2.
Operation (C3) in the manufacture method (5) of the operation (C4) in the operation (C3) in the manufacture method (1) of circuit board, (3), (4), the manufacture method (2) of circuit board and (C5), circuit board and the exposure in operation (C7) are preferably carried out with noncontact Exposure mode under an oxygen atmosphere.As noncontact Exposure mode, can enumerate to arrange between photomask and circuit board gap with noncontact carry out exposing close to mode, projection pattern, do not use the direct description mode of photomask.Solder mask 2, first solder mask 2-1, the second solder mask 2-2 expose with the noncontact not having the state of supporting course film to carry out under an oxygen atmosphere, thus, near the top layer of each solder mask, the photo polymerization of (degree of depth from solder mask surface is about 0 ~ 0.5 μm) is obstructed due to the impact of oxygen, become uncured portion, that only leaves from top layer is site curing.Therefore, remove the uncured portion near top layer by the operation (D1) in the manufacture method (5) of the operation (D) in the manufacture method (4) of the operation (D1) in the manufacture method (3) of the operation (B2) in the manufacture method (2) of the operation (D) in the manufacture method (1) of circuit board, circuit board and (D), circuit board, circuit board and (D2), circuit board, matsurface is carried out on the surface of solder mask 2, first solder mask 2-1, the second solder mask 2-2.Connect with the solder mask of the surrounding connecting pad surface for compared with level and smooth situation with the electronic unit on the surface being in circuit board, situation after matsurface and the close property of underfill more strong, as a result, can prevent the stress due to thermal shock from concentrating on the connecting portion of electronic unit and circuit board, connection reliability is higher.By cordless exposure under an oxygen atmosphere, matsurface is carried out on the surface of solder mask 2, first solder mask 2-1, the second solder mask 2-2, thus, improves, obtain high connection reliability with the close property of underfill.To improve and the surface roughness Ra of the preferred solder mask of close property of underfill is more than 0.30 μm less than 0.50 μm.When surface roughness Ra is more than 0.50 μm, there is the intensity step-down of solder resist and the situation of insulating reliability cannot be obtained.Surface roughness Ra is arithmetic mean surface roughness.
Operation (C4) in operation (C3) in the manufacture method (1) of circuit board, (3), (4), the manufacture method (2) of circuit board and the exposure in (C5) are preferably more than 1 times less than 5 times of the exposure in operation (C1), more preferably more than 1.5 times less than 3 times.Similarly, the operation (C3) in the manufacture method (5) of circuit board and the exposure in operation (C7) are preferably more than 1 times less than 5 times of the exposure in operation (C6), more preferably more than 1.5 times less than 3 times.In noncontact exposure under an oxygen atmosphere, be cured to the exposure of not dissolving or required for non-bloating degree relative to solder resist, more exposure is provided, thereby, it is possible to the polymerization caused by the oxygen on the surface by solder mask hinders suppression to be needs Min..Exposure is more, and the suppression hindered polymerization is more effective, but on the other hand, when exposure is too much, the resolution of solder resist not only worsens, and the time for exposure is long, therefore, not preferably.
In operation (B2) in operation (B) in the manufacture method (1), (3) ~ (5) of circuit board, the manufacture method (2) of circuit board, at first surface, make solder mask 2, the first solder mask 2-1 filming in non-exposed portion by filming treatment fluid until become connect pad 3 thickness below a part for connection pad 3 is exposed.In operation (B3) in operation (B1) in the manufacture method (2) of circuit board, the manufacture method (5) of circuit board, at first surface, utilize filming treatment fluid in the scope that connection pad 3 does not expose, make solder mask 2, the second solder mask 2-2 filming in non-exposed portion.When using film-form resist to be provided with supporting course film, after peeling supporting course film, carry out filming.
In operation (B2) in operation (B) in the manufacture method (1), (3) ~ (5) of circuit board, the manufacture method (2) of circuit board, the thickness of solder mask 2, the first solder mask 2-1 after filming carries out filming until identical or thinner than it with the thickness of the connection pad 3 exposed of first surface.When the thickness of solder mask 2, the first solder mask 2-1 after filming is crossed thin, there is electric insulation between the connection pad 3 that exposes insufficient and the situation of the short circuit of electroless/gold plating occurs, the situation of the short circuit due to solder occurs between connection pad 3.Therefore, the thickness of solder mask 2, the first solder mask 2-1 after filming is preferably more than 1/3rd of the thickness connecting pad 3, and it is good for being more preferably more than 2/3rds.
In operation (B1) in operation (B) in the manufacture method (1) of circuit board, the manufacture method (2) of circuit board and (B2), when the solder mask 2 in the non-exposed portion to first surface carries out filming, the solder mask 2 in the non-exposed portion of filming second while of also.In operation (B) in manufacture method (3) ~ (5) of circuit board, when the first solder mask 2-1 in the non-exposed portion to first surface carries out filming, the first solder mask 2-1 in the non-exposed portion of filming second while of also.In operation (B3) in the manufacture method (5) of circuit board, when the second solder mask 2-2 in the non-exposed portion to first surface carries out filming, the first solder mask 2-1 in the non-exposed portion of filming second while of also.The filming amount of second is different from the hot curing state of solder mask 2, the first solder mask 2-1 in the non-exposed portion of second, but, when two sides forms solder mask the 2, first solder mask 2-1 with identical heating condition, usually, solder mask 2, the first solder mask 2-1 in the first surface of the identical amount of filming and the non-exposed portion of second at the same time.
In operation (B3) in the manufacture method (5) of the operation (B1) in the operation (B) in the manufacture method (1), (3) ~ (5) of circuit board, the manufacture method (2) of circuit board and (B2), circuit board, preferably, with first surface be on carry out filming process.As the processing mode of filming process, owing to being difficult to produce bubble in filming treatment fluid, so impregnation process is effective.Just in case when creating bubble in filming treatment fluid, bubble is emersion in filming treatment fluid, is attached to solder mask 2, the first solder mask 2-1 surface of lower surface (the second face).Due to the attachment of this bubble, there is the thickness after the filming of second and become uneven situation.But, in operation (D2) in operation (D1) in operation (D) in the manufacture method (1) of the circuit board as rear operation, (2), (4), the manufacture method (3) of circuit board and (5), the manufacture method (4) of circuit board, solder mask 2, the first solder mask 2-1 in the non-exposed portion of second is developed removing, therefore, final thickness inequality can not become problem.
In the operation (D) in the manufacture method (1) and (2) of circuit board, development is utilized to remove the solder mask 2 in the non-exposed portion of second.In operation (D) in the manufacture method (4) of circuit board, development is utilized to remove the first solder mask 2-1 in the non-exposed portion of second.In the operation (D1) in the manufacture method (3) and (5) of circuit board, development is utilized to remove the first solder mask 2-1 in the non-exposed portion of the second solder mask 2-2 and second of the non-exposed portion of first surface.In operation (D2) in the manufacture method (4) of circuit board, development is utilized to remove the second solder mask 2-2 in the non-exposed portion of first surface.As developing method, use the two sides spraying come with the balanced developer solution of solder resist of use circuit substrate, remove the unwanted part of each solder mask.In developer solution, use thin alkaline aqueous solution, usually use the aqueous sodium carbonate of 0.3 ~ 3 quality %, wet chemical.
Embodiment
Below, utilize embodiment in further detail the present invention to be described, but the present invention is not limited to this embodiment.
Embodiment 1 ~ 6 is examples of the manufacture method (1) about the circuit board shown in Fig. 4-1 and Fig. 4-2.
(embodiment 1)
< operation (A) >
Semi-additive process is used to be produced on circuit substrate 1(area 170mm × 200mm, conductor thickness 15 μm, the substrate thickness 0.4mm that two sides is formed with conductor wiring 7).Exist in (first surface) side, surface and be used as electronic unit connection with connecting the line width 25 μm of pad 3, the conductor wiring at 50 μm, interval.(the second face) side is formed and is used as the outside round-shaped conductor wiring connected with the diameter 600 μm connecting pad 4 overleaf.Then, (sun ink manufactures (share) system by the solder mask film of thickness 25 μm to use vacuum lamination, trade name: PFR-800AUS410) vacuum hotpressing is connected to the two sides (laminating temperature 75 DEG C, pull up time 30 seconds, 10 seconds pressing times) of foregoing circuit substrate 1.Thus, solder mask 2 is defined.In the solder mask 2 of first surface, the thickness from insulating barrier 8 surface is 30 μm, and it is 15 μm that electronic unit connects with the thickness connected on pad 3.In the solder mask 2 of second, the thickness from insulating barrier 8 surface is 38 μm, and outside connection with the thickness connected on pad 4 is 23 μm.At the first surface that the density of conductor wiring is less, compared with the second face that the density of conductor wiring is larger, thin 8 μm of the thickness of solder mask 2.
< operation (C1) >
For the solder mask 2 of first surface, use to connecting the photomask 5 leaving the such pattern of the area illumination active ray 6 in the outside of the periphery of 200 μm with the end connecting pad 3 from multiple electronic unit, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (C2) >
For the solder mask 2 of second, in order to connect with connecting the region, circular open portion pad 4 being arranged diameter 500 μm in outside, use the photomask 5 of the pattern such with external radiation exposure active ray 6 to region, circular open portion, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (B) >
After supporting course film on the solder mask 2 having peeled off first surface and second, by the sodium metasilicate aqueous solution (liquid temperature 25 DEG C) of 10 quality % as filming treatment fluid, on first surface being, circuit substrate 1 is immersed in filming treatment fluid 50 seconds and carries out micellization process (filming process).Afterwards, the micella removing carrying out utilizing micella to remove the spraying of liquid (liquid temperature 25 DEG C) processes, washing processes (liquid temperature 25 DEG C) and dry process, filming is carried out to the solder mask 2 of average 20 μm, until the thickness of the solder mask 2 in the non-exposed portion of first surface becomes electronic unit connect with the surface connecting pad 3 lower 5.0 μm.When observing with light microscope, not processing inequality on the surface of the solder mask 2 of first surface, obtaining good inner evenness.On the other hand, at second, also filming is carried out to the solder mask 2 of average 20 μm, but the bubble in filming treatment fluid is attached to the solder mask 2 in the non-exposed portion of second, there is membrane thickness unevenness part.In addition, connect in outside and pad 4 remains with connecting the residue of solder mask 2 of 3 μm of having an appointment.
< operation (C3) >
For the solder mask 2 of first surface, use to the area part after filming in the operation (B) and from the boundary portion in the region after this filming to the photomask 5 of the such pattern of the area illumination active ray 6 in 200 μm of outsides, by noncontact exposure under an oxygen atmosphere, with exposure 400mJ/cm
2expose.
< operation (D) >
Use the aqueous sodium carbonate of 1 quality % (liquid temp 30 DEG C, spraying pressure 0.15MPa) to carry out development in 30 seconds, eliminate the solder mask 2 in the non-exposed portion of second.Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding solder mask 2 with outside with connecting pad 3.In addition, at first surface, connect at electronic unit and be filled with solder mask 2 between pad 3 until electronic unit connection is with under the surface connecting pad 3 5.5 μm with connecting.By the exposure of noncontact under an oxygen atmosphere in operation (C3), electronic unit connects suppressed with the photo polymerization on solder mask 2 surface connected between pad 3, and as a result, the thickness of solder mask 2 decreases 0.5 μm.
Then, in order to make the solder mask 2 of first surface and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the solder mask 2 of thickness 30 μm institute, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the solder mask 2 being filled with thickness 9.5 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of solder mask 2 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, the surface roughness of adjacent electronic unit connection with the solder mask 2 connected between pad 3 is measured.When using ultra-deep measuring shape microscope (joint-stock company's Keyemce (KEYENCE) system, production number " VK-8500 ") to carry out chart surface roughness, surface roughness Ra is 0.40 μm.
Utilize the calculating formula of arithmetic mean surface roughness Ra use according to JISB0601-1994 surface roughness-definition of ultra-deep measuring shape microscope (joint-stock company's Keyemce (KEYENCE) system, production number " VK-8500 ").Further, measuring region is 900 μm
2, datum length is 40 μm.
(embodiment 2)
By implementing operation (A) ~ operation (D) except having exchanged operation (C1) method identical with embodiment 1 except the order of operation (C2).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding solder mask 2 with outside with connecting pad 3.In addition, in addition, at first surface, connect at electronic unit and be filled with solder mask 2 between pad 3 until electronic unit connection is with under the surface connecting pad 3 5.5 μm with connecting.By the exposure of noncontact under an oxygen atmosphere in operation (C3), electronic unit connects suppressed with the photo polymerization on solder mask 2 surface connected between pad 3, and as a result, the thickness of solder mask 2 decreases 0.5 μm.
Then, in order to make the solder mask 2 of first surface and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the solder mask 2 of thickness 30 μm institute, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the solder mask 2 being filled with thickness 9.5 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of solder mask 2 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, when measuring the surface roughness that adjacent electronic unit connects with the solder mask 2 connected between pad 3, surface roughness Ra is 0.40 μm.
(embodiment 3)
By except making the exposure in operation (C3) be 200mJ/cm
2method identical with embodiment 1 in addition implements operation (A) ~ operation (D).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding solder mask 2 with outside with connecting pad 3.At first surface, connect at electronic unit and be filled with solder mask 2 between pad 3 until electronic unit connection is with under the surface connecting pad 3 6.0 μm with connecting.By the exposure of noncontact under an oxygen atmosphere in operation (C3), electronic unit connects suppressed with the photo polymerization on solder mask 2 surface connected between pad 3, and as a result, the thickness of solder mask 2 decreases 1.0 μm.
Then, in order to make the solder mask 2 of first surface and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the solder mask 2 of thickness 30 μm institute, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the solder mask 2 being filled with thickness 9.0 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of solder mask 2 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, when measuring the surface roughness that adjacent electronic unit connects with the solder mask 2 connected between pad 3, surface roughness Ra is 0.50 μm.
(embodiment 4)
By except making the exposure in operation (C3) be 1000mJ/cm
2method identical with embodiment 1 in addition implements operation (A) ~ operation (D).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding solder mask 2 with outside with connecting pad 3.In addition, at first surface, connect at electronic unit and be filled with solder mask 2 between pad 3 until electronic unit connection is with under the surface connecting pad 3 5.0 μm with connecting.Polymerization due to the oxygen in operation (C3) unconfirmed hinders the film reduction of the solder mask 2 of the first surface caused.
Then, in order to make the solder mask 2 of first surface and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the solder mask 2 of thickness 30 μm institute, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the solder mask 2 being filled with thickness 10.0 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of solder mask 2 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, when measuring the surface roughness that adjacent electronic unit connects with the solder mask 2 connected between pad 3, surface roughness Ra is 0.30 μm.
(embodiment 5)
By except using direct drawing apparatus (trade name: LI-8500, large Japanese screen manufacturing company system) with exposure 400mJ/cm under an oxygen atmosphere
2carry out the method identical with embodiment 1 beyond the exposure in operation (C3) and implement operation (A) ~ operation (D).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding solder mask 2 with outside with connecting pad 3.In addition, at first surface, connect at electronic unit and be filled with solder mask 2 between pad 3 until electronic unit connection is with under the surface connecting pad 3 5.5 μm with connecting.By the exposure of noncontact under an oxygen atmosphere in operation (C3), electronic unit connects suppressed with the photo polymerization on solder mask 2 surface connected between pad 3, and as a result, the thickness of solder mask 2 decreases 0.5 μm.
Then, in order to make the solder mask 2 of first surface and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the solder mask 2 of thickness 30 μm institute, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the solder mask 2 being filled with thickness 9.5 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of solder mask 2 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, when measuring the surface roughness that adjacent electronic unit connects with the solder mask 2 connected between pad 3, surface roughness Ra is 0.40 μm.
(embodiment 6)
By except implementing operation (A) ~ operation (D) by the method identical with embodiment 1 except being close to Exposure mode to expose in operation (C3).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding solder mask 2 with outside with connecting pad 3.In addition, at first surface, connect at electronic unit and be filled with solder mask 2 between pad 3 until electronic unit connection is with under the surface connecting pad 3 5.0 μm with connecting.In operation (C3), by fully carrying out deflating and exposing under non-oxygen environment when being close to exposure, therefore, solder mask 2 surface is not by matsurface, and as a result, the thickness of solder mask 2 does not reduce.
Then, in order to make the solder mask 2 of first surface and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the solder mask 2 of thickness 30 μm institute, and the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the solder mask 2 being filled with thickness 10 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of solder mask 2 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, conductor pad 4 is exposed.
Then, when measuring the surface roughness that adjacent electronic unit connects with the solder mask 2 connected between pad 3, surface roughness Ra is 0.10 μm.
In embodiment 1 ~ 6, connect with connecting the solder mask 2 that there is sufficient thickness between pad 3, therefore, it is possible to reliably prevent the electrical short caused when mounting electronic parts because solder causes at adjacent electronic unit.In addition, connecting with connecting residue pad 4 not existing solder mask 2 in outside, therefore, it is possible to be produced on when being installed on outside electric substrate, the high circuit board of the bad reliability of electric insulation also can not occur.When comparing embodiment 1 ~ 6, compared with the circuit board that manufactures in level and smooth embodiment 6 with connecting with the surface of the solder mask 2 connected between pad 3 at electronic unit, the circuit board manufactured in embodiment 1 ~ 5 and the close property of underfill higher, connection reliability is more superior.
(comparative example 1)
< operation (A) >
Semi-additive process is used to be produced on circuit substrate 1(area 170mm × 200mm, conductor thickness 15 μm, the substrate thickness 0.4mm that two sides is formed with conductor wiring 7).Exist on surface (first surface) and be used as electronic unit connection with connecting the line width 25 μm of pad 3, the conductor wiring at 50 μm, interval.(the second face) is formed and is used as the outside round-shaped conductor wiring connected with the diameter 600 μm connecting pad 4 overleaf.Then, (sun ink manufactures (share) system by the solder mask film of thickness 25 μm to use vacuum lamination, trade name: PFR-800AUS410) vacuum hotpressing is connected to the two sides (laminating temperature 75 DEG C, pull up time 30 seconds, 10 seconds pressing times) of foregoing circuit substrate 1.Thus, solder mask 2 is defined.In the solder mask 2 of first surface, the thickness from insulating barrier 8 surface is 30 μm, and it is 15 μm that electronic unit connects with the thickness connected on pad 3.In the solder mask 2 of second, the thickness from insulating barrier 8 surface is 38 μm, and outside connection with the thickness connected on pad 4 is 23 μm.At the first surface that the density of conductor wiring is less, compared with the second face that the density of conductor wiring is larger, thin 8 μm of the thickness of solder mask 2.
< operation (C1) >
For the solder mask 2 of first surface, use to connecting the photomask 5 leaving the such pattern of the area illumination active ray 6 in the outside of the periphery of 200 μm with the end connecting pad 3 from multiple electronic unit, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (C2) >
For the solder mask 2 of second, in order to connect with connecting the region, circular open portion pad 4 being arranged diameter 500 μm in outside, use the photomask 5 of the pattern such with external radiation exposure active ray 6 to region, circular open portion, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (B) >
After supporting course film on the solder mask 2 having peeled off first surface and second, by the sodium metasilicate aqueous solution (liquid temperature 25 DEG C) of 10 quality % as filming treatment fluid, on first surface being, circuit substrate 1 is immersed in filming treatment fluid 50 seconds and carries out micellization process (filming process).Afterwards, the micella removing carrying out utilizing micella to remove the spraying of liquid (liquid temperature 25 DEG C) processes, washing processes (liquid temperature 25 DEG C) and dry process, filming is carried out to the solder mask 2 of average 20 μm, until the thickness of the solder mask 2 in the non-exposed portion of first surface becomes electronic unit connect with the surface connecting pad 3 lower 5.0 μm.When observing with light microscope, not processing inequality on the surface of the solder mask 2 of first surface, obtaining good inner evenness.On the other hand, the solder mask 2 of second is also averaged 20 μm of filmings, but the bubble in filming treatment fluid is attached to the solder mask 2 in the non-exposed portion of second, there is membrane thickness unevenness part.In addition, connect in outside and pad 4 remains with connecting the residue of solder mask 2 of 3 μm of having an appointment.
Then, in order to make the solder mask 2 of first surface and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the solder mask 2 of thickness 30 μm institute, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the solder mask 2 being filled with thickness 10.0 μm between pad 3 at adjacent electronic unit.In addition, at second, the circular open portion of solder mask 2 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 is connected in the outside of thickness 15 μm, but, at the outside connection residue connecting the solder mask 2 pad 4 remaining thickness 3 μm.
When mounting electronic parts, connect with connecting the solder mask 2 that there is sufficient thickness between pad 3 at adjacent electronic unit, reliably can prevent the electrical short because solder causes, but, when being installed on outside electric substrate, owing to connecting the residue with connecting solder mask 2 residual on pad 4 in outside, in soldering projection connects, there occurs electric insulation bad.
When measuring the surface roughness that adjacent electronic unit connects with the solder mask 2 connected between pad 3, surface roughness Ra is 0.03 μm.Compared with the circuit board that manufactures in level and smooth comparative example 1 with connecting with the surface of the solder mask 2 connected between pad 3 at electronic unit, the circuit board manufactured in embodiment 1 ~ 5 and the close property of underfill higher, connection reliability is more superior.
Embodiment 7 ~ 11 is examples of the manufacture method (2) about the circuit board shown in Fig. 5-1, Fig. 5-2 and Fig. 5-3.
(embodiment 7)
< operation (A) >
Semi-additive process is used to be produced on circuit substrate 1(area 170mm × 200mm, conductor thickness 15 μm, the substrate thickness 0.4mm that two sides is formed with conductor wiring 7).Exist on surface (first surface) and be used as electronic unit connection with connecting the line width 25 μm of pad 3, the conductor wiring at 50 μm, interval.(the second face) is formed and is used as the outside round-shaped conductor wiring connected with the diameter 600 μm connecting pad 4 overleaf.Then, (sun ink manufactures (share) system by the solder mask film of thickness 25 μm to use vacuum lamination, trade name: PFR-800AUS410) vacuum hotpressing is connected to the two sides (laminating temperature 75 DEG C, pull up time 30 seconds, 10 seconds pressing times) of foregoing circuit substrate 1.Thus, solder mask 2 is defined.In the solder mask 2 of first surface, the thickness from insulating barrier 8 surface is 30 μm, and it is 15 μm that electronic unit connects with the thickness connected on pad 3.In the solder mask 2 of second, the thickness from insulating barrier 8 surface is 38 μm, and outside connection with the thickness connected on pad 4 is 23 μm.At the first surface that the density of conductor wiring is less, compared with the second face that the density of conductor wiring is larger, thin 8 μm of the thickness of solder mask 2.
< operation (C1) >
For the solder mask 2 of first surface, use to connecting the photomask 5 leaving the such pattern of the area illumination active ray 6 in the outside of the periphery of 400 μm with the end connecting pad 3 from multiple electronic unit, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (C2) >
For the solder mask 2 of second, in order to connect with connecting the region, circular open portion pad 4 being arranged diameter 500 μm in outside, use the photomask 5 of the pattern such with external radiation exposure active ray 6 to region, circular open portion, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (B1) >
After supporting course film on the solder mask 2 having peeled off first surface and second, by the sodium metasilicate aqueous solution (liquid temperature 25 DEG C) of 10 quality % as filming treatment fluid, on first surface being, circuit substrate 1 is immersed in filming treatment fluid 25 seconds and carries out micellization process (filming process).Afterwards, the micella removing carrying out utilizing micella to remove the spraying of liquid (liquid temperature 25 DEG C) processes, washing processes (liquid temperature 25 DEG C) and dry process, filming is carried out to the solder mask 2 of average 10 μm, until the thickness of the solder mask 2 in the non-exposed portion of first surface becomes electronic unit connect with the surface connecting pad 3 lower 5.0 μm.When observing with light microscope, not processing inequality on the surface of the solder mask 2 of first surface, obtaining good inner evenness.On the other hand, at second, also filming is carried out to the solder mask 2 of average 10 μm, but the bubble in filming treatment fluid is attached to the solder mask 2 in the non-exposed portion of second, there is membrane thickness unevenness part.In addition, connect in outside and pad 4 remains with connecting the residue of solder mask 2 of 13 μm of having an appointment.
< operation (C4) >
For the solder mask 2 of first surface, use to connecting the photomask 5 leaving the such pattern of the area illumination active ray 6 in the outside of the periphery of 200 μm with the end connecting pad 3 from multiple electronic unit, by noncontact exposure under an oxygen atmosphere, with exposure 400mJ/cm
2expose.
< operation (B2) >
By the sodium metasilicate aqueous solution (liquid temperature 25 DEG C) of 10 quality % as filming treatment fluid, on first surface being, circuit substrate 1 is immersed in filming treatment fluid 25 seconds and carries out micellization process (filming process).Afterwards, the micella removing carrying out utilizing micella to remove the spraying of liquid (liquid temperature 25 DEG C) processes, washing processes (liquid temperature 25 DEG C) and dry process, filming is carried out to the solder mask 2 of average 10 μm, until the thickness of the solder mask 2 in the non-exposed portion of first surface becomes electronic unit connect with the surface connecting pad 3 lower 5.0 μm.When observing with light microscope, not processing inequality on the surface of the solder mask 2 of first surface, obtaining good inner evenness.By the exposure of noncontact under an oxygen atmosphere in operation (C4), connect at the electronic unit of first surface the outer photo polymerization thoughtfully leaving solder mask 2 surface in the region of the periphery of 400 μm leaving 200 μm with the end connecting pad 3 suppressed from self-configuring, as a result, the thickness of solder mask 2 decreases 0.5 μm.On the other hand, the solder mask 2 of second is also averaged 10 μm of filmings, but the bubble in filming treatment fluid is attached to the solder mask 2 in the non-exposed portion of second, there is membrane thickness unevenness part.In addition, connect in outside and remain with connecting pad 4 residue of solder mask 2 of 3 μm of having an appointment.
< operation (C5) >
For the solder mask 2 of first surface, use to the area part after filming in the operation (B2) and from the boundary portion in the region after this filming to the photomask 5 of the such pattern of the area illumination active ray 6 in 200 μm of outsides, by noncontact exposure under an oxygen atmosphere, with exposure 400mJ/cm
2expose.
< operation (D) >
Use the aqueous sodium carbonate of 1 quality % (liquid temp 30 DEG C, spraying pressure 0.15MPa) to carry out development in 30 seconds, eliminate the solder mask 2 in the non-exposed portion of second.Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding solder mask 2 with outside with connecting pad 3.In addition, at first surface, connect at electronic unit and be filled with solder mask 2 between pad 3 until electronic unit connection is with under the surface connecting pad 3 5.5 μm with connecting.By the exposure of noncontact under an oxygen atmosphere in operation (C4) and (C5), at first surface, the photo polymerization being exposed solder mask 2 surface beyond the region irradiating active ray 6 by being close in operation (C1) is suppressed, and as a result, the thickness of solder mask 2 decreases 0.5 μm.
Then, in order to make the solder mask 2 of first surface and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.Fractographic as a result, at first surface with optics, the conductor wiring 7 that thickness is 15 μm is coated by the solder mask 2 of thickness 30 μm and 19.5 μm institute, and the underfill defining the thickness 10.5 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the solder mask 2 being filled with thickness 9.5 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of solder mask 2 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the solder mask 2 of the thickness 19.5 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.40 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the solder mask 2 connected between pad 3, surface roughness Ra is 0.40 μm.
(embodiment 8)
By implementing operation (A) ~ operation (D) except having exchanged operation (C1) method identical with embodiment 7 except the order of operation (C2).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding solder mask 2 with outside with connecting pad 3.In addition, solder mask 2 is filled with until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 5.5 μm.By the exposure of noncontact under an oxygen atmosphere in operation (C4) and (C5), at first surface, the photo polymerization being exposed solder mask 2 surface beyond the region irradiating active ray 6 by being close in operation (C1) is suppressed, and as a result, the thickness of solder mask 2 decreases 0.5 μm.
Then, in order to make the solder mask 2 of first surface and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement the hot curing process of 60 minutes periods with 150 DEG C, obtain circuit board.Fractographic as a result, at first surface with optics, the conductor wiring 7 that thickness is 15 μm is coated by the solder mask 2 of thickness 30 μm and 19.5 μm institute, and the underfill defining the thickness 10.5 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the solder mask 2 being filled with thickness 9.5 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of solder mask 2 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the solder mask 2 of the thickness 19.5 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.40 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the solder mask 2 connected between pad 3, surface roughness Ra is 0.40 μm.
(embodiment 9)
By except making the exposure in operation (C4) and (C5) be 200mJ/cm
2method identical with embodiment 7 in addition implements operation (A) ~ operation (D).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding solder mask 2 with outside with connecting pad 3.In addition, solder mask 2 is filled with, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 6.0 μm.By the exposure of noncontact under an oxygen atmosphere in operation (C4) and (C5), at first surface, the photo polymerization being exposed solder mask 2 surface beyond the region irradiating active ray 6 by being close in operation (C1) is suppressed, and as a result, the thickness of solder mask 2 decreases 1.0 μm.
Then, in order to make the solder mask 2 of first surface and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.Fractographic as a result, at first surface with optics, the conductor wiring 7 that thickness is 15 μm is coated by the solder mask 2 of thickness 30 μm and 19 μm institute, and the underfill defining the thickness 11 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the solder mask 2 being filled with thickness 9.0 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of solder mask 2 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the solder mask 2 of the thickness 19 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.50 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the solder mask 2 connected between pad 3, surface roughness Ra is 0.50 μm.
(embodiment 10)
By except making the exposure in operation (C4) and (C5) be 1000mJ/cm
2method identical with embodiment 6 in addition implements operation (A) ~ operation (D).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding solder mask 2 with outside with connecting pad 3.In addition, be filled with solder mask 2, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 5.0 μm, the polymerization by the oxygen in operation (C4) and operation (C5) unconfirmed hinders the film reduction of the solder mask 2 of the first surface caused.
Then, in order to make the solder mask 2 of first surface and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.Fractographic as a result, at first surface with optics, the conductor wiring 7 that thickness is 15 μm is coated by the solder mask 2 of thickness 30 μm and 20 μm institute, and the underfill defining the thickness 10 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the solder mask 2 being filled with thickness 10.0 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of solder mask 2 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the solder mask 2 of the thickness 20 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.30 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the solder mask 2 connected between pad 3, surface roughness Ra is 0.30 μm.
(embodiment 11)
By except implementing operation (A) ~ operation (D) with in (C5) by the method identical with embodiment 7 except being close to Exposure mode to expose in operation (C4).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding solder mask 2 with outside with connecting pad 3.In addition, at first surface, connect at electronic unit and be filled with solder mask 2 with connecting between pad 3, until electronic unit connection with the surface connecting pad 3 lower 5.0 μm.In operation (C4) and (C5), by fully carrying out deflating and exposing under non-oxygen environment when being close to exposure, therefore, solder mask 2 surface is not by matsurface, and as a result, the thickness of solder mask 2 does not reduce.
Then, in order to make the solder mask 2 of first surface and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.Fractographic as a result, at first surface with optics, the conductor wiring 7 that thickness is 15 μm is coated by the solder mask 2 of thickness 30 μm and 20 μm institute, and the underfill defining the thickness 10 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the solder mask 2 being filled with thickness 10.0 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of solder mask 2 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the solder mask 2 of the thickness 20 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.10 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the solder mask 2 connected between pad 3, surface roughness Ra is 0.10 μm.
In embodiment 7 ~ 11, connect with connecting the solder mask 2 that there is sufficient thickness between pad 3, therefore, it is possible to reliably prevent the electrical short caused when mounting electronic parts because solder causes at adjacent electronic unit.Connecting with connecting residue pad 4 not existing solder mask 2 in outside, therefore, it is possible to be produced on when being installed on outside electric substrate, the high circuit board of the bad reliability of electric insulation also can not occur.When comparing embodiment 7 ~ 11, compared with the circuit board that manufactures in level and smooth embodiment 11 with connecting with the surface of the solder mask 2 connected between pad 3 at electronic unit, the circuit board manufactured in embodiment 7 ~ 10 and the close property of underfill higher, connection reliability is more superior.
(comparative example 2)
< operation (A) >
Semi-additive process is used to be produced on circuit substrate 1(area 170mm × 200mm, conductor thickness 15 μm, the substrate thickness 0.4mm that two sides is formed with conductor wiring 7).Exist on surface (first surface) and be used as electronic unit connection with connecting the line width 25 μm of pad 3, the conductor wiring at 50 μm, interval.(the second face) is formed and is used as the outside round-shaped conductor wiring connected with the diameter 600 μm connecting pad 4 overleaf.Then, (sun ink manufactures (share) system by the solder mask film of thickness 25 μm to use vacuum lamination, trade name: PFR-800AUS410) vacuum hotpressing is connected to the two sides (laminating temperature 75 DEG C, pull up time 30 seconds, 10 seconds pressing times) of foregoing circuit substrate 1.Thus, solder mask 2 is defined.In the solder mask 2 of first surface, the thickness from insulating barrier 8 surface is 30 μm, and it is 15 μm that electronic unit connects with the thickness connected on pad 3.In the solder mask 2 of second, the thickness from insulating barrier 8 surface is 38 μm, and outside connection with the thickness connected on pad 4 is 23 μm.In the first surface that the density of conductor wiring is less, compared with the second face that the density of conductor wiring is larger, thin 8 μm of the thickness of solder mask 2.
< operation (C1) >
For the solder mask 2 of first surface, use to connecting the photomask 5 leaving the such pattern of the area illumination active ray 6 in the outside of the periphery of 200 μm with the end connecting pad 3 from multiple electronic unit, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (C2) >
For the solder mask 2 of second, in order to connect with connecting the region, circular open portion pad 4 being arranged diameter 500 μm in outside, use the photomask 5 of the pattern such with external radiation exposure active ray 6 to region, circular open portion, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (B1) >
After supporting course film on the solder mask 2 having peeled off first surface and second, by the sodium metasilicate aqueous solution (liquid temperature 25 DEG C) of 10 quality % as filming treatment fluid, on first surface being, circuit substrate 1 is immersed in filming treatment fluid 25 seconds and carries out micellization process (filming process).Afterwards, the micella removing carrying out utilizing micella to remove the spraying of liquid (liquid temperature 25 DEG C) processes, washing processes (liquid temperature 25 DEG C) and dry process, filming is carried out to the solder mask 2 of average 10 μm, until the thickness of the solder mask 2 in the non-exposed portion of first surface becomes electronic unit connect with the surface connecting pad 3 lower 5.0 μm.When observing with light microscope, not processing inequality on the surface of the solder mask 2 of first surface, obtaining good inner evenness.On the other hand, the solder mask 2 of second is also averaged 10 μm of filmings, but the bubble in filming treatment fluid is attached to the solder mask 2 in the non-exposed portion of second, there is membrane thickness unevenness part.In addition, connect in outside and pad 4 remains with connecting the residue of solder mask 2 of 13 μm of having an appointment.
< operation (C4) >
For the solder mask 2 of first surface, use to connecting the photomask 5 leaving the such pattern of area illumination active ray 6 between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from multiple electronic unit, by noncontact exposure under an oxygen atmosphere, with exposure 400mJ/cm
2expose.
< operation (B2) >
By the sodium metasilicate aqueous solution (liquid temperature 25 DEG C) of 10 quality % as filming treatment fluid, on first surface being, circuit substrate 1 is immersed in filming treatment fluid 25 seconds and carries out micellization process (filming process).Afterwards, the micella removing carrying out utilizing micella to remove the spraying of liquid (liquid temperature 25 DEG C) processes, washing processes (liquid temperature 25 DEG C) and dry process, filming is carried out to the solder mask 2 of average 10 μm, until the thickness of the solder mask 2 in the non-exposed portion of first surface becomes electronic unit connect with the surface connecting pad 3 lower 5.0 μm.When observing with light microscope, not processing inequality on the surface of the solder mask 2 of first surface, obtaining good inner evenness.By the exposure of noncontact under an oxygen atmosphere in operation (C4), connect at the electronic unit of first surface the outer photo polymerization thoughtfully leaving solder mask 2 surface in the region of the periphery of 400 μm leaving 200 μm with the end connecting pad 3 suppressed from self-configuring, as a result, the thickness of solder mask 2 decreases 0.5 μm.On the other hand, the solder mask 2 of second is also averaged 10 μm of filmings, but the bubble in filming treatment fluid is attached to the solder mask 2 in the non-exposed portion of second, there is membrane thickness unevenness part.In addition, connect in outside and remain with connecting pad 4 residue of solder mask 2 of 3 μm of having an appointment.
Then, in order to make the solder mask 2 of first surface and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.Fractographic as a result, at first surface with optics, the conductor wiring 7 that thickness is 15 μm is coated by the solder mask 2 of thickness 30 μm and 19.5 μm institute, and the underfill defining the thickness 10.5 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the solder mask 2 being filled with thickness 9.5 μm between pad 3 at adjacent electronic unit.In addition, at second, the circular open portion of solder mask 2 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 is connected in the outside of thickness 15 μm, but, at the outside connection residue connecting pad 4 and remain the solder mask 2 of 3 μm.
When mounting electronic parts, connect with connecting the solder mask 2 that there is sufficient thickness between pad 3 at adjacent electronic unit, reliably can prevent the electrical short because solder causes, but, when being installed on outside electric substrate, owing to connecting the residue with connecting solder mask 2 residual on pad 4 in outside, in soldering projection connects, there occurs electric insulation bad.
When measuring the surface roughness that adjacent electronic unit connects with the solder mask 2 connected between pad 3, surface roughness Ra is 0.03 μm.Compared with the circuit board that manufactures in level and smooth comparative example 2 with connecting with the surface of the solder mask 2 connected between pad 3 at electronic unit, the circuit board manufactured in embodiment 7 ~ 11 and the close property of underfill higher, connection reliability is more superior.
Embodiment 12 ~ 16 is examples of the manufacture method (3) about the circuit board shown in Fig. 6-1, Fig. 6-2 and Fig. 6-3.
(embodiment 12)
< operation (A1) >
Semi-additive process is used to be produced on circuit substrate 1(area 170mm × 200mm, conductor thickness 15 μm, the substrate thickness 0.4mm that two sides is formed with conductor wiring 7).Exist on surface (first surface) and be used as electronic unit connection with connecting the line width 25 μm of pad 3, the conductor wiring at 50 μm, interval.(the second face) is formed and is used as the outside round-shaped conductor wiring connected with the diameter 600 μm connecting pad 4 overleaf.Then, (sun ink manufactures (share) system by the solder mask film of thickness 15 μm to use vacuum lamination, trade name: PFR-800AUS410) vacuum hotpressing is connected to the surface of foregoing circuit substrate 1, by the solder mask film of thickness 25 μm, (sun ink manufactures (share) system, trade name: PFR-800AUS410) vacuum hotpressing is connected to the back side (laminating temperature 75 DEG C of foregoing circuit substrate 1, pull up time 30 seconds, 10 seconds pressing times).Thus, the first solder mask 2-1 is defined.At the first solder mask 2-1 of first surface, the thickness from insulating barrier 8 surface is 20 μm, and it is 5 μm that electronic unit connects with the thickness connected on pad 3.At the first solder mask 2-1 of second, the thickness from insulating barrier 8 surface is 38 μm, and outside connection with the thickness connected on pad 4 is 23 μm.
< operation (C1) >
For the first solder mask 2-1 of first surface, use to connecting the photomask 5 leaving the such pattern of the area illumination active ray 6 in the outside of the periphery of 200 μm with the end connecting pad 3 from multiple electronic unit, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (C2) >
For the first solder mask 2-1 of second, in order to connect with connecting the region, circular open portion pad 4 being arranged diameter 500 μm in outside, use the photomask 5 of the pattern such with external radiation exposure active ray 6 to region, circular open portion, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (B) >
After supporting course film on the first solder mask 2-1 having peeled off first surface and second, by the sodium metasilicate aqueous solution (liquid temperature 25 DEG C) of 10 quality % as filming treatment fluid, on first surface being, circuit substrate 1 is immersed in filming treatment fluid 25 seconds and carries out micellization process (filming process).Afterwards, the micella removing carrying out utilizing micella to remove the spraying of liquid (liquid temperature 25 DEG C) processes, washing processes (liquid temperature 25 DEG C) and dry process, filming is carried out to the first solder mask 2-1 of average 10 μm, until the thickness of the first solder mask 2-1 in the non-exposed portion of first surface becomes electronic unit connect with the surface connecting pad 3 lower 5.0 μm.When observing with light microscope, not processing inequality on the surface of the first solder mask 2-1 of first surface, obtaining good inner evenness.On the other hand, the first solder mask 2-1 of second has also carried out average 10 μm of filmings, but the bubble in filming treatment fluid is attached to the first solder mask 2-1 in the non-exposed portion of second, there is membrane thickness unevenness part.In addition, connect in outside and remain with connecting pad 4 residue of the first solder mask 2-1 of 13 μm of having an appointment.
< operation (C3) >
For the first solder mask 2-1 of first surface, use the photomask 5 to the such pattern of the area illumination active ray 6 after filming in operation (B), by noncontact exposure under an oxygen atmosphere, with exposure 400mJ/cm
2expose.
< operation (A2) >
Use vacuum lamination that solder mask film (sun ink manufactures (share) system, trade name: the PFR-800AUS410) vacuum hotpressing of thickness 15 μm is connected to (laminating temperature 75 DEG C, pull up time 30 seconds, 10 seconds pressing times) on the first solder mask 2-1 of the first surface of the circuit substrate 1 being accomplished to operation (C3).Thus, the second solder mask 2-2 of first surface is defined.At the second solder mask 2-2 of first surface, the thickness from insulating barrier 8 surface is 30 μm.
< operation (C6) >
For the second solder mask 2-2 of first surface, use to connecting the photomask 5 leaving the such pattern of the area illumination active ray 6 in the outside of the periphery of 400 μm with the end connecting pad 3 from electronic unit, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (D1) >
Use the aqueous sodium carbonate of 1 quality % (liquid temp 30 DEG C, spraying pressure 0.15MPa) to carry out development in 30 seconds, eliminate the first solder mask 2-1 in the non-exposed portion of the second solder mask 2-2 and second of the non-exposed portion of first surface.Thus, form underfill and block with dam, and the electronic unit of the state exposed from the first solder mask 2-1 covered by the second solder mask 2-2 connects with connecting pad 3 and the first solder mask 2-1 around it exposes again.Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding the first solder mask 2-1 and the second solder mask 2-2 with outside with connecting pad 3.In addition, the first solder mask 2-1 is filled with, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 5.5 μm.By the exposure of noncontact under an oxygen atmosphere in operation (C3), the electronic unit being configured in first surface connects suppressed with the photo polymerization on the first solder mask 2-1 surface connected between pad 3, as a result, the thickness of the first solder mask 2-1 of first surface decreases 0.5 μm.
Then, in order to make the first solder mask 2-1 of the first solder mask 2-1 of first surface and the second solder mask 2-2 and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the first solder mask 2-1 of thickness 30 μm and 20 μm and the second solder mask 2-2 institute, and the underfill defining the thickness 10 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the first solder mask 2-1 being filled with thickness 9.5 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of the first solder mask 2-1 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the first solder mask 2-1 of the thickness 20 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.05 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the first solder mask 2-1 connected between pad 3, surface roughness Ra is 0.40 μm.
(embodiment 13)
By implementing operation (A1) ~ operation (D1) except having exchanged operation (C1) method identical with embodiment 12 except the order of operation (C2).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding the first solder mask 2-1 and the second solder mask 2-2 with outside with connecting pad 3.In addition, the first solder mask 2-1 is filled with, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 5.5 μm.By the exposure of noncontact under an oxygen atmosphere in operation (C3), the electronic unit being configured in first surface connects suppressed with the photo polymerization on the first solder mask 2-1 surface connected between pad 3, and as a result, the thickness of the first solder mask 2-1 decreases 0.5 μm.
Then, in order to make the first solder mask 2-1 of the first solder mask 2-1 of first surface and the second solder mask 2-2 and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the first solder mask 2-1 of thickness 30 μm and 20 μm and the second solder mask 2-2 institute, and the underfill defining the thickness 10 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the first solder mask 2-1 being filled with thickness 9.5 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of the first solder mask 2-1 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the first solder mask 2-1 of the thickness 20 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.05 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the first solder mask 2-1 connected between pad 3, surface roughness Ra is 0.40 μm.
(embodiment 14)
By except making the exposure in operation (C3) be 200mJ/cm
2method identical with embodiment 12 in addition implements operation (A1) ~ operation (D1).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding the first solder mask 2-1 and the second solder mask 2-2 with outside with connecting pad 3.In addition, the first solder mask 2-1 is filled with, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 6.0 μm.By the exposure of noncontact under an oxygen atmosphere in operation (C3), the electronic unit being configured in first surface connects suppressed with the photo polymerization on the first solder mask 2-1 surface connected between pad 3, and as a result, the thickness of the first solder mask 2-1 decreases 1.0 μm.
Then, in order to make the first solder mask 2-1 of the first solder mask 2-1 of first surface and the second solder mask 2-2 and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the first solder mask 2-1 of thickness 30 μm and 20 μm and the second solder mask 2-2 institute, and the underfill defining the thickness 10 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the first solder mask 2-1 being filled with thickness 9.0 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of the first solder mask 2-1 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the first solder mask 2-1 of the thickness 20 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.05 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the first solder mask 2-1 connected between pad 3, surface roughness Ra is 0.50 μm.
(embodiment 15)
By except making the exposure in operation (C3) be 1000mJ/cm
2method identical with embodiment 12 in addition implements operation (A1) ~ operation (D1).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding the first solder mask 2-1 and the second solder mask 2-2 with outside with connecting pad 3.In addition, be filled with the first solder mask 2-1, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 5.0 μm, the polymerization by the oxygen in operation (C3) unconfirmed hinders the film reduction of the first solder mask 2-1 of the first surface caused.
Then, in order to make the first solder mask 2-1 of the first solder mask 2-1 of first surface and the second solder mask 2-2 and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the first solder mask 2-1 of thickness 30 μm and 20 μm and the second solder mask 2-2 institute, and the underfill defining the thickness 10 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the first solder mask 2-1 being filled with thickness 10.0 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of the first solder mask 2-1 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the first solder mask 2-1 of the thickness 20 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.05 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the first solder mask 2-1 connected between pad 3, surface roughness Ra is 0.30 μm.
(embodiment 16)
By except implementing operation (A1) ~ operation (D1) by the method identical with embodiment 12 except being close to Exposure mode to expose in operation (C3).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding the first solder mask 2-1 and the second solder mask 2-2 with outside with connecting pad 3.In addition, the first solder mask 2-1 is filled with, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 5.0 μm.In operation (C3), by fully carrying out deflating and exposing under non-oxygen environment when being close to exposure, therefore, the first solder mask 2-1 surface is not by matsurface, and as a result, the thickness of the first solder mask 2-1 does not reduce.
Then, in order to make the first solder mask 2-1 of the first solder mask 2-1 of first surface and the second solder mask 2-2 and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the first solder mask 2-1 of thickness 30 μm and 20 μm and the second solder mask 2-2 institute, and the underfill defining the thickness 10 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the first solder mask 2-1 being filled with thickness 10.0 μm between pad 3 at adjacent electronic unit.In addition, in second, connect the circular open portion of the first solder mask 2-1 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the first solder mask 2-1 of the thickness 20 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.05 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the first solder mask 2-1 connected between pad 3, surface roughness Ra is 0.10 μm.
In embodiment 12 ~ 16, connect with connecting the first solder mask 2-1 that there is sufficient thickness between pad 3, therefore, it is possible to reliably prevent the electrical short caused when mounting electronic parts because solder causes at adjacent electronic unit.Connecting with connecting residue pad 4 not existing the first solder mask 2-1 in outside, therefore, it is possible to be produced on when being installed on outside electric substrate, the high circuit board of the bad reliability of electric insulation also can not occur.When comparing embodiment 12 ~ 16, compared with the circuit board that manufactures in level and smooth embodiment 16 with connecting with the surface of the first solder mask 2-1 connected between pad 3 at electronic unit, the circuit board manufactured in embodiment 12 ~ 15 and the close property of underfill higher, connection reliability is more superior.
Embodiment 17 ~ 21 is examples of the manufacture method (4) about the circuit board shown in Fig. 7-1, Fig. 7-2 and Fig. 7-3.
(embodiment 17)
< operation (A1) >
Semi-additive process is used to be produced on circuit substrate 1(area 170mm × 200mm, conductor thickness 15 μm, the substrate thickness 0.4mm that two sides is formed with conductor wiring 7).Exist on surface (first surface) and be used as electronic unit connection with connecting the line width 25 μm of pad 3, the conductor wiring at 50 μm, interval.(the second face) is formed and is used as the outside round-shaped conductor wiring connected with the diameter 600 μm connecting pad 4 overleaf.Then, (sun ink manufactures (share) system by the solder mask film of thickness 15 μm to use vacuum lamination, trade name: PFR-800AUS410) vacuum hotpressing is connected to the surface of foregoing circuit substrate 1, by the solder mask film of thickness 25 μm, (sun ink manufactures (share) system, trade name: PFR-800AUS410) vacuum hotpressing is connected to the back side (laminating temperature 75 DEG C of foregoing circuit substrate 1, pull up time 30 seconds, 10 seconds pressing times).Thus, the first solder mask 2-1 is defined.In the first solder mask 2-1 of first surface, the thickness from insulating barrier 8 surface is 20 μm, and it is 5 μm that electronic unit connects with the thickness connected on pad 3.In the first solder mask 2-1 of second, the thickness from insulating barrier 8 surface is 38 μm, and outside connection with the thickness connected on pad 4 is 23 μm.
< operation (C1) >
For the first solder mask 2-1 of first surface, use to connecting the photomask 5 leaving the such pattern of the area illumination active ray 6 in the outside of the periphery of 200 μm with the end connecting pad 3 from multiple electronic unit, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (C2) >
For the first solder mask 2-1 of second, in order to connect with connecting the region, circular open portion pad 4 being arranged diameter 500 μm in outside, use the photomask 5 of the pattern such with external radiation exposure active ray 6 to region, circular open portion, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (B) >
After supporting course film on the first solder mask 2-1 having peeled off first surface and second, by the sodium metasilicate aqueous solution (liquid temperature 25 DEG C) of 10 quality % as filming treatment fluid, on first surface being, circuit substrate 1 is immersed in filming treatment fluid 25 seconds and carries out micellization process (filming process).Afterwards, the micella removing carrying out utilizing micella to remove the spraying of liquid (liquid temperature 25 DEG C) processes, washing processes (liquid temperature 25 DEG C) and dry process, filming is carried out to the first solder mask 2-1 of average 10 μm, until the thickness of the first solder mask 2-1 in the non-exposed portion of first surface becomes electronic unit connect with the surface connecting pad 3 lower 5.0 μm.When observing with light microscope, not processing inequality on the surface of the first solder mask 2-1 of first surface, obtaining good inner evenness.On the other hand, the first solder mask 2-1 of second has also carried out average 10 μm of filmings, but the bubble in filming treatment fluid is attached to the first solder mask 2-1 in the non-exposed portion of second, there is membrane thickness unevenness part.In addition, connect in outside and remain with connecting pad 4 residue of the first solder mask 2-1 of 13 μm of having an appointment.
< operation (C3) >
For the first solder mask 2-1 of first surface, use the photomask 5 to the such pattern of the area illumination active ray 6 after filming in operation (B), by noncontact exposure under an oxygen atmosphere, with exposure 400mJ/cm
2expose.
< operation (D) >
Use the aqueous sodium carbonate of 1 quality % (liquid temp 30 DEG C, spraying pressure 0.15MPa) to carry out development in 30 seconds, eliminate the first solder mask 2-1 in the non-exposed portion of second.
< operation (A2) >
(sun ink manufactures (share) system by the solder mask film of thickness 15 μm to use vacuum lamination, trade name: PFR-800AUS410) vacuum hotpressing is connected to (laminating temperature 75 DEG C on the first solder mask 2-1 of the first surface of the circuit substrate 1 being accomplished to operation (D), pull up time 30 seconds, 10 seconds pressing times).Thus, the second solder mask 2-2 of first surface is defined.At the second solder mask 2-2 of first surface, the thickness from insulating barrier 8 surface is 30 μm.
< operation (C6) >
For the second solder mask 2-2 of first surface, use to connecting the photomask 5 leaving the such pattern of the area illumination active ray 6 in the outside of the periphery of 400 μm with the end connecting pad 3 from electronic unit, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (D2) >
Use the aqueous sodium carbonate of 1 quality % (liquid temp 30 DEG C, spraying pressure 0.15MPa) to carry out development in 30 seconds, eliminate the second solder mask 2-2 in the non-exposed portion of first surface.Thus, form underfill and block with dam, and the electronic unit of the state exposed from the first solder mask 2-1 covered by the second solder mask 2-2 connects with connecting pad 3 and the first solder mask 2-1 around it exposes again.Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding the first solder mask 2-1 and the second solder mask 2-2 with outside with connecting pad 3.In addition, the first solder mask 2-1 is filled with, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 5.5 μm.By the exposure of noncontact under an oxygen atmosphere in operation (C3), the electronic unit being configured in first surface connects suppressed with the photo polymerization on the first solder mask 2-1 surface connected between pad 3, as a result, the thickness of the first solder mask 2-1 of first surface decreases 0.5 μm.
Then, in order to make the first solder mask 2-1 of the first solder mask 2-1 of first surface and the second solder mask 2-2 and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the first solder mask 2-1 of thickness 30 μm and 20 μm and the second solder mask 2-2 institute, and the underfill defining the thickness 10 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the first solder mask 2-1 being filled with thickness 9.5 μm between pad 3 at adjacent electronic unit.In addition, in second, connect the circular open portion of the first solder mask 2-1 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the first solder mask 2-1 of the thickness 20 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.05 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the first solder mask 2-1 connected between pad 3, surface roughness Ra is 0.40 μm.
(embodiment 18)
By implementing operation (A1) ~ operation (D2) except having exchanged operation (C1) method identical with embodiment 17 except the order of operation (C2).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding the first solder mask 2-1 and the second solder mask 2-2 with outside with connecting pad 3.In addition, the first solder mask 2-1 is filled with, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 5.5 μm.By the exposure of noncontact under an oxygen atmosphere in operation (C3), the electronic unit being configured in first surface connects suppressed with the photo polymerization on the first solder mask 2-1 surface connected between pad 3, and as a result, the thickness of the first solder mask 2-1 decreases 0.5 μm.
Then, in order to make the first solder mask 2-1 of the first solder mask 2-1 of first surface and the second solder mask 2-2 and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the first solder mask 2-1 of thickness 30 μm and 20 μm and the second solder mask 2-2 institute, and the underfill defining the thickness 10 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the first solder mask 2-1 being filled with thickness 9.5 μm between pad 3 at adjacent electronic unit.In addition, in second, connect the circular open portion of the first solder mask 2-1 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the first solder mask 2-1 of the thickness 20 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.05 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the first solder mask 2-1 connected between pad 3, surface roughness Ra is 0.40 μm.
(embodiment 19)
By except making the exposure in operation (C3) be 200mJ/cm
2method identical with embodiment 17 in addition implements operation (A1) ~ operation (D2).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding the first solder mask 2-1 and the second solder mask 2-2 with outside with connecting pad 3.In addition, the first solder mask 2-1 is filled with, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 6.0 μm.By the exposure of noncontact under an oxygen atmosphere in operation (C3), the electronic unit being configured in first surface connects suppressed with the photo polymerization on the first solder mask 2-1 surface connected between pad 3, and as a result, the thickness of the first solder mask 2-1 decreases 1.0 μm.
Then, in order to make the first solder mask 2-1 of the first solder mask 2-1 of first surface and the second solder mask 2-2 and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the first solder mask 2-1 of thickness 30 μm and 20 μm and the second solder mask 2-2 institute, and the underfill defining the thickness 10 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the first solder mask 2-1 being filled with thickness 9.0 μm between pad 3 at adjacent electronic unit.In addition, at second, connect the circular open portion of the first solder mask 2-1 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the first solder mask 2-1 of the thickness 20 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.05 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the first solder mask 2-1 connected between pad 3, surface roughness Ra is 0.50 μm.
(embodiment 20)
By except making the exposure in operation (C3) be 1000mJ/cm
2method identical with embodiment 17 in addition, implements operation (A1) ~ operation (D2).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding the first solder mask 2-1 and the second solder mask 2-2 with outside with connecting pad 3.In addition, be filled with the first solder mask 2-1, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 5.0 μm, the polymerization by the oxygen in operation (C3) unconfirmed hinders the film reduction of the first solder mask 2-1 of the first surface caused.
Then, in order to make the first solder mask 2-1 of the first solder mask 2-1 of first surface and the second solder mask 2-2 and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the first solder mask 2-1 of thickness 30 μm and 20 μm and the second solder mask 2-2 institute, and the underfill defining the thickness 10 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the first solder mask 2-1 being filled with thickness 10.0 μm between pad 3 at adjacent electronic unit.In addition, in second, connect the circular open portion of the first solder mask 2-1 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the first solder mask 2-1 of the thickness 20 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.05 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the first solder mask 2-1 connected between pad 3, surface roughness Ra is 0.30 μm.
(embodiment 21)
By except implementing operation (A1) ~ operation (D2) by the method identical with embodiment 17 except being close to Exposure mode to expose in operation (C3).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding the first solder mask 2-1 and the second solder mask 2-2 with outside with connecting pad 3.In addition, the first solder mask 2-1 is filled with, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 5.0 μm.In operation (C3), by fully carrying out deflating and exposing under non-oxygen environment when being close to exposure, therefore, the first solder mask 2-1 surface is not by matsurface, and as a result, the thickness of the first solder mask 2-1 does not reduce.
Then, in order to make the first solder mask 2-1 of the first solder mask 2-1 of first surface and the second solder mask 2-2 and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the first solder mask 2-1 of thickness 30 μm and 20 μm and the second solder mask 2-2 institute, and the underfill defining the thickness 10 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the first solder mask 2-1 being filled with thickness 10.0 μm between pad 3 at adjacent electronic unit.In addition, in second, connect the circular open portion of the first solder mask 2-1 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the first solder mask 2-1 of the thickness 20 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.05 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the first solder mask 2-2 connected between pad 3, surface roughness Ra is 0.10 μm.
In embodiment 17 ~ 21, connect with connecting the first solder mask 2-1 that there is sufficient thickness between pad 3, therefore, it is possible to reliably prevent the electrical short caused when mounting electronic parts because solder causes at adjacent electronic unit.Connecting with connecting residue pad 4 not existing the first solder mask 2-1 in outside, therefore, it is possible to be produced on when being installed on outside electric substrate, the high circuit board of the bad reliability of electric insulation also can not occur.When comparing embodiment 17 ~ 21, compared with the circuit board that manufactures in level and smooth embodiment 21 with connecting with the surface of the first solder mask 2-1 connected between pad 3 at electronic unit, the circuit board manufactured in embodiment 17 ~ 20 and the close property of underfill higher, connection reliability is more superior.
Embodiment 22 ~ 25 is examples of the manufacture method (5) about the circuit board shown in Fig. 8-1, Fig. 8-2 and Fig. 8-3.
(embodiment 22)
< operation (A1) >
Semi-additive process is used to be produced on circuit substrate 1(area 170mm × 200mm, conductor thickness 15 μm, the substrate thickness 0.4mm that two sides is formed with conductor wiring 7).Exist on surface (first surface) and be used as electronic unit connection with connecting the line width 25 μm of pad 3, the conductor wiring at 50 μm, interval.(the second face) is formed and is used as the outside round-shaped conductor wiring connected with the diameter 600 μm connecting pad 4 overleaf.Then, (sun ink manufactures (share) system by the solder mask film of thickness 15 μm to use vacuum lamination, trade name: PFR-800AUS410) vacuum hotpressing is connected to the surface of foregoing circuit substrate 1, by the solder mask film of thickness 25 μm, (sun ink manufactures (share) system, trade name: PFR-800AUS410) vacuum hotpressing is connected to the back side (laminating temperature 75 DEG C of foregoing circuit substrate 1, pull up time 30 seconds, 10 seconds pressing times).Thus, the first solder mask 2-1 is defined.In the first solder mask 2-1 of first surface, the thickness from insulating barrier 8 surface is 20 μm, and it is 5 μm that electronic unit connects with the thickness connected on pad 3.In the first solder mask 2-1 of second, the thickness from insulating barrier 8 surface is 38 μm, and outside connection with the thickness connected on pad 4 is 23 μm.
< operation (C2) >
For the first solder mask 2-1 of second, in order to connect with connecting the region, circular open portion pad 4 being arranged diameter 500 μm in outside, use the photomask 5 of the pattern such with external radiation exposure active ray 6 to region, circular open portion, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (B) >
After supporting course film on the first solder mask 2-1 having peeled off first surface and second, by the sodium metasilicate aqueous solution (liquid temperature 25 DEG C) of 10 quality % as filming treatment fluid, on first surface being, circuit substrate 1 is immersed in filming treatment fluid 25 seconds and carries out micellization process (filming process).Afterwards, the micella removing carrying out utilizing micella to remove the spraying of liquid (liquid temperature 25 DEG C) processes, washing processes (liquid temperature 25 DEG C) and dry process, filming is carried out to the first solder mask 2-1 of average 10 μm, until the thickness of the first solder mask 2-1 in the non-exposed portion of first surface becomes electronic unit connect with the surface connecting pad 3 lower 5.0 μm.When observing with light microscope, not processing inequality on the surface of the first solder mask 2-1 of first surface, obtaining good inner evenness.On the other hand, the first solder mask 2-1 of second has also carried out average 10 μm of filmings, but the bubble in filming treatment fluid is attached to the first solder mask 2-1 in the non-exposed portion of second, there is membrane thickness unevenness part.In addition, connect in outside and remain with connecting pad 4 residue of the first solder mask 2-1 of 13 μm of having an appointment.
< operation (C3) >
For the first solder mask 2-1 of first surface, use the photomask 5 to the such pattern of the area illumination active ray 6 after filming in operation (B), by noncontact exposure under an oxygen atmosphere, with exposure 400mJ/cm
2expose.
< operation (A2) >
(sun ink manufactures (share) system by the solder mask film of thickness 20 μm to use vacuum lamination, trade name: PFR-800AUS410) vacuum hotpressing is connected to (laminating temperature 75 DEG C on the first solder mask 2-1 of the first surface of the circuit substrate 1 being accomplished to operation (C), pull up time 30 seconds, 10 seconds pressing times).Thus, the second solder mask 2-2 of first surface is defined.At the second solder mask 2-2 of first surface, the thickness from insulating barrier 8 surface is 30 μm.
< operation (C6) >
For the second solder mask 2-2 of first surface, use to connecting the photomask 5 leaving the such pattern of the area illumination active ray 6 in the outside of the periphery of 400 μm with the end connecting pad 3 from electronic unit, with exposure 200mJ/cm
2carry out being close to exposure.
< operation (B3) >
After the supporting course film on the second solder mask 2-2 having peeled off first surface, by the sodium metasilicate aqueous solution (liquid temperature 25 DEG C) of 10 quality % as filming treatment fluid, on first surface being, circuit substrate 1 is immersed in filming treatment fluid 25 seconds and carries out micellization process (filming process).Afterwards, the micella removing carrying out utilizing micella to remove the spraying of liquid (liquid temperature 25 DEG C) processes, washing processes (liquid temperature 25 DEG C) and dry process, filming is carried out to the second solder mask 2-2 of average 10 μm, until the thickness of the second solder mask 2-2 in the non-exposed portion of first surface becomes electronic unit connect with the surface connecting pad 3 lower 5.0 μm.When observing with light microscope, not processing inequality on the surface of the second solder mask 2-2 of first surface, obtaining good inner evenness.On the other hand, the first solder mask 2-1 of second has also carried out average 10 μm of filmings, but the bubble in filming treatment fluid is attached to the first solder mask 2-1 in the non-exposed portion of second, there is membrane thickness unevenness part.In addition, connect in outside and remain with connecting pad 4 residue of the first solder mask 2-1 of 3 μm of having an appointment.
< operation (C7) >
For the second solder mask 2-2 of first surface, use to connecting the photomask 5 leaving the such pattern of the area illumination active ray 6 in the outside of the periphery of 200 μm with the end connecting pad 3 from electronic unit, by noncontact exposure under an oxygen atmosphere, with exposure 400mJ/cm
2expose.
< operation (D1) >
Use the aqueous sodium carbonate of 1 quality % (liquid temp 30 DEG C, spraying pressure 0.15MPa) to carry out development in 30 seconds, eliminate the first solder mask 2-1 in the non-exposed portion of the second solder mask 2-2 and second of the non-exposed portion of first surface.Thus, form underfill and block with dam, and the electronic unit of the state exposed from the first solder mask 2-1 covered by the second solder mask 2-2 connects with connecting pad 3 and the first solder mask 2-1 around it exposes again.Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding the first solder mask 2-1 and the second solder mask 2-2 with outside with connecting pad 3.In addition, the first solder mask 2-1 is filled with, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 5.5 μm.By the exposure of noncontact under an oxygen atmosphere in operation (C3), the electronic unit being configured in first surface connects suppressed with the photo polymerization on the first solder mask 2-1 surface connected between pad 3, as a result, the thickness of the first solder mask 2-1 of first surface reduces 0.5 μm.In addition, by the noncontact exposure under the oxygen environment in operation (C7), be in the photo polymerization leaving the second solder mask 2-2 surface of the thickness 20 μm in the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units connections being configured in first surface suppressed, as a result, the thickness of the second solder mask 2-2 of thickness 20 μm decreases 0.5 μm.
Then, in order to make the first solder mask 2-1 of the first solder mask 2-1 of first surface and the second solder mask 2-2 and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.Fractographic as a result, at first surface with optics, the conductor wiring 7 that thickness is 15 μm is coated by the second solder mask 2-2 institute of thickness 30 μm and 19.5 μm, and the underfill defining the thickness 10.5 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the first solder mask 2-1 being filled with thickness 9.5 μm between pad 3 at adjacent electronic unit.In addition, in second, connect the circular open portion of the first solder mask 2-1 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the second solder mask 2-2 of the thickness 19.5 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.40 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the first solder mask 2-1 connected between pad 3, surface roughness Ra is 0.40 μm.
(embodiment 23)
By except making the exposure in operation (C3) and (C7) be 200mJ/cm
2method identical with embodiment 22 in addition implements operation (A1) ~ operation (D1).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding the first solder mask 2-1 and the second solder mask 2-2 with outside with connecting pad 3.In addition, the first solder mask 2-1 is filled with, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 6.0 μm.By the exposure of noncontact under an oxygen atmosphere in operation (C3), the electronic unit being configured in first surface connects suppressed with the photo polymerization on the first solder mask 2-1 surface connected between pad 3, and as a result, the thickness of the first solder mask 2-1 decreases 1.0 μm.In addition, by the exposure of noncontact under an oxygen atmosphere in operation (C7), be in the photo polymerization leaving the second solder mask 2-2 surface of the thickness 20 μm in the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units connections being configured in first surface suppressed, as a result, the thickness of the second solder mask 2-2 of thickness 20 μm decreases 1.0 μm.
Then, in order to make the first solder mask 2-1 of the first solder mask 2-1 of first surface and the second solder mask 2-2 and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the first solder mask 2-1 of thickness 30 μm and 19 μm and the second solder mask 2-2 institute, and the underfill defining the thickness 11 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the first solder mask 2-1 being filled with thickness 9.0 μm between pad 3 at adjacent electronic unit.In addition, in second, connect the circular open portion of the first solder mask 2-1 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the second solder mask 2-2 of the thickness 19 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.50 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the first solder mask 2-1 connected between pad 3, surface roughness Ra is 0.50 μm.
(embodiment 24)
By except making the exposure in operation (C3) and (C7) be 1000mJ/cm
2method identical with embodiment 22 in addition implements operation (A1) ~ operation (D1).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding the first solder mask 2-1 and the second solder mask 2-2 with outside with connecting pad 3.In addition, be filled with the first solder mask 2-1, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 5.0 μm, the polymerization by the oxygen in operation (C3) and (C7) unconfirmed hinders the film reduction of the first solder mask 2-1 of the first surface caused and the second solder mask 2-2 of first surface.
Then, in order to make the first solder mask 2-1 of the first solder mask 2-1 of first surface and the second solder mask 2-2 and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the first solder mask 2-1 of thickness 30 μm and 20 μm and the second solder mask 2-2 institute, and the underfill defining the thickness 10 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the first solder mask 2-1 being filled with thickness 10.0 μm between pad 3 at adjacent electronic unit.In addition, in second, connect the circular open portion of the first solder mask 2-1 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the second solder mask 2-2 of the thickness 20 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.30 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the first solder mask 2-1 connected between pad 3, surface roughness Ra is 0.30 μm.
(embodiment 25)
By except implementing operation (A1) ~ operation (D1) with in (C7) by the method identical with embodiment 22 except being close to Exposure mode to expose in operation (C3).Fractographic as a result, first surface and second with optics, connect at electronic unit and be connected with connecting residue pad 4 all not finding the first solder mask 2-1 and the second solder mask 2-2 with outside with connecting pad 3.In addition, the first solder mask 2-1 is filled with, until the electronic unit being configured in first surface connects with the surface connecting pad 3 lower 5.0 μm.In operation (C3) and (C7), by fully carrying out deflating and exposing under non-oxygen environment when being close to exposure, therefore, solder mask 2 surface is not by matsurface, as a result, the thickness of the first solder mask 2-1 of first surface and the second solder mask 2-2 of first surface does not reduce.
Then, in order to make the first solder mask 2-1 of the first solder mask 2-1 of first surface and the second solder mask 2-2 and second solidify, with exposure 1000mJ/cm
2carry out the exposure of whole surface, then, implement hot curing process in 60 minutes with 150 DEG C, obtain circuit board.By the fractographic result of optics be, at first surface, the conductor wiring 7 that thickness is 15 μm is coated by the first solder mask 2-1 of thickness 30 μm and 20 μm and the second solder mask 2-2 institute, and the underfill defining the thickness 10 μm being equivalent to its ladder difference is blocked and used dam.In addition, the electronic unit that thickness is 15 μm connects and exposes with connecting pad 3, connects with connecting the first solder mask 2-1 being filled with thickness 10 μm between pad 3 at adjacent electronic unit.In addition, in second, connect the circular open portion of the first solder mask 2-1 being formed with thickness 38 μm, diameter 500 μm by the part connected on pad 4 in the outside of thickness 15 μm, outside connection is exposed by the part connecting pad 4.
Then, measure be in connect the surface roughness of the second solder mask 2-2 of the thickness 20 μm leaving the region between the periphery of 200 μm and the periphery leaving 400 μm from this end with the end connecting pad 3 from the multiple electronic units being configured in first surface time, surface roughness Ra is 0.10 μm.In addition, when measuring the surface roughness that adjacent electronic unit connects with the first solder mask 2-1 connected between pad 3, surface roughness Ra is 0.10 μm.
In embodiment 22 ~ 25, connect with connecting the first solder mask 2-1 that there is sufficient thickness between pad 3, therefore, it is possible to reliably prevent the electrical short caused when mounting electronic parts because solder causes at adjacent electronic unit.Connecting with connecting residue pad 4 not existing the first solder mask 2-1 in outside, therefore, it is possible to be produced on when being installed on outside electric substrate, the high circuit board of the bad reliability of electric insulation also can not occur.When comparing embodiment 22 ~ 25, to connect with the surface of the second solder mask 2-2 connected around pad 3 with the first solder mask 2-1 connected between pad 3 and electronic unit be that the circuit board manufactured in level and smooth embodiment 25 is compared with connecting at electronic unit, the circuit board manufactured in embodiment 22 ~ 24 and the close property of underfill higher, connection reliability is more superior.
As above-mentioned explanation, about the circuit board utilizing embodiment 1 ~ 6 to manufacture, the electronic unit of first surface connects and exposes from solder mask 2 by the part connecting pad 3.When using this circuit board to carry out flip-chip connection, be configured with electronic unit connection to high-density with connecting in the circuit board of pad 3, connect with connecting the solder mask 2 that also there is sufficient thickness between pad 3 at adjacent electronic unit, therefore, it is possible to reliably prevent the electrical short caused when mounting electronic parts because solder causes.In addition, the adhesive strength that insulating barrier 8 is connected with electronic unit with the adhesive strength and electronic unit that connect pad 3 connect with connecting pad 3 and solder becomes greatly, obtains high connection reliability.And then, when utilizing noncontact Exposure mode under an oxygen atmosphere to carry out the exposure in operation (C3), electronic unit connects the abundant matsurface in surface with the solder mask 2 connected around pad 3, therefore, good with the close property of underfill, obtain high connection reliability.In addition, connecting the residue with the surface connecting pad 4 not existing yet solder mask 2 the outside of second, therefore, when being installed on external substrate, obtaining the high connection reliability that electric insulation in can not being welded to connect is bad.
As above-mentioned explanation, about the circuit board utilizing embodiment 7 ~ 26 to manufacture, electronic unit connects with connecting a part for pad 3 from solder mask 2(first solder mask 2-1) expose, and then, having and utilize the solder mask 2(first solder mask 2-1 of second configuration and the second solder mask 2-2) underfill that formed blocks and uses dam.When using this circuit board to carry out flip-chip connection, can prevent the underfill of filling between electronic unit and circuit board from overflowing towards periphery and causing bad influence to reliability of electrical connection.In addition, be configured with electronic unit connection to high-density with connecting in the circuit board of pad 3, connect with connecting the solder mask 2(first solder mask 2-1 that there is sufficient thickness between pad 3 at adjacent electronic unit), therefore, it is possible to reliably prevent the electrical short caused when mounting electronic parts because solder causes.The adhesive strength that insulating barrier 8 is connected with electronic unit with the adhesive strength and electronic unit that connect pad 3 connect with connecting pad 3 and solder becomes greatly, obtains high connection reliability.And then, when the exposure utilizing noncontact Exposure mode under an oxygen atmosphere to carry out in the operation (C7) of the operation (C4) of the manufacture method (2) of circuit board and (C5), the manufacture method (3) of circuit board, (4), the operation (C3) of (5), the manufacture method (5) of circuit board, electronic unit connects solder mask 2(first solder mask 2-1, the second solder mask 2-2 with connecting between pad 3, around) surface fully matsurface, therefore, good with the close property of underfill, obtain high connection reliability.In addition, connecting the residue with the surface connecting pad 4 not existing yet the first solder mask 2-1 the outside of second, therefore, when being installed on external substrate, obtaining the high connection reliability that electric insulation in can not being welded to connect is bad.
Utilizability in industry
The manufacture method of circuit board of the present invention such as can be applied to manufacture to be had for connecting semiconductor chip, other the purposes of circuit board of multiple connection pads of electronic unit of printed wiring board.
The explanation of Reference numeral
1 circuit substrate
2 solder masks
2-1 first solder mask
2-2 second solder mask
3 electronic units connect with the connection pad connecting pad, first surface
4 outside connect with connecting pad, the connection pad of second
5 photomasks
6 active rays
7 conductor wirings
8 insulating barriers.
Claims (16)
1. the manufacture method of a circuit board, described circuit board has the circuit substrate on two sides with insulating barrier and the connection pad formed on the surface of insulating barrier and has solder mask on the two sides of circuit substrate and the part being connected pad is exposed from solder mask, the feature of described manufacture method is, comprises:
(A) form the operation of the different solder mask of thickness on the two sides of circuit substrate, described circuit substrate has insulating barrier and is formed in the connection pad on surface of insulating barrier on two sides;
(C1) for the solder mask of the thin first surface of the solder mask of Thickness Ratio second to the operation exposed by the part beyond the region of filming in as the operation (B) of rear operation;
(C2) for the operation that the solder mask of second exposes the part beyond the region be developed in as the operation (D) of rear operation;
(B) first surface utilize filming treatment fluid to make the solder mask filming in non-exposed portion until become connect pad thickness below expose the operation of a part connecting pad;
(C3) for the operation that the solder mask of first surface exposes the area part after filming in operation (B); And
(D) developer solution is utilized to remove the operation of the solder mask in the non-exposed portion of second.
2. the manufacture method of a circuit board, described circuit board has the circuit substrate on two sides with insulating barrier and the connection pad formed on the surface of insulating barrier and has solder mask on the two sides of circuit substrate and the part being connected pad is exposed from solder mask, the feature of described manufacture method is, comprises:
(A) form the operation of the different solder mask of thickness on the two sides of circuit substrate, described circuit substrate has insulating barrier and is formed in the connection pad on surface of insulating barrier on two sides;
(C1) for the solder mask of the thin first surface of the solder mask of Thickness Ratio second to the operation exposed by the part beyond the region of filming in as the operation (B1) of rear operation;
(C2) for the operation that the solder mask of second exposes the part beyond the region be developed in as the operation (D) of rear operation;
(B1) filming treatment fluid is utilized the solder mask in non-exposed portion to be carried out to the operation of filming in the scope that connection pad does not expose at first surface;
(C4) for the solder mask of first surface to the operation exposed by the part beyond the region of filming in as the operation (B2) of rear operation;
(B2) first surface utilize filming treatment fluid to make the solder mask filming in non-exposed portion until become connect pad thickness below expose the operation of a part connecting pad;
(C5) for the operation that the solder mask of first surface exposes the area part after filming in operation (B2); And
(D) developer solution is utilized to remove the operation of the solder mask in the non-exposed portion of second.
3. the manufacture method of a circuit board, described circuit board has the circuit substrate on two sides with insulating barrier and the connection pad formed on the surface of insulating barrier and has solder mask on the two sides of circuit substrate and the part being connected pad is exposed from solder mask, the feature of described manufacture method is, comprises:
(A1) form the operation of different the first solder mask of thickness on the two sides of circuit substrate, described circuit substrate has insulating barrier and is formed in the connection pad on surface of insulating barrier on two sides;
(C1) for the first solder mask of the thin first surface of the first solder mask of Thickness Ratio second to the operation exposed by the part beyond the region of filming in as the operation (B) of rear operation;
(C2) for the operation that first solder mask of second exposes the part beyond the region be developed in as the operation (D1) of rear operation;
(B) first surface utilize filming treatment fluid to make the first solder mask filming in non-exposed portion until become connect pad thickness below expose the operation of a part connecting pad;
(C3) for the operation that the first solder mask of first surface exposes the area part after filming in operation (B);
(A2) be accomplished to (C3) operation circuit substrate first surface the first solder mask on form the operation of the second solder mask;
(C6) for the operation that the second solder mask of first surface exposes the part beyond the region be developed in as the operation (D1) of rear operation; And
(D1) utilize developer solution to the operation of first solder mask in the non-exposed portion of the second solder mask and second that remove the non-exposed portion of first surface.
4. the manufacture method of a circuit board, described circuit board has the circuit substrate on two sides with insulating barrier and the connection pad formed on the surface of insulating barrier and has solder mask on the two sides of circuit substrate and the part being connected pad is exposed from solder mask, the feature of described manufacture method is, comprises:
(A1) form the operation of different the first solder mask of thickness on the two sides of circuit substrate, described circuit substrate has insulating barrier and is formed in the connection pad on surface of insulating barrier on two sides;
(C1) for the first solder mask of the thin first surface of the first solder mask of Thickness Ratio second to the operation exposed by the part beyond the region of filming in as the operation (B) of rear operation;
(C2) for the operation that first solder mask of second exposes the part beyond the region be developed in as the operation (D) of rear operation;
(B) first surface utilize filming treatment fluid to make the first solder mask filming in non-exposed portion until become connect pad thickness below expose the operation of a part connecting pad;
(C3) for the operation that the first solder mask of first surface exposes the area part after filming in operation (B);
(D) developer solution is utilized to remove the operation of first solder mask in the non-exposed portion of second;
(A2) be accomplished to (D) operation circuit substrate first surface the first solder mask on form the operation of the second solder mask;
(C6) for the operation that the second solder mask of first surface exposes the part beyond the region be developed in as the operation (D2) of rear operation; And
(D2) utilize developer solution to remove the operation of second solder mask in the non-exposed portion of first surface.
5. the manufacture method of a circuit board, described circuit board has the circuit substrate on two sides with insulating barrier and the connection pad formed on the surface of insulating barrier and has solder mask on the two sides of circuit substrate and the part being connected pad is exposed from solder mask, the feature of described manufacture method is, comprises:
(A1) form the operation of different the first solder mask of thickness on the two sides of circuit substrate, described circuit substrate has insulating barrier and is formed in the connection pad on surface of insulating barrier on two sides;
(C2) for the operation that first solder mask of second exposes the part beyond the region be developed in as the operation (D1) of rear operation;
(B) first surface utilize filming treatment fluid to make the first solder mask filming in non-exposed portion until become connect pad thickness below expose the operation of a part connecting pad;
(C3) for the operation that the first solder mask of first surface exposes the area part after filming in operation (B);
(A2) be accomplished to (C3) operation circuit substrate first surface the first solder mask on form the operation of the second solder mask;
(C6) for the second solder mask of first surface to the operation exposed by the part beyond the region of filming in as the operation (B3) of rear operation;
(B3) filming treatment fluid is utilized second solder mask in non-exposed portion to be carried out to the operation of filming in the scope that connection pad does not expose at first surface;
(C7) for the operation that the second solder mask of first surface exposes the part beyond the region be developed in as the operation (D1) of rear operation; And
(D1) utilize developer solution to the operation of first solder mask in the non-exposed portion of the second solder mask and second that remove the non-exposed portion of first surface.
6. the manufacture method of the circuit board according to any one of claim 1 ~ 4, wherein, carried out operation (C2) before operation (C1).
7. the manufacture method of the circuit board according to any one of claim 1 ~ 4, wherein, carries out operation (C1) and operation (C2) simultaneously.
8. the manufacture method of the circuit board according to any one of claim 1,3,4, wherein, the exposure in operation (C3) is undertaken by noncontact Exposure mode under an oxygen atmosphere.
9. the manufacture method of circuit board according to claim 5, wherein, the exposure in operation (C3) and operation (C7) is undertaken by noncontact Exposure mode under an oxygen atmosphere.
10. the manufacture method of circuit board according to claim 2, wherein, the exposure in operation (C4) and operation (C5) is undertaken by noncontact Exposure mode under an oxygen atmosphere.
The manufacture method of 11. circuit boards according to any one of claim 1,3,4,8, wherein, the exposure in operation (C3) is more than 1 times less than 5 times of the exposure in operation (C1).
The manufacture method of 12. circuit boards according to claim 5 or 9, wherein, the exposure in operation (C3) and operation (C7) is more than 1 times less than 5 times of the exposure in operation (C6).
The manufacture method of 13. circuit boards according to claim 2 or 10, wherein, the exposure in operation (C4) and operation (C5) is more than 1 times less than 5 times of the exposure in operation (C1).
The manufacture method of 14. circuit boards according to any one of claim 1,3,4,8,11, wherein, the filming process of the solder mask in operation (B) with make filming treated side be on mode carry out.
The manufacture method of 15. circuit boards according to any one of claim 5,9,12, wherein, the filming process of the solder mask in operation (B) and operation (B3) with make filming treated side be on mode carry out.
The manufacture method of 16. circuit boards according to any one of claim 2,10,13, wherein, the filming process of the solder mask in operation (B1) and operation (B2) with make filming treated side be on mode carry out.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711303988.9A CN107979919B (en) | 2013-05-22 | 2014-05-15 | Method for manufacturing wiring substrate |
| CN201711304405.4A CN107969077B (en) | 2013-05-22 | 2014-05-15 | Method for manufacturing wiring substrate |
| CN201711303986.XA CN107969076B (en) | 2013-05-22 | 2014-05-15 | Method for manufacturing wiring substrate |
Applications Claiming Priority (21)
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| JP2013107932 | 2013-05-22 | ||
| JP2013-107932 | 2013-05-22 | ||
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| JP2014-090220 | 2014-04-24 | ||
| JP2014090220 | 2014-04-24 | ||
| PCT/JP2014/062928 WO2014188945A1 (en) | 2013-05-22 | 2014-05-15 | Manufacturing method for wiring board |
Related Child Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711303988.9A Division CN107979919B (en) | 2013-05-22 | 2014-05-15 | Method for manufacturing wiring substrate |
| CN201711304405.4A Division CN107969077B (en) | 2013-05-22 | 2014-05-15 | Method for manufacturing wiring substrate |
| CN201711303986.XA Division CN107969076B (en) | 2013-05-22 | 2014-05-15 | Method for manufacturing wiring substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105210460A true CN105210460A (en) | 2015-12-30 |
| CN105210460B CN105210460B (en) | 2019-01-11 |
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| CN201480029187.6A Active CN105210460B (en) | 2013-05-22 | 2014-05-15 | The manufacturing method of circuit board |
| CN201711304405.4A Active CN107969077B (en) | 2013-05-22 | 2014-05-15 | Method for manufacturing wiring substrate |
| CN201711303986.XA Active CN107969076B (en) | 2013-05-22 | 2014-05-15 | Method for manufacturing wiring substrate |
| CN201711303988.9A Active CN107979919B (en) | 2013-05-22 | 2014-05-15 | Method for manufacturing wiring substrate |
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| CN201711304405.4A Active CN107969077B (en) | 2013-05-22 | 2014-05-15 | Method for manufacturing wiring substrate |
| CN201711303986.XA Active CN107969076B (en) | 2013-05-22 | 2014-05-15 | Method for manufacturing wiring substrate |
| CN201711303988.9A Active CN107979919B (en) | 2013-05-22 | 2014-05-15 | Method for manufacturing wiring substrate |
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| JP (3) | JP6224520B2 (en) |
| KR (1) | KR102076479B1 (en) |
| CN (4) | CN105210460B (en) |
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| JP6075643B2 (en) * | 2013-11-28 | 2017-02-08 | 京セラ株式会社 | Wiring board manufacturing method |
| KR200491846Y1 (en) | 2014-12-10 | 2020-06-17 | 미쓰비시 세이시 가부시키가이샤 | Apparatus for thin filming resist layer |
| TWI675256B (en) * | 2015-03-13 | 2019-10-21 | 日商三菱製紙股份有限公司 | Process for forming solder resist patterns |
| KR20210115188A (en) | 2020-03-12 | 2021-09-27 | 엘지이노텍 주식회사 | Printed circuit board and mehod of manufacturing thereof |
| KR20210131149A (en) * | 2020-04-23 | 2021-11-02 | 엘지이노텍 주식회사 | Printed circuit board and mehod of manufacturing thereof |
| KR20210154454A (en) * | 2020-06-12 | 2021-12-21 | 엘지이노텍 주식회사 | Printed circuit board and mehod of manufacturing thereof |
| KR20210154450A (en) * | 2020-06-12 | 2021-12-21 | 엘지이노텍 주식회사 | Printed circuit board and mehod of manufacturing thereof |
| US11551939B2 (en) | 2020-09-02 | 2023-01-10 | Qualcomm Incorporated | Substrate comprising interconnects embedded in a solder resist layer |
| WO2022231015A1 (en) * | 2021-04-26 | 2022-11-03 | 엘지이노텍 주식회사 | Circuit board |
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| CN103109588A (en) * | 2010-09-28 | 2013-05-15 | 三菱制纸株式会社 | Method for forming solder resist pattern |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107969076B (en) | 2020-04-28 |
| CN105210460B (en) | 2019-01-11 |
| CN107969077A (en) | 2018-04-27 |
| JP2015216332A (en) | 2015-12-03 |
| JP2017183744A (en) | 2017-10-05 |
| JP6416323B2 (en) | 2018-10-31 |
| CN107979919B (en) | 2020-07-10 |
| CN107979919A (en) | 2018-05-01 |
| CN107969077B (en) | 2020-02-18 |
| JP6514807B2 (en) | 2019-05-15 |
| WO2014188945A1 (en) | 2014-11-27 |
| KR20160013007A (en) | 2016-02-03 |
| TWI625996B (en) | 2018-06-01 |
| TW201509256A (en) | 2015-03-01 |
| CN107969076A (en) | 2018-04-27 |
| JP2018139318A (en) | 2018-09-06 |
| KR102076479B1 (en) | 2020-02-12 |
| JP6224520B2 (en) | 2017-11-01 |
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