CN105101685A - Fabrication method of multi-layer printed circuit board (PCB) and multi-layer PCB - Google Patents
Fabrication method of multi-layer printed circuit board (PCB) and multi-layer PCB Download PDFInfo
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- CN105101685A CN105101685A CN201510557834.7A CN201510557834A CN105101685A CN 105101685 A CN105101685 A CN 105101685A CN 201510557834 A CN201510557834 A CN 201510557834A CN 105101685 A CN105101685 A CN 105101685A
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- pad
- pcb
- predeterminable area
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- jack element
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09454—Inner lands, i.e. lands around via or plated through-hole in internal layer of multilayer PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Details Of Connecting Devices For Male And Female Coupling (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses a fabrication method of a multi-layer printed circuit board (PCB) and the multi-layer PCB. The method comprises the following steps of: respectively etching a first bonding pad and a second bonding pad on a first preset region on the PCB at the top layer and a second preset region, corresponding to the first preset region, on the PCB at the bottom layer for welding jack component pins or welding the jack component pins and connecting signal wiring at the layer where the first bonding and the second bonding pad are located; etching a third bonding pad for connecting signal wiring of a conversion layer on a third preset region which is in correspondence to the first preset region and is on the conversion layer required for wiring on the PCB at the inner layer; etching the conversion layer which is not required for wiring on the PCB at the inner layer and a metal foil in a fourth preset region corresponding to the first preset region; and aligning the PCBs of all layers and laminating, drilling in the first preset region, the second preset region, the third preset region and the fourth preset region to form metallic through holes for installing a jack component in an inserted way. By the method, the problem of difficulty in achieving the design of a high-density interconnected PCB is solved, the fabrication of the high-density interconnected PCB is promoted, and the fabrication cost is reduced.
Description
Technical field
The present invention relates to the manufacturing technology of multi-layer PCB, particularly relate to a kind of manufacture method and multi-layer PCB of multi-layer PCB.
Background technology
Along with developing rapidly of smart electronics product, and the fast-developing trend of lightening high density structures layout designs, printed circuit board (PrintedCircuitBoard, the PCB) design in product is also progressively to the future development of high density interconnect.The PCB layout design of high density interconnect, particularly multi-layer PCB design, needs to make full use of each corner effective area on PCB, to meet the demand of multi-layer PCB trend high density designs.
At present, the PCB of jack element is when making, the pad size of top layer, internal layer, bottom is all the same, like this when carrying out multi-layer PCB design, when the pad of internal layer can take and the space of PCB, particularly PCB have a lot of jack element, internal layer pad will take a lot of PCB surface and amass, this is unfavorable for carrying out highdensity PCB layout design, is difficult to realize or need higher cost could realize the PCB design of high density interconnect.
Summary of the invention
The object of the invention is the manufacture method and the multi-layer PCB that propose a kind of multi-layer PCB, to solve the problem of the high density interconnect PCB design being difficult to realize jack element, increase wiring area, be convenient to the high density interconnect PCB making jack element, reduce cost of manufacture.
For achieving the above object, the present invention adopts following technical scheme:
On the one hand, embodiments provide the manufacture method of a kind of multilayer printed circuit board PCB, comprising:
On the second predeterminable area corresponding with described first predeterminable area position on the first predeterminable area on top layer PCB and on bottom PCB, etch the first pad and the second pad respectively, described first pad and the second pad are for welding the pin of jack element, or for the pin that welds jack element and the signal lead connecting the first pad and the second pad place layer, around described first pad and the second pad, form the first clearance for insulation and the second clearance for insulation respectively;
Internal layer PCB need cabling to change layer and on the 3rd predeterminable area corresponding with described first predeterminable area position, etches the 3rd pad for connecting this layer signal cabling, around described 3rd pad, forming the 3rd clearance for insulation;
Etching away on internal layer PCB does not need cabling to change layer and the metal forming of four predeterminable area corresponding with described first predeterminable area position, forms insulating regions;
Carry out pressing by after each layer PCB contraposition, in described first predeterminable area, the second predeterminable area, the 3rd predeterminable area and the 4th predeterminable area internal drilling, form the plated-through hole being used for jack element described in plug-in mounting.
On the other hand, embodiments provide a kind of multilayer printed circuit board PCB, comprise top layer PCB, internal layer PCB and bottom PCB;
The second predeterminable area corresponding with described first predeterminable area position on the first predeterminable area on top layer PCB and bottom PCB, be etched with the first pad and the second pad respectively, described first pad and the second pad are for welding the pin of jack element, or for the pin that welds jack element and the signal lead connecting the first pad and the second pad place layer, around described first pad and the second pad, be formed with the first clearance for insulation and the second clearance for insulation respectively;
Be positioned on internal layer PCB, need cabling to change layer and three predeterminable area corresponding with described first predeterminable area position, being etched with the 3rd pad for connecting this layer signal cabling, around described 3rd pad, being formed with the 3rd clearance for insulation;
Be positioned on internal layer PCB, do not need cabling to change layer and four predeterminable area corresponding with described first predeterminable area position is insulating regions;
Described first predeterminable area, the second predeterminable area, the 3rd predeterminable area and the 4th predeterminable area up/down perforation, form the plated-through hole being used for jack element described in plug-in mounting.
The invention has the beneficial effects as follows: the manufacture method of a kind of multi-layer PCB of the present invention and multi-layer PCB, when making the multi-layer PCB board of jack element, etch the pad of top layer PCB and bottom PCB, for welding the pin of jack element, or for the pin that welds jack element and the signal lead connecting pad place layer, needing cabling to change on the internal layer PCB of layer simultaneously, the position corresponding with above-mentioned pad etches the pad for connecting this layer signal cabling, and do not needing cabling to change on the internal layer PCB of layer, the position corresponding with above-mentioned pad forms insulating regions, add wiring area, be convenient to the high density interconnect PCB making jack element, reduce cost of manufacture.
Accompanying drawing explanation
Exemplary embodiment of the present invention will be described in detail by referring to accompanying drawing below, the person of ordinary skill in the art is more clear that above-mentioned and other feature and advantage of the present invention, in accompanying drawing:
Fig. 1 is the perspective view of four layers of PCB in prior art;
Fig. 2 is the schematic flow sheet of the manufacture method of the multi-layer PCB that the embodiment of the present invention one provides;
Fig. 3 is the perspective view of the multi-layer PCB that the embodiment of the present invention two provides;
Fig. 4 is the perspective view of the multi-layer PCB that the embodiment of the present invention two provides.
Embodiment
Technical scheme of the present invention is further illustrated by embodiment below in conjunction with accompanying drawing.Be understandable that, specific embodiment described herein is only for explaining the present invention, but not limitation of the invention.It also should be noted that, for convenience of description, illustrate only part related to the present invention in accompanying drawing but not entire infrastructure.
Fig. 1 is the perspective view of four layers of PCB in prior art, and these four layers of PCB comprise top layer PCB1, the first internal layer PCB2, the second internal layer PCB3 and bottom PCB4; The second predeterminable area corresponding with the first predeterminable area position on the first predeterminable area on top layer PCB1 and bottom PCB4, be etched with the first pin pad 5 and the second pin pad 6 respectively, first pin pad 5 and the second pin pad 6 are for welding the pin of jack element, or for the pin that welds jack element and connect signal lead 7, the first pin pad 5 of the first pin pad 5 and the second pin pad 6 place layer and the second pin pad 6 surrounding is formed with the first clearance for insulation 8 and the second clearance for insulation 9 respectively; Lay respectively on the first internal layer PCB2 and the second internal layer PCB3, three predeterminable area corresponding with described first predeterminable area position and the 4th predeterminable area, be etched with non-lead pad 10, is formed with the 3rd clearance for insulation 11 around described non-lead pad 10; First predeterminable area, the second predeterminable area, the 3rd predeterminable area and the 4th predeterminable area up/down perforation, form the plated-through hole 12 being used for plug-in mounting jack element.Non-lead pad 10 in above-mentioned four layers of PCB occupies a large amount of PCB spaces, decreases wiring area, is difficult to the high density interconnect PCB design realizing jack element.
For solving the problem, embodiments provide manufacture method and the multi-layer PCB of a kind of multilayer printed circuit board PCB, embodiment is as follows.
Embodiment one
Fig. 2 is the schematic flow sheet of the manufacture method of the multi-layer PCB that the embodiment of the present invention one provides.The method is applicable to the situation of the Multilayer single such as making four layers, six layers and eight layers or two-sided PCB, and as shown in Figure 1, the method comprises:
On step 110, the first predeterminable area on top layer PCB and on the second predeterminable area corresponding with the first predeterminable area position on bottom PCB, etch the first pad and the second pad respectively.
Exemplary, provide polylith to preset the PCB being covered with metal forming of size according to customer demand, by the Graphic transitions of customer requirement on PCB, this graphics package draws together line pattern and land pattern, etches away non-graphic part.Concrete, on the second predeterminable area corresponding with the first predeterminable area position on the first predeterminable area on top layer PCB and on bottom PCB, etch the first pad and the second pad respectively; First pad and the second pad for welding the pin of jack element, or for the pin that welds jack element and the signal lead connecting the first pad and the second pad place layer; In addition, metal forming around first pad and the second pad is etched away, just form the first clearance for insulation and the second clearance for insulation respectively around first pad and the second pad, to prevent the first pad to be connected with line electricity with the second pad, and avoid solder fluxes short circuit circuit.Meanwhile, etch away other non-graphic parts, form circuit-line.
In the present embodiment, as the top layer PCB in multi-layer PCB or bottom PCB no signal cabling, the first corresponding pad or the second pad are for welding the pin of jack element; When top layer PCB or bottom PCB has signal lead, the first corresponding pad or the second pad are for welding the pin of jack element and connecting the signal lead of the first pad or the second pad place layer.
In addition, second predeterminable area corresponding with the first predeterminable area position, represents after multi-layer PCB pressing, and the upright projection of above-mentioned first predeterminable area and the second predeterminable area overlaps.
In the present embodiment, the size and shape of the first pad and the second pad can be determined according to design requirement or technological ability.
Step 120, internal layer PCB needs cabling to change layer and on the 3rd predeterminable area corresponding with the first predeterminable area position, etches the 3rd pad for connecting this layer signal cabling.
According to wiring requirements, be positioned at signal lead on internal layer PCB when needing to change layer, signal lead is drawn near the 3rd predeterminable area corresponding with the first predeterminable area position, 3rd predeterminable area etches the 3rd pad for connecting this layer signal cabling, and above-mentioned signal lead is connected on the 3rd pad; In addition, the metal forming around the 3rd pad is etched away, make to form the 3rd clearance for insulation around the 3rd pad.
Step 130, etch away on internal layer PCB and do not need cabling to change layer and the metal forming of four predeterminable area corresponding with the first predeterminable area position, form insulating regions.
In this operation, on internal layer PCB, when the four predeterminable area undesired signal cabling corresponding with the first predeterminable area position changes layer, the metal forming on the 4th predeterminable area is etched away, form insulating regions.Be different from prior art, the non-lead bond-pad etch of correspondence position in prior art falls by this operation, and clearance for insulation in the prior art around non-lead pad forms metal forming, adds wiring area.
Thus, multi-layer PCB has hundreds and thousands of non-lead pads, etch away all non-lead pads, and the clearance for insulation around each non-lead pad increases some metal formings, namely connect up area, finally can produce high density interconnect PCB.
Step 140, carry out pressing by after each layer PCB contraposition, in the first predeterminable area, the second predeterminable area, the 3rd predeterminable area and the 4th predeterminable area internal drilling, form the plated-through hole being used for plug-in mounting jack element.
Wherein, the internal diameter of through hole is less than the diameter of the first predeterminable area, the second predeterminable area, the 3rd predeterminable area and the 4th predeterminable area.
Exemplary, by pressing after the contraposition of each layer PCB contraposition equipment, by the multi-layer PCB horizontal positioned after pressing, vertical drilling in the first predeterminable area, form the through hole running through each layer PCB, then used hole plating copper machine to through-hole wall copper facing, form the plated-through hole being used for plug-in mounting jack element.The inwall of plated-through hole is electrically connected with the pad of each layer PCB, to make the upper and lower conducting of each layer PCB.
In the present embodiment, when cabling changes layer, each pad internal drilling on PCB, forms plated-through hole.Wherein, the size of plated-through hole can be determined according to design requirement or technological ability.
Wherein, plated-through hole can be circular hole or slotted hole.
In addition, the metal forming in the present embodiment can be Copper Foil or aluminium foil.
The manufacture method of a kind of multi-layer PCB that the embodiment of the present invention one provides, when making the multi-layer PCB board of jack element, etch the pad of top layer PCB and bottom PCB, for welding the pin of jack element, or for the pin that welds jack element and the signal lead connecting pad place layer, needing cabling to change on the internal layer PCB of layer simultaneously, the position corresponding with above-mentioned pad etches the pad for connecting this layer signal cabling, and do not needing cabling to change on the internal layer PCB of layer, the position corresponding with above-mentioned pad forms insulating regions, add wiring area, be convenient to the high density interconnect PCB making jack element, reduce cost of manufacture.
Embodiment two
Fig. 3 is the perspective view of the multi-layer PCB that the embodiment of the present invention two provides.The present embodiment is described for four layers of PCB, and as shown in Figure 3, this multi-layer PCB comprises top layer PCB20, internal layer PCB22 and bottom PCB21;
Wherein, the second predeterminable area corresponding with the first predeterminable area position on the first predeterminable area on top layer PCB20 and bottom PCB21, be etched with the first pad 23 and the second pad 24 respectively, first pad 23 and the second pad 24 are for welding the pin of jack element, or for the pin that welds jack element and connect signal lead 25, first pad 23 of the first pad 23 and the second pad 24 place layer and the second pad 24 surrounding is formed with the first clearance for insulation 26 and the second clearance for insulation 27 respectively;
Be positioned at internal layer PCB22, namely on the second internal layer PCB222, need cabling to change layer and three predeterminable area corresponding with the first predeterminable area position, be etched with around the 3rd pad the 28, three pad 28 for connecting this layer signal cabling and be formed with the 3rd clearance for insulation 29;
Be positioned at internal layer PCB22, namely on the first internal layer PCB221, do not need cabling to change layer and four predeterminable area corresponding with the first predeterminable area position is insulating regions 30;
Above-mentioned first predeterminable area, the second predeterminable area, the 3rd predeterminable area and the 4th predeterminable area up/down perforation, form the plated-through hole 31 being used for plug-in mounting jack element.
Further, in such scheme, plated-through hole 31 can be circular hole or slotted hole.See Fig. 3, plated-through hole 31 is slotted hole, and see Fig. 4, plated-through hole is circular hole, and being applicable to pin cross section is respectively Long Circle and circular jack element.
In addition, as shown in Figure 4, when needing the signal lead 25 of changing layer to be all distributed on top layer PCB20 and bottom PCB21, the 4th predeterminable area of the first internal layer PCB221 and the 4th predeterminable area of the second internal layer PCB222 are insulating regions 30.
The embodiment of the present invention two is constructive embodiment, and the inventive method embodiment and constructive embodiment belong to same design, the detail content of not detailed description in constructive embodiment, with reference to said method embodiment, can repeat no more herein.
It should be noted that, multi-layer PCB structure of the present invention is not limited to four layers of PCB, is applicable to the multi-layer PCBs such as six layers, eight layers and ten layers simultaneously.
The multi-layer PCB that the embodiment of the present invention two provides, top layer PCB and bottom PCB is etched with pad, for welding the pin of jack element, or for the pin that welds jack element and the signal lead connecting pad place layer, needing cabling to change on the internal layer PCB of layer simultaneously, the position corresponding with above-mentioned pad etches the pad for connecting this layer signal cabling, and do not needing cabling to change on the internal layer PCB of layer, the position corresponding with above-mentioned pad forms insulating regions, add wiring area, be convenient to the high density interconnect PCB making jack element, reduce cost of manufacture.
Note, above are only preferred embodiment of the present invention and institute's application technology principle.Skilled person in the art will appreciate that and the invention is not restricted to specific embodiment described here, various obvious change can be carried out for a person skilled in the art, readjust and substitute and can not protection scope of the present invention be departed from.Therefore, although be described in further detail invention has been by above embodiment, the present invention is not limited only to above embodiment, when not departing from the present invention's design, can also comprise other Equivalent embodiments more, and scope of the present invention is determined by appended right.
Claims (5)
1. a manufacture method of multilayer printed circuit board PCB, is characterized in that, comprising:
On the second predeterminable area corresponding with described first predeterminable area position on the first predeterminable area on top layer PCB and on bottom PCB, etch the first pad and the second pad respectively, described first pad and the second pad are for welding the pin of jack element, or for the pin that welds jack element and the signal lead connecting the first pad and the second pad place layer, around described first pad and the second pad, form the first clearance for insulation and the second clearance for insulation respectively;
Internal layer PCB need cabling to change layer and on the 3rd predeterminable area corresponding with described first predeterminable area position, etches the 3rd pad for connecting this layer signal cabling, around described 3rd pad, forming the 3rd clearance for insulation;
Etching away on internal layer PCB does not need cabling to change layer and the metal forming of four predeterminable area corresponding with described first predeterminable area position, forms insulating regions;
Carry out pressing by after each layer PCB contraposition, in described first predeterminable area, the second predeterminable area, the 3rd predeterminable area and the 4th predeterminable area internal drilling, form the plated-through hole being used for jack element described in plug-in mounting.
2. method according to claim 1, is characterized in that, described metal forming is Copper Foil or aluminium foil.
3. method according to claim 1 and 2, is characterized in that, described plated-through hole is circular hole or slotted hole.
4. a multilayer printed circuit board PCB, is characterized in that, comprises top layer PCB, internal layer PCB and bottom PCB;
The second predeterminable area corresponding with described first predeterminable area position on the first predeterminable area on top layer PCB and bottom PCB, be etched with the first pad and the second pad respectively, described first pad and the second pad are for welding the pin of jack element, or for the pin that welds jack element and the signal lead connecting the first pad and the second pad place layer, around described first pad and the second pad, be formed with the first clearance for insulation and the second clearance for insulation respectively;
Be positioned on internal layer PCB, need cabling to change layer and three predeterminable area corresponding with described first predeterminable area position, being etched with the 3rd pad for connecting this layer signal cabling, around described 3rd pad, being formed with the 3rd clearance for insulation;
Be positioned on internal layer PCB, do not need cabling to change layer and four predeterminable area corresponding with described first predeterminable area position is insulating regions;
Described first predeterminable area, the second predeterminable area, the 3rd predeterminable area and the 4th predeterminable area up/down perforation, form the plated-through hole being used for jack element described in plug-in mounting.
5. multi-layer PCB according to claim 4, is characterized in that, described plated-through hole is circular hole or slotted hole.
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CN201510557834.7A CN105101685B (en) | 2015-09-02 | 2015-09-02 | The preparation method and multi-layer PCB of a kind of multi-layer PCB |
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Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105682379A (en) * | 2016-01-25 | 2016-06-15 | 东莞联桥电子有限公司 | Process for rapidly fabricating multi-layer circuit board |
CN105704918A (en) * | 2016-02-01 | 2016-06-22 | 浪潮(北京)电子信息产业有限公司 | High density printed circuit board |
CN105898982A (en) * | 2016-06-30 | 2016-08-24 | 广东顺德施瑞科技有限公司 | High-voltage flexible circuit board and multi-layer flexible circuit board |
CN107041084A (en) * | 2017-06-06 | 2017-08-11 | 苏州胜科设备技术有限公司 | A kind of preparation method of wiring board |
CN113068306A (en) * | 2021-04-26 | 2021-07-02 | Tcl通讯(宁波)有限公司 | PCB and PCB mounting method |
CN113709963A (en) * | 2021-07-23 | 2021-11-26 | 苏州浪潮智能科技有限公司 | PCB and manufacturing method and equipment thereof |
CN113891576A (en) * | 2021-09-30 | 2022-01-04 | 苏州浪潮智能科技有限公司 | Layer-changing through hole circuit comprising multilayer PCB, manufacturing method and equipment |
CN115361777A (en) * | 2022-08-19 | 2022-11-18 | 芯和半导体科技(上海)有限公司 | Mesh method for reconnecting through holes without non-functional bonding pads |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6646886B1 (en) * | 2002-04-12 | 2003-11-11 | Cisco Technology, Inc. | Power connection structure |
WO2006019596A2 (en) * | 2004-07-30 | 2006-02-23 | Bae System Information And Electronic System Integration Inc. | High frequency via |
US7045719B1 (en) * | 2002-05-14 | 2006-05-16 | Ncr Corp. | Enhancing signal path characteristics in a circuit board |
US20090015345A1 (en) * | 2006-03-03 | 2009-01-15 | Nec Corporation | Broadband transition from a via interconnection to a planar transmission line in a multilayer substrate |
US7897880B1 (en) * | 2007-12-07 | 2011-03-01 | Force 10 Networks, Inc | Inductance-tuned circuit board via crosstalk structures |
CN102811549A (en) * | 2011-06-03 | 2012-12-05 | 鸿富锦精密工业(深圳)有限公司 | Circuit board |
-
2015
- 2015-09-02 CN CN201510557834.7A patent/CN105101685B/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6646886B1 (en) * | 2002-04-12 | 2003-11-11 | Cisco Technology, Inc. | Power connection structure |
US7045719B1 (en) * | 2002-05-14 | 2006-05-16 | Ncr Corp. | Enhancing signal path characteristics in a circuit board |
WO2006019596A2 (en) * | 2004-07-30 | 2006-02-23 | Bae System Information And Electronic System Integration Inc. | High frequency via |
US20090015345A1 (en) * | 2006-03-03 | 2009-01-15 | Nec Corporation | Broadband transition from a via interconnection to a planar transmission line in a multilayer substrate |
US7897880B1 (en) * | 2007-12-07 | 2011-03-01 | Force 10 Networks, Inc | Inductance-tuned circuit board via crosstalk structures |
CN102811549A (en) * | 2011-06-03 | 2012-12-05 | 鸿富锦精密工业(深圳)有限公司 | Circuit board |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105682379A (en) * | 2016-01-25 | 2016-06-15 | 东莞联桥电子有限公司 | Process for rapidly fabricating multi-layer circuit board |
CN105704918A (en) * | 2016-02-01 | 2016-06-22 | 浪潮(北京)电子信息产业有限公司 | High density printed circuit board |
CN105704918B (en) * | 2016-02-01 | 2018-09-07 | 浪潮(北京)电子信息产业有限公司 | A kind of high-density printed circuit board |
CN105898982A (en) * | 2016-06-30 | 2016-08-24 | 广东顺德施瑞科技有限公司 | High-voltage flexible circuit board and multi-layer flexible circuit board |
CN105898982B (en) * | 2016-06-30 | 2019-01-18 | 广东顺德施瑞科技有限公司 | A kind of high-voltage flexible wiring board and multi-layer flexible circuit board |
CN107041084A (en) * | 2017-06-06 | 2017-08-11 | 苏州胜科设备技术有限公司 | A kind of preparation method of wiring board |
CN113068306A (en) * | 2021-04-26 | 2021-07-02 | Tcl通讯(宁波)有限公司 | PCB and PCB mounting method |
CN113709963A (en) * | 2021-07-23 | 2021-11-26 | 苏州浪潮智能科技有限公司 | PCB and manufacturing method and equipment thereof |
CN113709963B (en) * | 2021-07-23 | 2023-02-28 | 苏州浪潮智能科技有限公司 | PCB and manufacturing method and equipment thereof |
CN113891576A (en) * | 2021-09-30 | 2022-01-04 | 苏州浪潮智能科技有限公司 | Layer-changing through hole circuit comprising multilayer PCB, manufacturing method and equipment |
CN113891576B (en) * | 2021-09-30 | 2023-07-14 | 苏州浪潮智能科技有限公司 | Layer-changing through hole circuit comprising multilayer PCB, manufacturing method and equipment |
CN115361777A (en) * | 2022-08-19 | 2022-11-18 | 芯和半导体科技(上海)有限公司 | Mesh method for reconnecting through holes without non-functional bonding pads |
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