CN104809987B - Display panel and pixel circuit thereof - Google Patents
Display panel and pixel circuit thereof Download PDFInfo
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- CN104809987B CN104809987B CN201510252870.2A CN201510252870A CN104809987B CN 104809987 B CN104809987 B CN 104809987B CN 201510252870 A CN201510252870 A CN 201510252870A CN 104809987 B CN104809987 B CN 104809987B
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Abstract
The invention discloses a pixel circuit which comprises a light-emitting unit, a capacitor, a first transistor, a second transistor, a third transistor and a fourth transistor. The capacitor includes a first terminal and a second terminal. The first transistor, the second transistor, the third transistor and the fourth transistor all comprise a first end, a second end and a control end. The first end of the first transistor is electrically coupled to the first end of the capacitor. The second end of the first transistor is electrically coupled to the second end of the capacitor. The control end of the second transistor is electrically coupled to the second end of the capacitor. The first end of the third transistor is electrically coupled to the second end of the capacitor. The second terminal of the third transistor is electrically coupled to the second terminal of the second transistor. The second end of the fourth transistor is electrically coupled to the first end of the capacitor. The invention also discloses a display panel comprising the pixel circuit, which can avoid the influence of the variation of the threshold voltage on the display panel and ensure that the brightness of the display panel is uniform.
Description
Technical field
The present invention relates to display technology field, more particularly to a kind of display panel and its image element circuit.
Background technology
It is the light emitting diode in effective control pixel, it will usually configure an image element circuit in display panel, however,
Problems, such as transistor variation, voltage drop (IR drop), light-emitting diodes can be faced using the display panel of image element circuit
Pipe aging etc., above mentioned problem will cause display panel brightness disproportionation so that the image quality of display panel declines.In addition, with
The lifting of size of display panels, the situation of voltage drop more becomes serious.
Though compensation circuit can be configured in image element circuit to improve the disadvantages caused by above mentioned problem, however, existing
Compensation circuit in reset phase can because of circuit configuration and electrical operational issue, and cause pixel by mistake luminous (in default luminous
Time beyond period is luminous referred to as by mistake luminous), influence the perception of user.
As can be seen here, above-mentioned existing mode, it is clear that still suffer from inconvenience and defect, and have much room for improvement.
The content of the invention
The content of the invention aims to provide simplifying for present disclosure and made a summary, so that reader possesses basic to present disclosure
Understand.The complete overview of this content of the invention not present disclosure, and its be not intended to point out the embodiment of the present invention it is important/
Key element defines the scope of the present invention.
One purpose of present invention is to provide a kind of display panel and its image element circuit, so as to improving prior art
Problem.
One technical approach of present invention is on a kind of image element circuit, and it includes luminescence unit, electric capacity, first crystal
Pipe, second transistor, third transistor and the 4th transistor.Electric capacity includes first end and the second end.The first transistor, the second crystalline substance
Body pipe, third transistor and the 4th transistor all include first end, the second end and control end.The first end of the first transistor is electrical
The first end of electric capacity is coupled to, and to receive reset voltage.Second end of the first transistor is electrically coupled to the second of electric capacity
End.The control end of the first transistor is to receive and be passed reset voltage by the first end of the first transistor according to the first signal
Deliver to the second end.The first end of second transistor is electrically coupled to electricity to receive supply voltage, the control end of second transistor
The second end held, and to drive luminescence unit according to the voltage that the second end of electric capacity is stored.The first of third transistor
End is electrically coupled to the second end of electric capacity.Second end of third transistor is electrically coupled to the second end of second transistor.3rd
The control end of transistor is to receive and turn on third transistor according to secondary signal.The first end of 4th transistor is to connect
Data voltage is received, the second end of the 4th transistor is electrically coupled to the first end of electric capacity.The control end of 4th transistor is to connect
Receive and data voltage is sent to by the second end by the first end of the 4th transistor according to one the 3rd signal.
Another technical approach of present invention is on a kind of image element circuit, and it is single comprising luminescence unit, electric capacity, replacement
Member, compensating unit, writing unit and driver element.Electric capacity includes first end and the second end.Reset cell is electrically coupled to electric capacity
First end and the second end between, and to according to the first signal to reset electric capacity, make the first end of electric capacity and the electricity at the second end
Pressure is all reset voltage.Compensating unit is electrically coupled to the second end and the reset cell of electric capacity, and to according to secondary signal with
Second end of electric capacity is compensated, makes the voltage at the second end of electric capacity poor for the first voltage of supply voltage and critical voltage.
Writing unit is electrically coupled to the first end and reset cell of electric capacity, and data voltage is write into electricity according to the 3rd signal
The first end of appearance, and the second voltage difference for coupling reset voltage and data voltage makes the second end of electric capacity to the second end of electric capacity
Voltage for first voltage difference with second voltage difference voltage and.Driver element is electrically coupled to the second end and the compensation list of electric capacity
Member, and to the voltage that is stored according to electric capacity and and drive luminescence unit.
Above-described embodiment produces in each component parameters by providing a kind of image element circuit and becomes the different time, can be critical so as to eliminating
Voltage, it is to avoid the variation influence display panel of critical voltage, makes display panel brightness uniformity, and maintains the image product of display panel
Matter.In addition, the display panel and image element circuit of the embodiment of the present invention can improve compensation circuit when reset phase, because of circuit configuration
And electrical operational issue, and cause pixel by mistake luminous, the problem of influenceing the perception of user.
Another technical approach of present invention is on a kind of display panel, and it includes pel array, includes multiple pixels
Circuit, the first signal wire, secondary signal line and the 3rd signal wire.Above-mentioned image element circuit is arranged as the first row and the second row.First
Signal wire is electrically coupled to multiple image element circuits positioned at the first row, and to the 3rd of multiple image element circuits for providing the first row the
Signal.Secondary signal line is electrically coupled to multiple image element circuits positioned at the second row, and to provide multiple pixels of the second row
3rd signal of circuit, wherein the 3rd signal of multiple image element circuits of the second row is relative to multiple image element circuits of the first row
3rd signal has a phase delay.3rd signal wire be electrically coupled to the first row multiple image element circuits and the second row it is multiple
Image element circuit, and to the secondary signal and the first of multiple image element circuits of the second row for the multiple image element circuits for providing the first row
Signal.
Above-described embodiment provides a kind of display panel so that the partial circuit (such as reset cell) of the image element circuit of any row
It can be controlled by the first signal of its upper level, such as scanner driver provides the first signal to the second row by the 3rd signal wire
Image element circuit partial circuit (such as reset cell), therefore, independently go out a signal and come to the partial circuit of image element circuit (such as
Reset cell) it is controlled not necessarily, to reduce the output signal of scanner driver, and then save cost.
After refering to following description, the technical staff in the technical field of the invention, which works as, can will readily appreciate that the present invention's
Essence spirit and other goals of the invention, and the technology used in the present invention means and embodiment.
Brief description of the drawings
For above and other purpose, feature, advantage and the embodiment of the present invention can be become apparent, Figure of description
It is described as follows：
Fig. 1 is to illustrate a kind of schematic diagram of image element circuit according to one embodiment of the invention.
Fig. 2A is to illustrate a kind of signal waveform schematic diagram according to another embodiment of the present invention.
Fig. 2 B are to illustrate a kind of signal waveform schematic diagram according to further embodiment of this invention.
Fig. 3 is to illustrate a kind of detailed circuit schematic of image element circuit as shown in Figure 1 according to yet another embodiment of the invention.
Fig. 4 A are to illustrate a kind of operation chart of image element circuit as shown in Figure 3 according to further embodiment of this invention.
Fig. 4 B are to illustrate a kind of operation chart of image element circuit as shown in Figure 3 according to another embodiment of the present invention.
Fig. 4 C are to illustrate a kind of operation chart of image element circuit as shown in Figure 3 according to yet another embodiment of the invention.
Fig. 4 D are to illustrate a kind of operation chart of image element circuit as shown in Figure 3 according to further embodiment of this invention.
Fig. 5 is to illustrate a kind of schematic diagram of image element circuit according to another embodiment of the present invention.
Fig. 6 is to illustrate a kind of signal waveform schematic diagram according to further embodiment of this invention.
Fig. 7 is to illustrate a kind of detailed circuit schematic of image element circuit as shown in Figure 5 according to yet another embodiment of the invention.
Fig. 8 A are to illustrate a kind of schematic diagram of display panel according to another embodiment of the present invention.
Fig. 8 B are to illustrate a kind of schematic diagram of display panel according to further embodiment of this invention.
Fig. 9 is a kind of signal for the image element circuit that display panel as shown in Figure 8 A is illustrated according to yet another embodiment of the invention
Figure.
Figure 10 A are to illustrate a kind of signal waveform schematic diagram according to further embodiment of this invention.
Figure 10 B are to illustrate a kind of signal waveform schematic diagram according to another embodiment of the present invention.
According to usual operating type, various features are not drawn to scale with element in figure, its drafting mode be in order to
Specific features and element related to the present invention are presented in optimal manner.In addition, between different accompanying drawings, with same or analogous
Component symbol censures similar elements/components.
Description of reference numerals：
110：Reset cell L11~L14, L21~L24, L31~L34：
120：Compensating unit signal wire
130：Writing unit OVDD, OVSS：Supply voltage
140：Driver element P11~P13, P21~P23, P31~P33：
150：Switch element image element circuit
800A：Display panel PRset：First period
800B：Display panel Pcomp：Second period
810：Scanner driver PDate：3rd period
820：Data driver PEM：4th period
900：Luminescence unit PWait：Waiting period
A、D、G、S：End points S1~S4：Signal
C：Electric capacity T1~T5：Transistor
Data：Data voltage Vth：Critical voltage
Vsus：Reset voltage
Embodiment
In order that the narration of present disclosure it is more detailed with it is complete, below for embodiments of the present invention with it is specific
Embodiment proposes illustrative description；But this is not implemented or with the unique forms of the specific embodiment of the invention.Embodiment party
Covered in formula multiple specific embodiments feature and to construction with operate these specific embodiments method and step and its
Sequentially.However, can also realize identical or impartial function and sequence of steps using other specific embodiments.
Unless this specification is defined otherwise, the implication of science and technology vocabulary used herein is led with technology belonging to the present invention
Technical staff understands identical with usual meaning in domain.In addition, on " coupling " used herein, two or multiple can be referred to
Element mutually directly makees entity or in electrical contact, or mutually puts into effect body or in electrical contact indirectly, is also referred to as two or multiple element
Mutual operation or action.
Cause pixel by mistake luminous (in default light emission period in reset phase for the image element circuit of the existing display panel of improvement
Between beyond time it is luminous be referred to as it is by mistake luminous) the problem of, the present invention proposes a kind of display panel and its image element circuit, illustrates such as
Afterwards.
Fig. 1 is to illustrate a kind of schematic diagram of image element circuit according to one embodiment of the invention.As illustrated, image element circuit is included
Luminescence unit 900, electric capacity C, reset cell 110, compensating unit 120, writing unit 130 and driver element 140.In addition, electric capacity C
Include first end A and the second end G.
In in structure, reset cell 110 is electrically coupled between electric capacity C first end A and the second end G.Compensating unit 120
It is electrically coupled to electric capacity C the second end G and reset cell 110.Writing unit 130 is electrically coupled to electric capacity C first end A and again
Put unit 110.Driver element 140 is electrically coupled to electric capacity C the second end G and compensating unit 120.
It is according to another implementation of the present invention also referring to Fig. 1 and Fig. 2A, Fig. 2A for the mode of operation of pixels illustrated circuit
Example illustrates a kind of signal waveform schematic diagram.In in operation, reset cell 110 is used to according to the first signal S1 to reset electric capacity C, makes
Electric capacity C first end A and the second end G voltage are all reset voltage Vsus.Compensating unit 120 be used to according to secondary signal S2 with
Electric capacity C the second end G is compensated, the voltage for making electric capacity C the second end G is supply voltage OVDD and critical voltage Vth's
First voltage is poor (OVDD-Vth).Writing unit 130 is used to according to the 3rd signal S3 data voltage Data writing electric capacity C's
First end A, and reset voltage Vsus and data voltage Data second voltage poor (Data-Vsus) is coupled to the second of electric capacity C
G is held, the voltage for making electric capacity C the second end G is the voltage of first voltage poor (OVDD-Vth) and second voltage poor (Data-Vsus)
(Data-Vsus)+(OVDD-Vth).Driver element 140 is used to according to the electric capacity C above-mentioned voltages stored and (Data-
Vsus)+(OVDD-Vth) and drive luminescence unit 900.
In the present embodiment, if realizing driver element 140 with transistor, the current formula of driver element 140 is as follows
It is shown：
IOLED=K (VSG-Vth)2……(1)
Shown in the result operated as described above, the V of driver element 140SGEqual to OVDD- [(Data-Vsus)+(OVDD-
Vth)], V is obtained after arrangementSGEqual to (Vsus-Data+Vth), by the V of driver element 140SGBring formula (1) into, and obtain with
Lower formula：
IOLED=K (Vsus-Data)2……(2)
As shown in above-mentioned formula (2), produced in each component parameters and become the different time, the image element circuit of the embodiment of the present invention can be eliminated
Critical voltage Vth, it is to avoid critical voltage Vth variation influence display panel, and eliminate supply voltage OVDD to avoid voltage
(IR drop) influence display panel drops, so that display panel brightness uniformity, and maintain the image quality of display panel.
In another embodiment, image element circuit also includes switch element 150, and it is electrically coupled to the of driver element 140
Between the anode tap of two end D and luminescence unit 900, and it is used to according to the 4th signal S4 with or off switch element 150.It please join
Fig. 2A is read, in the first period PRsetWhen, the 4th signal S4 is high level signal, and switch element 150 receives the 4th letter of high level
Number S4 and turn off, therefore, image element circuit is in the first period PRset(such as：Reset phase) the derivative possibility for missing lighting conditions of reduction,
To lift the perception of user.
In another embodiment, also referring to Fig. 1 and Fig. 2A.Reset cell 110 is used to according to the low level first letter
Number S1 is in the first period PRsetReset electric capacity C.Then, compensating unit 120 is used to according to low level secondary signal S2 in second
Period PcompElectric capacity C is compensated.Then, writing unit 130 was used to according to low level 3rd signal S3 in the 3rd period
PDateBy data voltage Data write-in electric capacity C.Then, switch element 150 according to low level 4th signal S4 in the 4th period
PEMTurn on switch element 150.
In one embodiment, Fig. 2A is referred to, above-mentioned first signal S1 can be reset signal Reset, and secondary signal S2 can
For thermal compensation signal Comp, the 3rd signal S3 can be scanning signal Scan, and the 4th signal S4 can be enable signal EM.So it is not used
To limit one of the present invention, the implementation only illustratively to illustrate the present invention.In addition, Fig. 2 B are another according to the present invention
Embodiment illustrates a kind of signal waveform schematic diagram.Specifically, Fig. 2 B are to show the signal wave while when providing two row pixels
Shape schematic diagram, the waveform of two row pixels is indicated in the way of (N) and (N-1) respectively, as illustrated, reset signal Reset (N-1)
About differed between~Reset (N) and about differ two periods between two periods (phase), thermal compensation signal Comp (N-1)~Comp (N),
About differed two periods between scanning signal Scan (N-1)~Scan (N), and also rough phase between luminous signal EM (N-1)~EM (N)
Poor two periods.
When the present invention is realized, reset cell 110, compensating unit 120, writing unit 130 and driver element 140 all can be by
Transistor carrys out implementation, and such as using P-type transistor come implementation, its detailed circuit refers to Fig. 3.As illustrated, image element circuit is included
Luminescence unit 900, electric capacity C, the first transistor T1, second transistor T2, third transistor T3 and the 4th transistor T4.Further
For, electric capacity C includes first end A and the second end G.The first transistor T1, second transistor T2, third transistor T3 and the 4th are brilliant
Body pipe T4 all includes first end, the second end and control end.
In in structure, the first transistor T1 first end is electrically coupled to electric capacity C first end A.The first transistor T1's
Second end is electrically coupled to electric capacity C the second end G.Second transistor T2 control end is electrically coupled to electric capacity C the second end G.
Third transistor T3 first end is electrically coupled to electric capacity C the second end G.Third transistor T3 the second end is electrically coupled to
Two-transistor T2 the second end.4th transistor T4 the second end is electrically coupled to electric capacity C first end A.
The basic operation of image element circuit shown in Fig. 3 is as after.The first transistor T1 first end is to receive the 4th crystal
The reset voltage Vsus that pipe T4 is provided.The first transistor T1 control end to receive and be turned on according to the first signal S1,
So that reset voltage Vsus is sent into the second end by the first transistor T1 first end, and it is stored in electric capacity C the second end G.The
Two-transistor T2 first end is to receive supply voltage OVDD.Second transistor T2 control end is used to the according to electric capacity C
Voltage that two end G are stored and drive luminescence unit 900, and then control the brightness of luminescence unit 900.Third transistor T3 control
End processed is to receive and be turned on according to secondary signal S2.4th transistor T4 first end is to receive data voltage Data.
4th transistor T4 control end to receive and according to the 3rd signal S3 to turn on by data voltage Data by the 4th crystal
Pipe T4 first end is sent to the second end, and is stored in electric capacity C first end A.
In another embodiment, image element circuit also includes the 5th transistor T5, and it includes first end, the second end and control
End.5th transistor T5 first end is electrically coupled to second transistor T2 the second end D.5th transistor T5 the second end electricity
Property is coupled to the anode tap of luminescence unit 900.5th transistor T5 control end is to receive and be led according to the 4th signal S4
Logical or the 5th transistor T5 of shut-off.The 5th transistor T5 switch element 150 being functionally similar to shown in Fig. 1, refers to Fig. 2A,
In the first period PRsetWhen, the 4th signal S4 be high level signal, the 5th transistor T5 receive high level the 4th signal S4 and
Shut-off, therefore, image element circuit is in the first period PRset(such as：Reset phase) by mistake luminous situation will not be derived, used with being lifted
The perception of person.
The detailed operation of image element circuit shown in Fig. 3, will be sequentially with Fig. 4 A to Fig. 4 D explanations as after.Fig. 4 A are according to this hair
Bright another embodiment illustrates a kind of operation chart of image element circuit as shown in Figure 3.Also referring to Fig. 2A and Fig. 4 A, in
One period PRset, the first signal S1 and the 3rd signal S3 are low level signal, and data wire provides reset voltage Vsus, the 4th crystal
Pipe T4 is opened according to low level 3rd signal S3, and reset voltage Vsus is sent to by the 4th transistor T4 first end
Second end.Meanwhile, the first transistor T1 is opened according to low level first signal S1, and reset voltage Vsus is brilliant by first
Body pipe T1 first end is sent to the second end.Now, electric capacity C first end A and the second end G voltage are all reset voltage
Vsus。
Fig. 4 B are to illustrate a kind of operation chart of image element circuit as shown in Figure 3 according to another embodiment of the present invention.Please
In the lump refering to Fig. 2A and Fig. 4 B, in the second period Pcomp, secondary signal S2 is low level signal, and third transistor T3 is used to basis
Low level secondary signal S2 is so that second transistor T2 the second end D and electric capacity C the second end G to be turned on, hereafter the of electric capacity C
Two end G current potential can be because supply voltage OVDD charges and towards first voltage poor (OVDD-Vth) change, ideally, can make electric capacity C
The second end G voltage for supply voltage OVDD and second transistor T2 critical voltage Vth the poor (OVDD- of first voltage
Vth)。
Fig. 4 C are to illustrate a kind of operation chart of image element circuit as shown in Figure 3 according to yet another embodiment of the invention.Please
In the lump refering to Fig. 2A and Fig. 4 C, in the 3rd period PData, the 3rd signal S3 is low level signal, and data wire provides data voltage
Data, the 4th transistor T4 are used to data voltage Data according to low level 3rd signal S3 by the first of the 4th transistor T4
End is sent to the second end, and writes electric capacity C first end A, and couples reset voltage Vsus and data voltage Data the second electricity
Pressure difference (Data-Vsus) makes electric capacity C the second end G voltage poor (OVDD-Vth) for first voltage to electric capacity C the second end G
With the voltage and (Data-Vsus)+(OVDD-Vth) of second voltage poor (Data-Vsus).
Fig. 4 D are to illustrate a kind of operation chart of image element circuit as shown in Figure 3 according to further embodiment of this invention.Please
In the lump refering to Fig. 2A and Fig. 4 D, in the 4th period PEM, the 4th signal S4 is low level signal, and the 5th transistor T5 is used to according to low
4th signal S4 of level turns on the 5th transistor T5.Then, second transistor T2 be used to the voltage stored according to electric capacity C and
(Data-Vsus)+(OVDD-Vth) and drive luminescence unit 900.Shown in the result operated as described above, second transistor T2 VSG
Equal to (Vsus-Data+Vth), by second transistor T2 VSGAbove-mentioned formula (2) can be obtained by bringing formula (1) into, it follows that this
The image element circuit of inventive embodiments can eliminate critical voltage Vth, it is to avoid critical voltage Vth variation influence display panel, so that
Display panel brightness uniformity, and maintain the image quality of display panel.
Fig. 5 is to illustrate a kind of schematic diagram of image element circuit according to another embodiment of the present invention.Compared to the pixel shown in Fig. 1
Circuit, the coupling mode of the driver element 140 of the image element circuit shown in Fig. 5, switch element 150 and luminescence unit 900 is different, says
It is bright as after.Driver element 140 shown in Fig. 1 is electrically coupled to electric capacity C the second end G and compensating unit 120, and to receive electricity
Source voltage OVDD.The cathode terminal of luminescence unit 900 is electrically coupled to supply voltage OVSS, and switch element 150 is electrically coupled to drive
Between the anode tap of moving cell 140 and luminescence unit 900.Driver element 140 shown in Fig. 5 is electrically coupled to the second of electric capacity C
G and compensating unit 120 are held, and to receive supply voltage OVSS.The anode tap of luminescence unit 900 is electrically coupled to supply voltage
OVDD, switch element 150 is electrically coupled between the cathode terminal of driver element 140 and luminescence unit 900.
To illustrate the mode of operation of the image element circuit shown in Fig. 5, also referring to Fig. 6, it is according to another reality of the invention
Apply example and illustrate a kind of signal waveform schematic diagram.Reset cell 110 is used to the first signal S1 according to high level in the first period
PRsetReset electric capacity C.Then, compensating unit 120 is used to the secondary signal S2 according to high level in the second period PcompTo electric capacity C
Compensate.Then, writing unit 130 according to the 3rd signal S3 of high level in the 3rd period PDateData voltage Data is write
Enter electric capacity C.Then, switch element 150 according to the 4th signal S4 of high level in the 4th period PEMTurn on switch element 150.
When the present invention is realized, reset cell 110, compensating unit 120, writing unit 130 and driver element 140 all can be by
Transistor carrys out implementation, and such as using N-type transistor come implementation, its detailed circuit refers to Fig. 7.Fig. 7 is according to of the invention another real
Apply example and illustrate a kind of detailed circuit schematic of image element circuit as shown in Figure 5.Compared to the image element circuit shown in Fig. 3, Fig. 7 institutes
The configuration of the 5th transistor T5 in the image element circuit shown is different, illustrates as after.The first end of the 5th transistor T5 shown in Fig. 7
The cathode terminal of luminescence unit 900 is electrically coupled to, the 5th transistor T5 the second end is electrically coupled to the of second transistor T2
Two end D, the 5th transistor T5 control end are to receive and according to the 4th signal S4 with the transistor T5 of on or off the 5th.
To illustrate the mode of operation of the image element circuit shown in Fig. 7, also referring to Fig. 6.In the first period PRset, the first letter
Number S1 and the 3rd signal S3 is high level signal, and data wire provides reset voltage Vsus, and the 4th transistor T4 is according to high level
3rd signal S3 and open, and reset voltage Vsus is sent to the second end by the 4th transistor T4 first end.Meanwhile, first
Reset voltage Vsus to be sent to by transistor T1 according to the first signal S1 of high level by the first transistor T1 first end
Second end.
In the second period Pcomp, secondary signal S2 is high level signal, and third transistor T3 is according to the second of high level the letter
Number S2 is so that second transistor T2 the second end D and electric capacity C the second end G to be turned on.In the 3rd period PData, the 3rd signal S3 is
High level signal, it is according to the 3rd signal S3 of high level that data are electric that data wire provides data voltage Data, the 4th transistor T4
Pressure Data is sent to the second end by the 4th transistor T4 first end.In the 4th period PEM, the 4th signal S4 is high level signal,
5th transistor T5 is used to turn on the 5th transistor T5 according to the 4th signal S4 of high level.
Fig. 8 A are to illustrate a kind of schematic diagram of display panel according to another embodiment of the present invention.As illustrated, display panel
800A includes pel array, and this pel array includes multiple image element circuit, signal wire L12~L14 and letters such as previous embodiment
Number line L22~L24.Above-mentioned image element circuit is represented with label P11~P13, P21~P23 respectively, and image element circuit is arranged as first
Row and the second row.Specifically, image element circuit P11~P13 is located at the first row, and image element circuit P21~P23 is located at the second row.
In addition, signal wire L13 is coupled to image element circuit P11~P13 positioned at the first row, scanner driver 810 passes through letter
Number line L13 provides image element circuits of the 3rd signal S3 to the first row.Signal wire L23 is coupled to the image element circuit positioned at the second row
P21~P23, scanner driver 810 provides image element circuits of the 3rd signal S3 to the second row by signal wire L23.It should be noted
It is that scanner driver 810 is supplied to the 3rd signal S3 of the image element circuit of the second row relative to the of the image element circuit of the first row
Three signal S3 have a phase delay.Signal wire L12 is electrically coupled to the image element circuit of the first row and the image element circuit of the second row,
Scanner driver 810 is supplied to secondary signal S2 to the image element circuit of the first row by signal wire L12 and provides the first signal S1
Image element circuit to the second row.Furthermore, data driver 820 to provide data voltage Data to image element circuit P11~P13,
P21~P23.
Fig. 8 B are to illustrate a kind of schematic diagram of display panel according to further embodiment of this invention.As illustrated, display panel
800B includes pel array, and this pel array includes multiple image element circuit, signal wire L11~L14, signals such as previous embodiment
Line L22~L24 and signal wire L31~L34.Above-mentioned image element circuit is respectively with label P11~P13, P21~P23, P31~P33 tables
Show, and image element circuit is arranged as the first row, the second row and the third line.Specifically, image element circuit P11~P13 is located at the first row,
Image element circuit P21~P23 is located at the second row, and image element circuit P31~P33 is located at the third line.
Fig. 9 is a kind of signal for the image element circuit that display panel as shown in Figure 8 A is illustrated according to yet another embodiment of the invention
Figure.To illustrate the mode of operation of the image element circuit shown in Fig. 9, also referring to Figure 10 A, it is according to further embodiment of this invention
Illustrate a kind of signal waveform schematic diagram.Image element circuit P11~P13 of the first row reset cell 110 is used to according to low level
First signal S1 is in the first period PRsetReset electric capacity C.Then, image element circuit P11~P13 of the first row compensating unit 120
To the low level secondary signal S2 that is provided according to signal wire L12 in the second period PcompElectric capacity C is compensated.Then,
Image element circuit P11~P13 of the first row writing unit 130 is used to low level 3rd signal provided according to signal wire L13
S3 is in the 3rd period PDataBy data voltage Data write-in electric capacity C.Then, image element circuit P11~P13 of the first row switch list
The low level 4th signal S4 that member 150 is provided according to signal wire L14 is in the 4th period PEMTurn on switch element 150.In addition, figure
10B is to illustrate a kind of signal waveform schematic diagram according to another embodiment of the present invention.Specifically, Figure 10 B are to show while carrying
Signal waveform schematic diagram during for two row pixels, the waveform of two row pixels is indicated in the way of (N) and (N-1) respectively, such as figure institute
Show, a period (phase), scanning signal Scan (N-1)~Scan are about differed between thermal compensation signal Comp (N-2)~Comp (N)
(N) about differed between two periods, and also two periods of rough difference between luminous signal EM (N-1)~EM (N).
In the present embodiment, the reset cell 110 of the first row can be controlled by the first signal S1 of upper level, without only
Found a signal to control it, to reduce the output signal of scanner driver 810, and then save cost.
In another embodiment, image element circuit P21~P23 of the second row reset cell 110 is used to according to signal wire L12
The low level first signal S1 provided is in the first period PRsetReset electric capacity C.Then, image element circuit P21~P23 of the second row
Compensating unit 120 be used to according to low level secondary signal S2 in the second period PcompElectric capacity C is compensated.Then,
Image element circuit P21~P23 of two rows writing unit 130 is used to the low level 3rd signal S3 provided according to signal wire L23
In the 3rd period PDateBy data voltage Data write-in electric capacity C.Then, image element circuit P21~P23 of the second row switch element
The 150 low level 4th signal S4 provided according to signal wire L24 are in the 4th period PEMTurn on switch element 150.
In the present embodiment, the reset cell 110 of the second row can be controlled by the secondary signal S2 of upper level, without only
Found a signal to control it, needed for the reset cell 110 of the second row can be such as provided by signal wire L12
One signal S1, to reduce the output signal of scanner driver 810, and then saves cost.For example, the image element circuit of the second row
The secondary signal S2 received can be thermal compensation signal Comp (N), and the 3rd signal S3 can be scanning signal Scan, and the 4th signal S4 can
For enable signal EM, and the first signal S1 can be the thermal compensation signal Comp (N-1) of upper level, therefore, be not required in the present embodiment
Independently go out the first signal S1 to control the image element circuit of the second row.It should be noted that, the signal waveforms shown in Figure 10 A are compared with Fig. 2A
And the signal waveforms shown in Fig. 6 have more a period PWait, this waiting period PWaitIt is the data voltage Data of previous row, because
This will be avoided image element circuit for not going together from sharing signal, and the noise jamming produced.
In another embodiment, reset cell 110, compensating unit 120, writing unit 130, driver element 140 and switch
Unit 150 can be using N-type transistor come implementation.In the present embodiment, image element circuit P11~P13 of the first row reset cell
110 are used to reset electric capacity C in the first period according to the first signal S1 of high level.Then, the image element circuit P11 of the first row~
P13 compensating unit 120 is used to according to the secondary signal S2 of the 3rd signal wire L12 high level provided in the second period to electric capacity
C is compensated.Then, the high level that image element circuit P11~P13 of the first row writing unit 130 is provided according to signal wire L13
The 3rd signal S3 data voltage Data is write into electric capacity C in the 3rd period.Then, image element circuit P11~P13 of the first row
Switch element 150 turns on switch element 150 according to the 4th signal S4 of the signal wire L14 high level provided in the 4th period.
In the present embodiment, image element circuit P21~P23 of the second row reset cell 110 according to signal wire L12 to carry
First signal S1 of the high level of confession resets electric capacity C in the first period.Then, image element circuit P21~P23 of the second row compensation
Unit 120 in the second period according to the secondary signal S2 of high level to electric capacity C to compensate.Then, the pixel of the second row
Circuit P21~P23 writing unit 130 is according to the 3rd signal S3 of the signal wire L23 high level provided in the 3rd period by number
According to voltage Data write-in electric capacity C.Then, image element circuit P21~P23 of the second row switch element 150 is carried according to signal wire L24
4th signal S4 of the high level of confession turns on switch element 150 in the 4th period.
From the invention described above embodiment, there are following advantages using the embodiment of the present invention.The embodiment of the present invention is led to
Cross and a kind of display panel and its image element circuit are provided, produced in each component parameters and become the different time, can be so as to eliminating critical voltage, it is to avoid
The variation influence display panel of critical voltage, makes display panel brightness uniformity, and maintains the image quality of display panel.In addition,
The display panel and image element circuit of specific embodiment of the present invention can improve compensation circuit when reset phase, because of circuit configuration and electricity
Property operational issue, and cause pixel by mistake luminous, the problem of influenceing the perception of user.
Although disclosing the specific embodiment of the present invention in embodiment above, so it is not limited to the present invention, this
Technical staff in technical field that the present invention belongs to, in the case of the principle of the present invention is not departed from spirit, when can be carried out respectively to it
Plant and change with modifying, therefore protection scope of the present invention is defined when to attach as defined in claim.
Claims (14)
1. a kind of image element circuit, it is characterised in that include：
One luminescence unit；
One electric capacity, includes a first end and one second end；
One the first transistor, comprising：
One first end, is electrically coupled to the first end of the electric capacity, and to receive a reset voltage；
One second end, is electrically coupled to second end of the electric capacity；And
One control end, to receive and according to one first signal with by the reset voltage by described the of the first transistor
One end is sent to second end；
One second transistor, comprising：
One first end, to receive a supply voltage；
One second end；And
One control end, is electrically coupled to second end of the electric capacity, and to the second end institute according to the electric capacity
The voltage of storage and drive the luminescence unit；
One third transistor, comprising：
One first end, is electrically coupled to second end of the electric capacity；
One second end, is electrically coupled to second end of the second transistor；And
One control end, to receive and be turned on according to a secondary signal third transistor；And
One the 4th transistor, comprising：
One first end, to receive a data voltage；
One second end, is electrically coupled to the first end of the electric capacity；And
One control end, to receive and according to one the 3rd signal with by the data voltage by described the of the 4th transistor
One end is sent to second end；
One data wire, the data wire timesharing provides the reset voltage and the data voltage.
2. image element circuit as claimed in claim 1, it is characterised in that also include：
One the 5th transistor, comprising：
One first end, is electrically coupled to second end of the second transistor；
One second end, is electrically coupled to the anode tap of the luminescence unit；
One control end, to receive and the 5th transistor according to one the 4th signal with or off.
3. image element circuit as claimed in claim 2, it is characterised in that the first transistor is used to according to low level described
First signal is in one first period so that the reset voltage is sent into described by the first end of the first transistor
Two ends, the third transistor is used to according to the low level secondary signal with by the second end of the second transistor and institute
The second end for stating electric capacity is turned in one second period, and the 4th transistor is used to according to low level 3rd signal in one
The data voltage is sent to second end by the 3rd period by the first end of the 4th transistor, and the described 5th is brilliant
Body is effective to turn on the 5th transistor in one the 4th period according to low level 4th signal.
4. image element circuit as claimed in claim 1, it is characterised in that also include：
One the 5th transistor, comprising：
One first end, is electrically coupled to the cathode terminal of the luminescence unit；
One second end, is electrically coupled to second end of the second transistor；
One control end, to receive and the 5th transistor according to one the 4th signal with or off.
5. image element circuit as claimed in claim 4, it is characterised in that the first transistor is used to according to high level
First signal is in one first period so that the reset voltage is sent into described by the first end of the first transistor
Two ends, the third transistor is according to the secondary signal of high level with by the second end of the second transistor and the electricity
The second end held is turned in one second period, and the 4th transistor is according to the 3rd signal of high level in one the 3rd period
The data voltage is sent to second end by the first end of the 4th transistor, wherein the 5th transistor
To the 4th signal according to high level the 5th transistor is turned in one the 4th period.
6. a kind of image element circuit, it is characterised in that include：
One luminescence unit；
One electric capacity, includes a first end and one second end；
One reset cell, is electrically coupled between the first end of the electric capacity and second end, to according to one first
Signal is to reset the electric capacity, and it is all a reset voltage to make the first end of the electric capacity and the voltage at second end；
One compensating unit, is electrically coupled to second end of the electric capacity and the reset cell, to according to one second letter
Number compensated with second end to the electric capacity, make the electric capacity second end voltage for a supply voltage with
The first voltage of one critical voltage is poor；
One writing unit, is electrically coupled to the first end and the reset cell of the electric capacity, to according to one the 3rd letter
Number so that a data voltage to be write to the first end of the electric capacity, and couple the of the reset voltage and the data voltage
Two voltage differences to second end of the electric capacity, make the electric capacity second end voltage for first voltage difference with
The voltage of second voltage difference and；And
One driver element, is electrically coupled to second end of the electric capacity and the compensating unit, to according to the electric capacity
The voltage that is stored and and drive the luminescence unit；
One data wire, the data wire timesharing provides the reset voltage and the data voltage.
7. image element circuit as claimed in claim 6, it is characterised in that also include：
One switch element, is electrically coupled between second end of the driver element and the luminescence unit, to basis
One the 4th signal is with switch element described on or off.
8. image element circuit as claimed in claim 7, it is characterised in that the reset cell is used to according to low level described the
One signal resets the electric capacity in one first period, and the compensating unit is used to according to the low level secondary signal in one the
Two periods were compensated to the electric capacity, and said write unit was used to according to low level 3rd signal in one the 3rd period
The data voltage is write into the electric capacity, the switch element is led according to low level 4th signal in one the 4th period
Lead to the switch element.
9. image element circuit as claimed in claim 7, it is characterised in that the reset cell is used to described the according to high level
One signal resets the electric capacity in one first period, and the compensating unit is used to according to the secondary signal of high level in one the
Two periods compensated to the electric capacity, and said write unit is according to the 3rd signal of high level in one the 3rd period by institute
State data voltage and write the electric capacity, the switch element turns on institute according to the 4th signal of high level in one the 4th period
State switch element.
10. a kind of display panel, it is characterised in that include：
One pel array, comprising multiple image element circuits as described in claim 1 or 6, wherein the multiple image element circuit is arranged
For a first row and one second row；
One first signal wire, is electrically coupled to multiple image element circuits positioned at the first row, to provide the multiple of the first row
The 3rd signal of image element circuit；
One secondary signal line, is electrically coupled to the multiple image element circuit positioned at the second row, to provide second row
The 3rd signal of multiple image element circuits, wherein the 3rd signal of multiple image element circuits of second row is relative to institute
Stating the 3rd signal of multiple image element circuits of the first row has a phase delay；And
One the 3rd signal wire, is electrically coupled to multiple image element circuits of the first row and multiple pixels electricity of second row
Road, multiple image element circuits of the secondary signal and second row of multiple image element circuits to provide the first row
First signal.
11. display panel as claimed in claim 10, it is characterised in that the reset cell of the image element circuit of the first row is used
To reset electric capacity, the compensating unit of the image element circuit of the first row in one first period according to low level first signal
The low level secondary signal to be provided according to the 3rd signal wire is mended in one second period to the electric capacity
Repay, the writing unit of the image element circuit of the first row is used to the provided according to first signal wire the low level described 3rd
The data voltage is write the electric capacity by signal in one the 3rd period.
12. display panel as claimed in claim 11, it is characterised in that the replacement list of the image element circuit of second row
Low level first signal that member is used to be provided according to the 3rd signal wire resets the electric capacity in first period,
The compensating unit of the image element circuit of second row was used to according to the low level secondary signal in second period
The electric capacity is compensated, the said write unit of the image element circuit of second row according to the secondary signal line to carry
The data voltage is write the electric capacity by low level 3rd signal supplied in the 3rd period.
13. display panel as claimed in claim 10, it is characterised in that the replacement list of the image element circuit of the first row
Member is used to reset the electric capacity, the pixel electricity of the first row in one first period according to first signal of high level
The compensating unit on road is used to the secondary signal of the high level provided according to the 3rd signal wire in one second period
The electric capacity is compensated, the said write unit of the image element circuit of the first row is carried according to first signal wire
The data voltage is write the electric capacity by the 3rd signal of the high level of confession in one the 3rd period.
14. display panel as claimed in claim 13, it is characterised in that the image element circuit of second row it is described heavy
Unit is put to be used to according to first signal of the high level of the 3rd signal wire offer is reset in first period
Electric capacity, the compensating unit of the image element circuit of second row is used to the secondary signal according to high level in described
Second period compensated to the electric capacity, and the said write unit of the multiple image element circuit of second row is according to described
The data voltage is write the electric capacity by the 3rd signal for the high level that secondary signal line is provided in the 3rd period.
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| TW104110966 | 2015-04-02 | ||
| TW104110966A TWI555002B (en) | 2015-04-02 | 2015-04-02 | Display panel and pixel circuit thereof |
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| CN104809987B true CN104809987B (en) | 2017-10-20 |
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| CN103000128A (en) * | 2011-09-12 | 2013-03-27 | 佳能株式会社 | Display apparatus |
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| US6937215B2 (en) * | 2003-11-03 | 2005-08-30 | Wintek Corporation | Pixel driving circuit of an organic light emitting diode display panel |
| JP4979772B2 (en) * | 2007-10-18 | 2012-07-18 | シャープ株式会社 | Current-driven display device |
| TWI442374B (en) * | 2011-08-16 | 2014-06-21 | Hannstar Display Corp | Compensation circuit of organic light-emitting diode |
| TWI462080B (en) * | 2012-08-14 | 2014-11-21 | Au Optronics Corp | Active matrix organic light emitting diode circuit and operating method of the same |
| CN103296055B (en) * | 2012-12-26 | 2015-12-09 | 上海天马微电子有限公司 | Pixel circuit and driving method of organic light emitting display and organic light emitting display |
| TWI483233B (en) * | 2013-02-08 | 2015-05-01 | Au Optronics Corp | Pixel structure and driving method thereof |
| KR102029319B1 (en) * | 2013-06-19 | 2019-10-08 | 삼성디스플레이 주식회사 | Organic Light Emitting Display Device and Driving Method Thereof |
| CN103943060B (en) * | 2013-06-28 | 2016-03-16 | 上海天马微电子有限公司 | Organic light emitting display, pixel circuit thereof and driving method of pixel circuit |
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| CN101286298A (en) * | 2007-04-10 | 2008-10-15 | 三星Sdi株式会社 | Pixel, organic light emitting display using the same, and associated methods |
| CN103000128A (en) * | 2011-09-12 | 2013-03-27 | 佳能株式会社 | Display apparatus |
| CN102682704A (en) * | 2012-05-31 | 2012-09-19 | 广州新视界光电科技有限公司 | Pixel driving circuit for active organic electroluminescent display and driving method therefor |
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| TWI555002B (en) | 2016-10-21 |
| TW201636986A (en) | 2016-10-16 |
| CN104809987A (en) | 2015-07-29 |
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