CN104809272A - LED (Light Emitting Diode) chip light extraction rate prediction method - Google Patents
LED (Light Emitting Diode) chip light extraction rate prediction method Download PDFInfo
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- CN104809272A CN104809272A CN201510142039.1A CN201510142039A CN104809272A CN 104809272 A CN104809272 A CN 104809272A CN 201510142039 A CN201510142039 A CN 201510142039A CN 104809272 A CN104809272 A CN 104809272A
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Abstract
The invention discloses an LED (Light Emitting Diode) chip light extraction rate prediction method. The LED chip light extraction rate prediction method comprises the following steps of step 1, constructing a packaging substrate model through the modeling function of computer 3D (Three-Dimensional) modeling software; step 2, constructing a packaging resin model through the computer 3D modeling software; step 3, importing an LED packaging model and a chip model through Trace Pro software to form a complete LED packaging mode; step 4, performing target surface building which comprises producing six rectangular target surfaces through the self-modeling-function of the Trace Pro software; step 5, setting optical parameters through the ABg model function in a BSDF (Bidirectional Scattering Distribution Function) in the Trace Pro; step 6, collecting recording data through a light scanning system of the Trace Pro software; step 7, predicting the light extraction rate. According to the LED chip light extraction rate prediction method, the modeling process and the computing time are shortened in the same actual situation so as to improve the efficiency and the zero cost optimization is implemented.
Description
Technical field
The present invention relates to the design field of LED chip, particularly a kind of Forecasting Methodology of LED chip light extraction efficiency.
Background technology
Light emitting diode (LED), as emerging green solid lighting source, has that brightness is high, low in energy consumption, the life-span is long, start the advantages such as fast, has huge using value.The conventional illumination sources such as relative incandescent lamp, electricity-saving lamp and fluorescent light, LED has overwhelming advantage in luminescence efficiency with on serviceable life.Further, the luminescence efficiency of current LED also also exists very large room for promotion, improves the luminescence efficiency of LED and contributes to the production cost reducing its unit luminous quantity, is of great significance for promoting LED tool on wider.For this reason, related scientific research personnel have invented the technology such as graphical sapphire substrate, surface coarsening, flip-chip, photonic crystal.Wherein graphical sapphire substrate technology utilizes micro-nano mechanical technology to have certain array rule micron order or nano level pattern in sapphire substrate surface making, controls the scattering of light, improve light extraction efficiency with this by micro pattern; Surface texture technology, then by carrying out roughening process to LED chip surface, changes the scattering situation of light on surface, to obtain larger surface light flood rate by changing surface topography; Namely flip-chip uses the technology such as gold goal weldering to be connected towards base plate for packaging LED chip electrode district, and the Sapphire Substrate face making chip back transparent becomes main exiting surface, thus improves luminous flux; Photonic crystal technology utilizes photonic crystal to the diffraction of light to improve ubiquitous " light restrain " problem caused because of total reflection in LED chip, improves light extraction efficiency with this.When these technology are used on LED chip separately above, the light extraction efficiency of LED chip can be improved to some extent and then improve external quantum efficiency.
Above-mentioned raising light extraction efficiency technology number is various, and in actual conditions usually multinomial technology jointly apply, promote effect in the hope of obtaining higher light extraction efficiency.In this case, influence each other very complicated between every technology, the theory and the abundant experiment experience that lack system science instruct, and make optimization difficult.Therefore the light extraction efficiency of accurate evaluation LED, and just seem particularly important with this optimization technical parameter being carried out to system to obtain higher lifting effect.But the light extraction efficiency of present stage LED only reflects by the chip testing of reality, and complex steps progress is slow.Moreover chip, in current optimizing process, needs great many of experiments and contrast verification in addition, could obtain desirable Optimal Parameters, greatly reduce efficiency and add design cost.
So need badly, a kind of system is accurate, the evaluation mechanism of convenience and high-efficiency, for the light extraction efficiency of Accurate Prediction LED.This method is prepared except avoiding loaded down with trivial details, that cost is high actual product, also will have physical theory and the guidance of mathematical model of scientific and precise, accuracy to ensure that the method and reliability.Meanwhile, due to complicacy and the diversity of LED product structure, this Forecasting Methodology needs to adapt to formal dress, upside-down mounting (Flip Chip), the chip structure such as vertical and comprises the multiple packaged types such as SMD, power-type.
Summary of the invention
In order to overcome the above-mentioned shortcoming of prior art with not enough, the object of the present invention is to provide a kind of Forecasting Methodology of LED chip light extraction efficiency, ensureing to shorten modeling process and computing time under the prerequisite be consistent with actual conditions, improve efficiency.
Object of the present invention is achieved through the following technical solutions:
A Forecasting Methodology for LED chip light extraction efficiency, comprises the following steps:
(1) base plate for packaging model is built: adopt the modeling function of computing machine 3D modeling software to construct base plate for packaging, and utilize the Boolean calculation difference set function of computing machine 3D modeling software to shear out groove in the central authorities of base plate for packaging, for LED chip model provides position;
(2) potting resin model is built: adopt computing machine 3D modeling software, set up the potting resin of the groove that filling step (1) obtains, and utilize the Boolean calculation difference set function of software in potting resin for room sheared out by LED chip model;
(3) LED model and chip model is imported: adopt the insertion part function that TracePro software carries, import the base plate for packaging and potting resin model that have built respectively in the base plate for packaging and step (2) that LED chip model and step (1) build up, form complete LED model;
(4)) target surface is built: the modeling function adopting TracePro software to carry makes six rectangle target surfaces, and described six target surfaces are placed in upper and lower, the front, rear, left and right side of packaging model respectively, surround whole packaging model;
(5) optical parametric is set: adopt ABg model function in the BSDF function in TracePro, the groove surfaces for base plate for packaging arranges Ag reflector parameter; Utilize material properties in TracePro, surface properties, volume scattering attribute, for potting resin and LED chip arrange optical property parameter;
(6) collect record data: what utilize TracePro software clears off system, carries out ray tracing to LED model, obtain the luminous flux data on six target surfaces respectively, add and obtain total light flux;
(7) light extraction efficiency is predicted: calculate the luminous parameters of LED chip model specification and the ratio of total light flux, obtain light extraction efficiency.
Step (5) described optical property parameter comprises the parameter of ABg model, the parameter of volume scattering model in refractive index, temperature setting, absorptivity, extinction coefficient, emergent light wavelength, surperficial BSDF function.
Step (1) adopts the modeling function of computing machine 3D modeling software to construct base plate for packaging, is specially:
The modeling function of computing machine 3D modeling software is adopted to construct cylinder or square base plate for packaging.
The structure of the described LED model of step (3) is adopting surface mounted LED or LED lamp bead.
The described LED chip model of step (3) is formal dress, upside-down mounting or vertical chip structure.
Step (1) described groove is truncated cone-shaped groove or cylinder shape groove.
Described computing machine 3D modeling software is SolidWorks software.
The present invention is by the physical theory of optical propagation and mathematical model, utilize optical theory as reflection, refraction, light absorption principle etc., simulate the travel path of light in chip and encapsulating structure, by the average behavior of a large amount of light of computer statistics, finally calculate the lifting effect of light extraction efficiency.
Compared with prior art, the present invention has the following advantages and beneficial effect:
(1) the present invention is to the full structural model modeling of LED, realizes the simulation at whole LED chip and package level, and lead to for the light extraction efficiency of result to product is predicted with final total light, result is closing to reality situation more, possesses reference value.
(2) model of the present invention is through Rational Simplification, ensureing to shorten modeling process and computing time under the prerequisite be consistent with actual conditions, improves efficiency.
(3) physical theory propagated in strict conformity with light of the present invention have mathematical modeling model accurately, therefore possesses science and preciseness, can reflect actual light propagation condition well.
(4) the small adjustment of support parameter of the present invention, the various parameters of the various technology of energy systematic study, on the impact of LED light extraction efficiency, without the need to finished product with detection perform, realize zero cost optimization.
(5) the present invention uses statistics approximate model to realize the simulation of multinomial raising light extraction efficiency technology, and can carry out multinomial technology and jointly simulate, and systematically optimizes every technical parameter, to obtain best optimum results.
(6) the present invention can simulate the light extraction efficiency of LED under LED and various encapsulation standard prepared by various material as required, provides new approaches for finding better LED epitaxial structure, backing material and encapsulating structure.
Accompanying drawing explanation
Fig. 1 is the front view of the LED model of embodiments of the invention 1.
Fig. 2 is the vertical view of the LED model of embodiments of the invention 1.
Fig. 3 is the left view of the LED model of embodiments of the invention 1.
Fig. 4 is the process flow diagram of the Forecasting Methodology of the LED chip light extraction efficiency of embodiments of the invention.
Fig. 5 is the front view of the LED model of embodiments of the invention 2.
Fig. 6 is the vertical view of the LED model of embodiments of the invention 2.
Fig. 7 is the left view of the LED model of embodiments of the invention 2.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
Embodiment 1
Fig. 1 ~ 3 are the three-view diagram of the 5050 adopting surface mounted LED packaging models of the present embodiment, and the LED chip 11 imported by outside, base plate for packaging 12 and potting resin 13 form.
As shown in Figure 4, the Forecasting Methodology of the LED chip light extraction efficiency of the present embodiment comprises the following steps:
(1) build base plate for packaging model: adopt the modeling function of SolidWorks software to construct and be of a size of the rectangular-shaped substrate of 750mm × 750mm × 150mm, and utilize the Boolean calculation difference set function of software to be respectively the truncated cone-shaped groove of 330mm and 225mm to realize shearing out high 120mm, up and down disc radius in central authorities.
(2) potting resin model is built: adopt SolidWorks software, according to the groove shapes set up in (1), set up the potting resin of the truncated cone-shaped groove that filling step (1) obtains, utilize the Boolean calculation difference set function of SolidWorks software in resin for LED chip shears out the room of 120mm × 120mm × 104.275mm;
(3) LED model and chip model is imported: adopt the insertion part function that TracePro software carries, import the base plate for packaging and potting resin model that have built respectively LED chip and step (1), (2) from outside, form complete LED model;
The present embodiment imports hexagonal pyramid hemisphere mixed pattern graphical sapphire substrate chip and pattern-free Sapphire Substrate chip from the external world respectively.
(4) target surface is built: the modeling function adopting TracePro software to carry makes six rectangle target surfaces, and described six target surfaces are placed in upper and lower, the front, rear, left and right side of packaging model respectively;
In the present embodiment, target surface is of a size of 1000mm × 1000mm × 2mm, and in rectangular coordinate system, center is respectively (0,0,501), (0,0 ,-501), (0,501,0), (0 ,-501,0), (501,0,0) and (-501,0,0).
(5) optical parametric is set: adopt ABg model function in the BSDF function in TracePro, for base plate for packaging model further groove surface arranges Ag reflector parameter; Utilize material properties in TracePro, surface properties, volume scattering attribute, for potting resin and LED chip arrange optical property parameter;
The material of the present embodiment chips imports from the external world, and potting resin refractive index 1.41, Ag reflector parameter is absorptivity 5%, and specular reflectance 80%, BSDF function ABg Model Parameter B is 0.001, g is that 3.5, A carries function calculating by TracePro software.Be arranged on surface0, surface7 and surface8 of substrate model.
(6) collect record data: what utilize TracePro software clears off system, carries out ray tracing to packaging model, obtain the luminous flux data on six target surfaces respectively, add and obtain total light flux;
What the present embodiment utilized TracePro software clears off system, ray tracing is carried out to LED model, obtain the luminous flux data of each from the radiometric analysis figure utilizing TracePro software to obtain, wherein total light of LED model leads to be+z target surface surface1 ,-z target surface surface0 ,+y target surface surface2 ,-y target surface surface4 ,+x target surface surface5 and-z target surface surface3 add and.
(7) light extraction efficiency of LED model is analyzed: according to the luminous parameters of LED chip model specification and the ratio of total light flux, obtain light extraction efficiency;
Physical dimension in the present embodiment all adopts equivalent amplifying method, is 150 times of actual value by dimension enlargement.Effectively computation complexity can be reduced, to raise the efficiency by this method.
Importing chip in the present embodiment, to arrange illuminating source be lambert's type light source, and comprise 6000 light, total light flux is 10000a.u.a.u..In step (6), circular cone pattern graphical sapphire substrate chip and pattern-free Sapphire Substrate chip are completed and clear off rear contrast, calculate each target surface luminous flux and add and be respectively 7795a.u.a.u. and 4606a.u.a.u. with total value.Step (7) calculates optical efficiency and is respectively 77.95% and 46.06%.After using graphical sapphire substrate technology, light extraction efficiency promotes 69.23%.In practical devices, the light extraction efficiency of patterned substrate LED can promote more than 50% compared with conventional substrate LED, and simulation result conforms to actual conditions.
Embodiment 2
Fig. 5 ~ 7 are the three-view diagram of the LED lamp bead packaging model of the present embodiment, and the LED chip 21 imported by the external world, base plate for packaging 22 and potting resin 23 form.
The Forecasting Methodology of the LED chip light extraction efficiency of the present embodiment comprises the following steps:
(1) base plate for packaging model is built: adopt the modeling function of SolidWorks software to construct and be of a size of radius 500mm, the cylindrical substrate of high 200mm, and utilizing the Boolean calculation difference set function of software to realize shearing out high 120mm in central authorities, the cylindrical groove of radius 405mm.
(2) potting resin model is built: adopt SolidWorks software, according to the groove shapes of the LED encapsulation structure set up in (1), set up and fill full cylindrical groove and top is the columned potting resin of the hemispherical hemispherical head of diameter 810mm, the Boolean calculation difference set function of software in resin for LED chip shears out the room of 120mm × 120mm × 104.275mm;
(3) import LED model and chip model: adopt the insertion part function that TracePro software carries, import the LED chip that the adaptive potting resin of light emitting properties is set and the base plate for packaging built and potting resin model from outside;
The present embodiment imports triangular pyramid hexagonal pyramid mixed pattern graphical sapphire substrate chip from the external world, changing pattern center spacing when keeping other parameter constants is 4 μm, 6 μm, 8 μm three groups.
(4) build target surface: the modeling function adopting TracePro software to carry makes six rectangle target surfaces, described six target surfaces are placed in top+z, the below-z of packaging model, front+y, rear-y, right+x and left-x respectively;
In the present embodiment, target surface is of a size of 1000mm × 1000mm × 2mm, and in rectangular coordinate system, center is respectively (0,0,501), (0,0 ,-501), (0,501,0), (0 ,-501,0), (501,0,0) and (-501,0,0).
(5) optical parametric is set: adopt ABg model function in the BSDF function in TracePro, for base plate for packaging model further groove surface arranges Ag reflector parameter; Utilize material properties in TracePro, surface properties, volume scattering attribute, for potting resin and LED chip arrange optical property parameter;
The material of the present embodiment chips imports from the external world, and potting resin refractive index 1.41, Ag reflector parameter is absorptivity 5%, and specular reflectance 80%, BSDF function ABg Model Parameter B is 0.001, g is that 3.5, A carries function calculating by TracePro software.Be arranged on surface0, surface5 and surface6 of substrate model.
(6) collect record data: what utilize TracePro software clears off system, carries out ray tracing to packaging model, obtain the luminous flux data on six target surfaces respectively, add and obtain total light flux;
What the present embodiment utilized TracePro software clears off system, ray tracing is carried out to LED model, obtain the luminous flux data of each from the radiometric analysis figure utilizing TracePro software to obtain, wherein total light of LED model leads to be+z target surface surface1 ,-z target surface surface0 ,+y target surface surface2 ,-y target surface surface4 ,+x target surface surface5 and-z target surface surface3 add and.
(7) light extraction efficiency of LED model is analyzed: according to the luminous parameters of LED chip model specification and the ratio of total light flux, obtain light extraction efficiency;
Physical dimension in the present embodiment all adopts equivalent amplifying method, is 200 times of actual value by dimension enlargement.
Importing chip in the present embodiment, to arrange illuminating source be lambert's type light source, and comprise 6000 light, total light flux is 10000a.u.a.u..After in step (6), triangular pyramid hexagonal pyramid mixed pattern chip completes and clears off, calculate each target surface luminous flux to add and total value, pattern center spacing is that 4 μm, 6 μm, 8 μm chip luminous fluxes are respectively 7895a.u.a.u., 7855a.u.a.u. and 7781a.u.a.u..Step (7) calculates optical efficiency and is respectively 78.95%, 78.55% and 77.81%.The present embodiment reflects the light extraction efficiency difference of LED under different technologies parameter.Obtain the highest light extraction efficiency when underlay pattern center distance is 4 μm, therefore selected center's spacing 4 is the graphic parameter optimized.This embodiment is promoted, in the middle of the screening and optimizing that can be used for more multi graphic substrate parameters.
Above-described embodiment is the present invention's preferably embodiment; but embodiments of the present invention are not limited by the examples; change, the modification done under other any does not deviate from Spirit Essence of the present invention and principle, substitute, combine, simplify; all should be the substitute mode of equivalence, be included within protection scope of the present invention.
Claims (7)
1. a Forecasting Methodology for LED chip light extraction efficiency, is characterized in that, comprises the following steps:
(1) base plate for packaging model is built: adopt the modeling function of computing machine 3D modeling software to construct base plate for packaging, and utilize the Boolean calculation difference set function of computing machine 3D modeling software to shear out groove in the central authorities of base plate for packaging, for LED chip model provides position;
(2) potting resin model is built: adopt computing machine 3D modeling software, set up the potting resin of the groove that filling step (1) obtains, and utilize the Boolean calculation difference set function of software in potting resin for room sheared out by LED chip model;
(3) LED model and chip model is imported: adopt the insertion part function that TracePro software carries, import the base plate for packaging and potting resin model that have built respectively in the base plate for packaging and step (2) that LED chip model and step (1) build up, form complete LED model;
(4)) target surface is built: the modeling function adopting TracePro software to carry makes six rectangle target surfaces, and described six target surfaces are placed in upper and lower, the front, rear, left and right side of packaging model respectively, surround whole packaging model;
(5) optical parametric is set: adopt ABg model function in the BSDF function in TracePro, the groove surfaces for base plate for packaging arranges Ag reflector parameter; Utilize material properties in TracePro, surface properties, volume scattering attribute, for potting resin and LED chip arrange optical property parameter;
(6) collect record data: what utilize TracePro software clears off system, carries out ray tracing to LED model, obtain the luminous flux data on six target surfaces respectively, add and obtain total light flux;
(7) light extraction efficiency is predicted: calculate the luminous parameters of LED chip model specification and the ratio of total light flux, obtain light extraction efficiency.
2. the Forecasting Methodology of LED chip light extraction efficiency according to claim 1, it is characterized in that, step (5) described optical property parameter comprises the parameter of ABg model, the parameter of volume scattering model in refractive index, temperature setting, absorptivity, extinction coefficient, emergent light wavelength, surperficial BSDF function.
3. the Forecasting Methodology of LED chip light extraction efficiency according to claim 1, is characterized in that, step (1) adopts the modeling function of computing machine 3D modeling software to construct base plate for packaging, is specially:
The modeling function of computing machine 3D modeling software is adopted to construct cylinder or square base plate for packaging.
4. the Forecasting Methodology of LED chip light extraction efficiency according to claim 1, is characterized in that, the structure of the described LED model of step (3) is adopting surface mounted LED or LED lamp bead.
5. the Forecasting Methodology of LED chip light extraction efficiency according to claim 1, is characterized in that, the described LED chip model of step (3) is formal dress, upside-down mounting or vertical chip structure.
6. the Forecasting Methodology of LED chip light extraction efficiency according to claim 1, is characterized in that, step (1) described groove is truncated cone-shaped groove or cylinder shape groove.
7. the Forecasting Methodology of LED chip light extraction efficiency according to claim 1, is characterized in that, described computing machine 3D modeling software is SolidWorks software.
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Cited By (1)
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| CN107845706A (en) * | 2017-10-24 | 2018-03-27 | 江门市奥伦德光电有限公司 | A kind of design method of LED core plate electrode |
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