CN104777660B

CN104777660B - Display device

Info

Publication number: CN104777660B
Application number: CN201410842135.2A
Authority: CN
Inventors: 李大荣; 朴东健; 孔香植; 南重建; 赵国来
Original assignee: Samsung Display Co Ltd
Current assignee: Samsung Display Co Ltd
Priority date: 2014-01-13
Filing date: 2014-12-30
Publication date: 2020-04-28
Anticipated expiration: 2034-12-30
Also published as: KR20150085161A; CN104777660A; EP2894510A1; US9835899B2; EP2894510B1; JP2015132823A; US20150198845A1; KR102150859B1; JP6558900B2

Abstract

The display device includes a first base substrate, a second base substrate, pixels, a first polarizer, and a second polarizer. The first base substrate includes light-transmissive regions and a light-shielding region surrounding each of the light-transmissive regions. The pixels are respectively overlapped with the light transmission regions. The first polarizer and the second polarizer are spaced apart from each other such that the pixels are disposed therebetween. At least one of the first polarizer and the second polarizer includes a plurality of optical conversion layers, each of which includes a plurality of lattice-shaped wirings.

Description

Display device

Cross Reference to Related Applications

This application claims priority from korean patent application No. 10-2014-.

Technical Field

The present disclosure generally relates to display devices. More particularly, the present disclosure relates to a display device including an optical conversion layer.

Background

In general, a non-light emitting display device such as a liquid crystal display device displays an image using external light. For example, a liquid crystal display device includes a liquid crystal display panel and a backlight unit. The liquid crystal display panel displays an image using light provided by the backlight unit.

The liquid crystal display panel includes two display substrates and a liquid crystal layer interposed between the two display substrates. The two polarizing films are respectively disposed on the two display substrates. The two polarizing films polarize light emitted from the backlight unit. Light generated by the backlight unit may or may not propagate through the liquid crystal display panel according to an arrangement of liquid crystal molecules in the liquid crystal layer.

Disclosure of Invention

The present disclosure provides a display device having improved display quality and luminous efficiency.

An aspect of the present disclosure according to an exemplary embodiment provides a display device including a first base substrate, a second base substrate, a pixel, a first polarizer, and a second polarizer. The first base substrate includes light-transmissive regions and a light-shielding region surrounding each of the light-transmissive regions. The pixels are respectively overlapped with the light transmission regions. The first polarizer and the second polarizer are spaced apart from each other such that the pixels are disposed therebetween. At least one of the first polarizer and the second polarizer includes a plurality of optical conversion layers, each of which includes a plurality of lattice-shaped wirings.

The plurality of optical conversion layers may include a first optical conversion layer including first lattice wires and a second optical conversion layer including second lattice wires, wherein the second lattice wires are substantially parallel to the first lattice wires.

The first optical conversion layer and the second optical conversion layer may be disposed on the first base substrate.

The first optical conversion layer and the second optical conversion layer may be arranged such that the first base substrate is arranged between the first optical conversion layer and the second optical conversion layer.

The first optical conversion layer and the second optical conversion layer may be disposed on the same side of the first base substrate.

The first optical conversion layer and the second optical conversion layer may be disposed between the surface of the first base substrate and the pixel.

At least one of the first optical conversion layer and the second optical conversion layer may include: a polarizing portion including respective lattice-shaped wirings of the first and second lattice-shaped wirings, and overlapping the light-transmitting region when viewed in a direction perpendicular to the main surface of the first base substrate; and a reflective portion covering the light-shielding region.

The first optical conversion layer may include a polarized portion including first lattice-shaped wirings and a reflective portion, and the second optical conversion layer includes a polarized portion including second lattice-shaped wirings.

The respective lattice-like wirings and the reflective portions may be made of the same material.

Each of the pixels may include a thin film transistor connected to a corresponding gate line of the gate lines disposed on the first base substrate and a corresponding data line of the data lines disposed on the first base substrate, and a pixel electrode connected to the thin film transistor.

When viewed in a direction perpendicular to the main surface of the first base substrate, the polarizing portion may overlap the pixel electrode and the reflecting portion may overlap the thin film transistor.

Each of the first and second lattice-shaped wirings may have a height of about 50nm to about 150 nm.

When the sum of the distance between two adjacent lattice-shaped wirings in the first-group lattice-shaped wirings in the direction in which the first-group lattice-shaped wirings are arranged and the width of one of the two adjacent lattice-shaped wirings in the direction is defined as a pitch, the ratio of the width of one lattice-shaped wiring in the direction to the pitch is in the range from about 0.3:1 to about 0.6: 1.

The second lattice-shaped wirings may have the same pitch as the first lattice-shaped wirings and the second lattice-shaped wirings may have the same width as the first lattice-shaped wirings.

Each of the first and second sets of lattice-shaped wirings may include a metal layer and a metal oxide layer covering the metal layer.

The plurality of polarizers may further include a third optical conversion layer including third lattice-shaped wirings extending in the same direction as the first lattice-shaped wirings and arranged in the same direction as the first lattice-shaped wirings.

The second polarizer may be a stretch-type polarizing film.

The second polarizer may include a third optical conversion layer including third lattice-shaped wirings, and a fourth optical conversion layer including fourth lattice-shaped wirings extending in the same direction as the third lattice-shaped wirings and arranged in the same direction as the third lattice-shaped wirings, and the third optical conversion layer and the fourth optical conversion layer are disposed on the second base substrate.

The display device may further include: and a plurality of color filters overlapping the light-transmitting region when viewed in a direction perpendicular to the main surface of the first base substrate.

In another aspect, a display device includes a first base substrate, a second base substrate, a plurality of pixels, a first polarizer, and a second polarizer. The first base substrate and the second base substrate are arranged to be spaced apart from each other. The first base substrate includes a plurality of transmissive regions and a light-shielding region disposed adjacent to the transmissive regions.

The pixels are arranged between the first and second base substrates and overlap the transmissive areas, respectively. The first polarizer and the second polarizer are spaced apart from each other such that the pixels are disposed therebetween.

At least one of the first polarizer and the second polarizer includes a plurality of optical conversion layers arranged on layers different from each other, and each optical conversion layer includes a plurality of lattice patterns.

The first polarizer includes a first optical conversion layer and a second optical conversion layer. The first optical conversion layer includes a plurality of first lattice patterns and the second optical conversion layer includes a plurality of second lattice patterns extending in the same direction as the first lattice patterns and arranged in the same direction as the first lattice patterns. The first optical conversion layer and the second optical conversion layer are arranged on different layers from each other.

The first optical conversion layer and the second optical conversion layer are disposed on the first base substrate. The first optical conversion layer and the second optical conversion layer are arranged such that the first base substrate is arranged between the first optical conversion layer and the second optical conversion layer. The first optical conversion layer and the second optical conversion layer are disposed between the first base substrate and the pixel.

At least one of the first optical conversion layer and the second optical conversion layer includes a polarization portion and a reflection portion. The light deflecting portion includes respective ones of the first and second lattice patterns and overlaps the transmissive region. The reflective portion covers the light-shielding region.

The polarizing portion and the reflecting portion comprise the same material.

Each pixel includes a thin film transistor and a pixel electrode. The thin film transistors are connected to respective ones of the gate lines disposed on the first base substrate and respective ones of the data lines disposed on the first base substrate. The pixel electrode is connected to the thin film transistor.

The polarizing portion overlaps the pixel electrode and the reflecting portion overlaps the thin film transistor.

The second polarizer is a stretched polarizing film.

Each of the first lattice patterns includes an aluminum layer and an aluminum oxide layer covering the aluminum layer.

The first lattice pattern extends in the same direction as the second lattice pattern.

Each of the first lattice patterns and each of the second lattice patterns has a height of about 50nm to about 150 nm.

When the sum of the distance between two adjacent lattice patterns of the first lattice pattern in the direction in which the first lattice pattern is arranged and the width of one of the two adjacent lattice patterns in that direction is defined as a pitch, the ratio of the width of one lattice pattern in that direction to the pitch is in the range from about 0.3:1 to about 0.6: 1.

The second lattice pattern has the same pitch as the first lattice pattern and the second lattice pattern has the same width as the first lattice pattern.

According to the above, the optical conversion layers arranged to overlap each other improve the polarization of light passing through the polarizer. Although one of the first optical conversion layer and the second optical conversion layer is damaged, the other of the first optical conversion layer and the second optical conversion layer may polarize light incident to the polarizer.

The reflection part included in at least one of the first optical conversion layer and the second optical conversion layer reflects light provided from the backlight unit without absorbing the light. The reflected light is reflected again by an optical member included in the backlight unit and then incident to the liquid crystal display panel. Accordingly, the amount of light consumed is reduced and the amount of light incident to the liquid crystal display panel is increased, thereby improving light emission efficiency.

Drawings

The above and other advantages of the present disclosure will become apparent by reference to the following detailed description considered in conjunction with the accompanying drawings, in which:

fig. 1 is a block diagram illustrating a display device according to an example embodiment of the present disclosure;

fig. 2 is a perspective view illustrating a portion of the display panel shown in fig. 1;

fig. 3 is a plan view illustrating a pixel according to an example embodiment of the present disclosure;

FIG. 4 is a cross-sectional view of a display panel according to an example embodiment of the present disclosure;

fig. 5 is an enlarged view illustrating a portion AA shown in fig. 4;

FIG. 6 is an enlarged view showing the lattice pattern shown in FIG. 5;

fig. 7A and 7B are plan views illustrating first and second optical conversion layers according to example embodiments of the present disclosure;

fig. 8 is a view showing an arrangement of first lattice patterns and second lattice patterns;

FIG. 9 is a Scanning Electron Microscope (SEM) image showing a damaged optical conversion layer;

FIG. 10 is a bar graph showing the extinction ratio according to the structure of the optical conversion layer and the damaged lattice pattern;

fig. 11 is a cross-sectional view illustrating a direction in which light provided to a first polarizer travels according to an example embodiment of the present disclosure;

FIG. 12 is a plan view of a second optical conversion layer according to an example embodiment of the present disclosure;

fig. 13A to 13E are cross-sectional views illustrating a display panel according to an example embodiment of the present disclosure; and

fig. 14A to 14I are perspective views illustrating a method of manufacturing a polarizer according to an example embodiment of the present disclosure.

Detailed Description

It will be understood that when an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, it can be directly on, connected or coupled to the other element or layer or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers present. Like reference numerals refer to like elements throughout. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

It will be understood that, although the terms "first", "second", etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present disclosure.

Spatially relative terms, such as "below," "lower," "above," "upper," and the like, may be used herein for ease of description to describe one element or feature's relationship to another element (or elements) or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below" can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

Unless otherwise specifically defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

Hereinafter, example embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

Fig. 1 is a block diagram illustrating a display device according to an example embodiment of the present disclosure, and fig. 2 is a perspective view illustrating a portion of a display panel illustrated in fig. 1. The present example embodiment will be described using a liquid crystal display device as the display device, but the display device should not be limited to the liquid crystal display device, and the technique of the present example embodiment may be applied to or extended to any other display device including a polarizer.

Turning to fig. 1, the liquid crystal display device includes a liquid crystal display panel DP, a signal controller 100, a gate driver 200, a data driver 300, a backlight unit BLU, and two polarizers (not shown).

The liquid crystal display panel DP includes a plurality of signal lines and a plurality of pixels PX11 to PXnm connected to the signal lines. The signal lines include a plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm. The gate lines GL1 to GLn extend in a first direction DR1 (e.g., a horizontal direction in fig. 1) and are arranged in a second direction DR2 (e.g., a vertical direction in fig. 1). The data lines DL1 to DLm are insulated from the gate lines GL1 to GLn while crossing the gate lines GL1 to GLn. For example, the data lines DL1 to DLm are not electrically connected to the gate lines GL1 to GLn. Although not shown in the drawings, the signal line may further include a plurality of common lines corresponding to the gate lines GL1 to GLn.

As shown in fig. 1, the pixels PX11 to PXnm are arranged in a matrix form. Each of the pixels PX11 to PXnm is connected to a corresponding gate line of the gate lines GL1 to GLn and a corresponding data line of the data lines DL1 to DLm.

The liquid crystal display panel DP may be, but is not limited to, one of a Vertical Alignment (VA) mode liquid crystal display panel, a Patterned Vertical Alignment (PVA) mode liquid crystal display panel, an in-plane switching (IPS) mode liquid crystal display panel, a Fringe Field Switching (FFS) mode liquid crystal display panel, and a Plane Line Switching (PLS) mode liquid crystal display panel.

The signal controller 100 receives an input image signal RGB and converts the input image signal RGB into image data R ' G ' B ' suitable for operating the liquid crystal display panel DP. In addition, the signal controller 100 receives various control signals CS such as a vertical synchronization signal, a horizontal synchronization signal, a master clock signal, a data enable signal, and the like, and outputs a first control signal CONT1 and a second control signal CONT 2. For example, the first control signal CONT1 is transmitted to the gate driver 200, and the second control signal CONT2 is transmitted to the data driver 300. In addition, the signal controller 100 outputs a third control signal CONT3 to control the backlight unit BLU. The third control signal CONT3 may include a dimming (dimming) signal.

The gate driver 200 applies gate signals to the gate lines GL1 to GLn in response to the first control signal CONT 1. The first control signals CONT1 include a vertical start signal for starting the operation of the gate driver 200, a gate clock signal for determining the output timing of the gate voltage, and an output enable signal for determining the on-pulse (on-pulse) width of the gate voltage.

The data driver 300 receives the control signal CONT2 and the image data R ' G ' B '. The data driver 300 converts the image data R ' G ' B ' into data voltages and applies the data voltages to the data lines DL1 to DLm.

The second control signals CONT2 include a horizontal start signal for starting the operation of the data driver 300, an inversion signal for inverting the polarity of the data voltages, and an output instruction signal for determining the output timing of the data voltages from the data driver 300.

The backlight unit BLU supplies light to the liquid crystal display panel DP in response to the third control signal CONT 3. The backlight unit BLU includes a light emitting device for emitting light. The backlight unit BLU may be an edge illumination type or a direct illumination type. The edge-illumination type backlight unit includes a light guide member, and the direct-illumination type backlight unit does not include a light guide member. Each of the edge illumination type backlight unit BLU and the direct illumination type backlight unit BLU may include an optical film. For example, the backlight unit BLU may be an edge illumination type and further include an optical film. In another example, the backlight unit BLU may be a direct illumination type and further include an optical film.

Turning to fig. 2, a liquid crystal display panel DP including a first display substrate DS1 and a second display substrate DS2 is shown. The first display substrate DS1 and the second display substrate DS2 are spaced apart from each other in a thickness direction DR3 (hereinafter, referred to as a third direction) of the liquid crystal display panel DP. For example, the first display substrate DS1 and the second display substrate DS2 are spaced apart from each other by a predetermined distance. The first display substrate DS1 and the second display substrate DS2 are coupled to each other by a sealant (not shown) disposed on an edge of the first display substrate DS1 or the second display substrate DS 2. For example, in one embodiment, the sealant is disposed on an edge of the first display substrate DS 1. In another embodiment, the sealant is disposed on the edge of the second display substrate DS 2. In the example of fig. 2, the liquid crystal layer LL is disposed between the first display substrate DS1 and the second display substrate DS 2.

The liquid crystal display panel DP includes a plurality of transmission areas TA and a light-shielding area LSA disposed adjacent to the transmission areas TA. For example, in each pixel, the light-shielding area LSA may surround the transmission area TA. The transmission area TA transmits light generated by the backlight unit BLU and the light blocking area LSA blocks light generated by the backlight unit BLU.

The gate lines GL1 to GLn and the data lines DL1 to DLm shown in fig. 1 are disposed on the first display substrate DS1 and the second display substrate DS 2. The gate lines GL1 to GLn and the data lines DL1 to DLm are arranged such that they overlap the light-shielding area LSA. The pixels PX11 to PXnm are arranged to correspond to the transmission areas TA, respectively. For example, each transmission area TA corresponds to one of the pixels PX11 to PXnm. Each of the pixels PX11 to PXnm may partially overlap a corresponding transmission area of the transmission area TA.

Fig. 3 is a plan view illustrating a pixel according to an example embodiment of the present disclosure, and fig. 4 is a cross-sectional view of a display panel according to an example embodiment of the present disclosure. Fig. 3 shows pixels PXij operating in PLS mode, but the configuration of pixels PXij should not be limited thereto or so, and the embodiments or techniques discussed herein may be applied or extended to pixels having other configurations. Fig. 4 shows a cross-sectional view taken along the line I-I' shown in fig. 3.

Turning to fig. 3 and 4, the first display substrate DS1 includes a first base substrate SUB1, a gate line GLi, a data line DLj, a common line CLi, and a plurality of insulating

layers

10, 20, 30, 40, and 50. The second display substrate DS2 includes a second base substrate SUB2, a black matrix BM, and a color filter CF.

As shown in fig. 4, the second display substrate DS2 is disposed above the first display substrate DS1, but it should not be limited thereto or thereby. For example, in another embodiment, the first display substrate DS1 may be disposed above the second display substrate DS 2.

The pixels PXij are arranged between the first base substrate SUB1 and the second base substrate SUB 2. As shown in fig. 3 and 4, the pixels PXij are arranged on the first base substrate DS 1. The pixel PXij includes a thin film transistor TFT, a common electrode CE, and a pixel electrode PE.

The first polarizer PL1 and the second polarizer PL2 are arranged to be spaced apart from each other such that the pixels PXij are arranged therebetween. At least one of the first polarizer PL1 and the second polarizer PL2 includes a plurality of optical conversion layers arranged on layers different from each other. For example, each of the plurality of optical conversion layers may be sequentially arranged in the thickness direction, and one or more insulating layers may be interposed between the plurality of optical conversion layers. Each optical conversion layer polarizes light incident thereto.

In the example of fig. 4, the first polarizer PL1 includes a first optical conversion layer LCL1 and a second optical conversion layer LCL 2. The second optical conversion layer LCL2 is disposed on the first optical conversion layer LCL 1. For example, the distance between the first optical conversion layer LCL1 and the liquid crystal layer LL is greater than the distance between the second optical conversion layer LCL2 and the liquid crystal layer LL. Each of the first optical conversion layer LCL1 and the second optical conversion layer LCL2 includes a plurality of lattice patterns (not shown) for polarizing light incident thereto. Although the term "lattice pattern" is used herein to describe the single strip (strip) shown in fig. 7A and 7B, embodiments of the present disclosure are not limited thereto or thereby, and the term may also include lattice wiring, or any other term suitable for describing similar elements of a polarizing film.

The first optical conversion layer LCL1 or the second optical conversion layer LCL2 includes a reflection part and a polarization part. The reflective portion reflects incident light. The polarizing portion polarizes incident light and substantially corresponds to the lattice pattern. In the example of fig. 4, the second optical conversion layer LCL2 comprises a reflective portion RP and a polarizing portion PP.

In the present example embodiment, the first polarizer PL1 may further include a third optical conversion layer. In addition, the first optical conversion layer may include a reflection part RP and a polarization part PP.

The second polarizer PL2 of the liquid crystal display panel DP according to the present example embodiment may be, but is not limited to, a stretched-type polarizing film. The stretched polarizing film includes a polyvinyl alcohol-based polarizer. The iodine-based compound or the dichroic polarizing material is absorbed into the polyvinyl alcohol-based polarizer, and the polyvinyl alcohol-based polarizer is stretched in one direction. The stretched polarizing film may further include a triacetyl cellulose protective film that protects the polarizer.

Each of the first polarizer PL1 and the second polarizer PL2 has an optical axis, e.g., a transmission axis. The optical axis of the first polarizer PL1 is substantially perpendicular or substantially parallel to the optical axis of the second polarizer PL 2. In one example embodiment, second polarizer PL2 may include a plurality of optical conversion layers.

Hereinafter, the first polarizer PL1 and the pixels PXij will be described in detail. According to the present example embodiment, the first polarizer PL1 and the pixels PXij are arranged on one surface of the first base substrate SUB 1. For example, in the example of fig. 4, the first polarizer PL1 and the pixels PXij are both arranged on the upper surface of the first base substrate SUB1 (e.g., facing the liquid crystal layer LL).

The first base substrate SUB1 may be a transparent substrate. For example, the first base substrate SUB1 may be a glass substrate, a plastic substrate, a silicon substrate, or the like. In the example of fig. 4, the first optical conversion layer LCL1 is disposed on the surface of the first base substrate SUB1, and the first insulating layer 10 is disposed on the first optical conversion layer LCL 1. The buffer layer may be disposed between the surface of the first base substrate SUB1 and the first optical conversion layer LCL 1.

The first insulating layer 10 has a refractive index of less than or equal to about 1.5. In addition, the first insulating layer 10 has a thickness of less than or equal to about 300 nm. This is to minimize the polarization of the light exiting from the first optical conversion layer LCL1 until the light reaches the second optical conversion layer LCL 2.

In one embodiment, the first insulating layer 10 includes an organic material. In another embodiment, the first insulating layer 10 includes an inorganic material. The first insulating layer 10 may have a multi-layer structure. The first insulating layer 10 may include a silicon inorganic material. The silicon inorganic material may be at least one of silicon oxide and silicon nitride.

In the example of fig. 4, a second optical conversion layer LCL2 is arranged on the first insulating layer 10. The reflection portion RP of the second optical conversion layer LCL2 overlaps the light-shielding area LSA, and the polarization portion PP of the second optical conversion layer LCL2 overlaps the transmission area TA. The reflection portion RP covers the light-shielding area LSA. For example, in one embodiment, the reflective portion RP has substantially the same shape as the light-shielding area LSA.

The second insulating layer 20 is disposed on the second optical conversion layer LCL 2. The second insulating layer 20 may have the same layered structure and/or the same material as those of the first insulating layer 10. The gate line GLi and the common line CLi are disposed on the second insulating layer 20.

The gate electrode GE of the thin film transistor TFT branches from the gate line GLi. For example, the gate electrode GE is electrically connected to the gate line GLi. The gate electrode GE includes the same material and has the same layered structure as the gate line GLi. The gate electrode GE and the gate line GLi may include copper (Cu), aluminum (Al), or an alloy thereof. The gate electrode GE and the gate line GLi may have a multi-layer structure of an aluminum layer and another metal layer. The common line CLi includes the same material and has the same layered structure as the gate line GLi.

A third insulating layer 30 is disposed on the second insulating layer 20 and covers the gate line GLi and the common line CLi. For example, the third insulating layer 30 is disposed directly on the gate line GLi and the common line CLi. In one embodiment, the third insulating layer 30 includes an organic material. In another embodiment, the third insulating layer 30 includes an inorganic material. The third insulating layer 30 may have a multi-layer structure.

The semiconductor layer AL is disposed on the third insulating layer 30 to overlap the gate electrode GE. An ohmic contact layer (not shown) may be further disposed on the third insulating layer 30. The data line DLj is disposed on the third insulating layer 30.

The data line DLj may include copper (Cu), aluminum (Al), or an alloy thereof. The data line DLj may have a multi-layered structure of an aluminum layer and another metal layer (e.g., chromium or molybdenum). The source electrode SE of the thin film transistor TFT branches from the data line DLj. For example, the source electrode SE may be electrically connected to the data line DLj. The source electrode SE includes the same material and has the same layered structure as the data line DLj.

The drain electrode DE is disposed on the third insulating layer 30 and spaced apart from the source electrode SE. The source electrode SE and the drain electrode DE overlap the semiconductor layer AL.

The fourth insulating layer 40 is disposed on the third insulating layer 30 and covers the source electrode SE, the drain electrode DE, and the data line DLj. For example, the fourth insulating layer 40 is disposed directly on the source electrode SE, the drain electrode DE, and the data line DLj. The fourth insulating layer 40 provides a flat surface. The common electrode CE is disposed on the fourth insulating layer 40. The common electrode CE is connected to the common line CLi through a first contact hole CH1, and a first contact hole CH1 is formed through the third insulating layer 30 and the fourth insulating layer 40. In one example embodiment, the common electrode CE may be disposed on the second base substrate SUB2 according to an operation mode of the pixels PXij.

The fifth insulating layer 50 is disposed on the fourth insulating layer 40 and covers the common electrode CE. For example, the fifth insulating layer 50 is disposed directly on the common electrode CE. The pixel electrode PE is disposed on the fifth insulating layer 50 and overlaps the common electrode CE. The pixel electrode PE is connected to the drain electrode DE through a second contact hole CH2, and a second contact hole CH2 is formed through the fourth insulating layer 40 and the fifth insulating layer 50. A protective layer protecting the pixel electrode PE and the alignment layer may be further disposed on the fifth insulating layer 50.

The pixel electrode PE includes a plurality of slits SLT. In the example of fig. 3, the pixel electrode PE includes a first horizontal portion P1, a second horizontal portion P2 spaced apart from the first horizontal portion P1, and a plurality of vertical portions P3 connecting the first and second horizontal portions P1 and P2. The slit SLT is disposed between the vertical portions P3. However, the shape of the pixel electrode PE should not be limited thereto or restricted thereby. For example, in another embodiment, the slit SLT may be formed in the common electrode CE instead of the pixel electrode PE.

The thin film transistor TFT outputs a data voltage applied to the data line DLj in response to a gate signal applied to the gate line GLi. The common electrode CE receives a common voltage and the pixel electrode PE receives a pixel voltage corresponding to a data voltage. The common electrode CE and the pixel electrode PE form a horizontal electric field. The horizontal electric field may cause the alignment of the director (director) in the liquid crystal layer LL to change.

The second base substrate SUB2 may be a transparent substrate, for example, a glass substrate, a plastic substrate, a silicon substrate, or the like. In the example of fig. 4, the color filter CF and the black matrix BM are disposed on the second base substrate SUB 2.

The color filter CF overlaps at least the transmissive area TA. When viewed in a plan view, the color filter CF covers the transmission area TA and partially overlaps the light-shielding area LSA. The color filter CF may include red, green or blue. In fig. 4, one color filter CF corresponding to the pixel PXij has been shown, but the liquid crystal display panel DP includes a plurality of color filter groups having colors different from each other, wherein each of the pixels PX11 to PXnm belongs to one of the plurality of color filter groups.

The black matrix BM overlaps the light-shielding area LSA. The light-shielding area LSA may be referred to as an area in which the black matrix BM is arranged, and the transmission area TA may be referred to as an area in which the black matrix BM is not arranged.

The light-shielded area LSA has a size determined based on the shape of the black matrix BM. As shown in fig. 3 and 4, the thin film transistor TFT may overlap the light-shielding area LSA, but it should not be limited thereto or thus limited. For example, the thin film transistor TFT may overlap the transmissive area TA.

Fig. 5 is an enlarged view showing a portion marked AA in fig. 4. Fig. 6 is an enlarged view illustrating the lattice pattern shown in fig. 5. Fig. 7A and 7B are plan views illustrating first and second optical conversion layers according to example embodiments of the present disclosure. Fig. 7A and 7B further show regions in which the first optical conversion layer and the second optical conversion layer overlap the pixels PXij, respectively. Fig. 8 is a view showing an arrangement of the first lattice pattern and the second lattice pattern.

Turning to fig. 5, the first polarizer PL1 includes a first optical conversion layer LCL1 and a second optical conversion layer LCL 2. The first optical conversion layer LCL1 includes a plurality of first lattice patterns WG1 and the second optical conversion layer LCL2 includes a reflection portion RP and a polarization portion PP. The polarizing portion PP includes a plurality of second lattice patterns WG 2.

Fig. 6 shows two lattice patterns WG arranged on the first base substrate SUB 1. The two lattice patterns WG may be a part of the first lattice pattern WG1 or a part of the second lattice pattern WG 2.

Each of the lattice patterns WG has a predetermined height H10. In one embodiment, each of the lattice patterns WG has the same height. In another embodiment, the lattice patterns WG have different heights compared to each other. In one embodiment, height H10 ranges from about 50nm to about 150 nm.

Each of the lattice patterns WG has a predetermined width W10. The lattice patterns WG are spaced apart from each other by a predetermined distance L10. The sum of width W10 and distance L10 is referred to as the pitch PT. In one embodiment, the pitch PT ranges from about 100nm to about 150 nm. The ratio of the distance L10 to the spacing PT may range from about 0.3:1 to about 0.6: 1.

Each of the lattice patterns WG includes a metal layer ML and a metal oxide layer MOL surrounding the metal layer ML. In one embodiment, the metal layer ML includes aluminum and the metal oxide layer MOL includes aluminum oxide.

The lattice pattern WG is formed by an imprinting method, and the metal oxide layer MOL is formed at the same time as the lattice pattern WG is formed. The metal oxide layer MOL is formed by oxidizing the surface of the imprinted metal layer ML. The metal oxide layer MOL has a thickness of about a few nanometers. For example, the metal oxide layer may have a thickness of about 1nm, about 2nm, about 3nm, about 4nm, about 5nm, about 6nm, about 7nm, about 8nm, or about 9 nm.

Fig. 6 shows lattice patterns WG each having a rectangular shape in a cross-sectional view, but the lattice patterns WG should not be limited to the rectangular shape. For example, in another embodiment, each lattice pattern WG may have a square shape or a trapezoidal shape.

Turning to fig. 7A and 7B, the first lattice pattern WG1 extends in the same direction as the second lattice pattern WG 2. Fig. 7A and 7B show the first and second lattice patterns WG1 and WG2 extending in the second direction DR 2. The direction in which the first and second lattice patterns WG1 and WG2 extend does not necessarily match the direction in which the data lines DL1 to DLm extend.

As shown in fig. 7B, the second lattice pattern WG2 is spaced apart from the reflection portion RP. The second lattice pattern WG2 is separated from the reflective portion RP along the borderline of the transmission area TA and the light-shielding area LSA.

The first lattice pattern WG1 may be substantially parallel to the second lattice pattern WG 2. The term "parallel" as used herein means that the angle θ (e.g., the smaller of two angles) between the first and second lattice patterns WG1 and WG2 as shown in FIG. 8 is less than or equal to about 0.1 degrees.

Turning back to fig. 5, the portion of the first lattice pattern WG1 corresponding to the portion of the second lattice pattern WG2 completely overlaps with the corresponding pattern of the second lattice pattern WG 2. For example, the first lattice patterns WG1 having the corresponding second lattice patterns WG2 may completely overlap with the corresponding second lattice patterns WG2, respectively. The corresponding first and second lattice patterns WG1 and WG2 may have the same pitch PT, the same width W10, and the same height H10.

In another exemplary embodiment, the first lattice pattern WG1 may have a different pitch PT, height H10, and width W10 than those of the second lattice pattern WG 2. The pitch PT, height H10, and width W10 of each first lattice pattern WG1 and each second lattice pattern WG2 are within the ranges described in fig. 6.

As shown in fig. 5, the light BL1 and BL2 generated by the backlight unit BLU is incident to the first optical conversion layer LCL 1. Among the light BL1 and BL2 generated by the backlight unit BLU, light vibrating in the second direction DR2 in which the first lattice patterns WG1 extend is reflected and light vibrating in the first direction DR1 in which the first lattice patterns WG1 are arranged is transmitted.

Among the light BL1 and BL2 generated by the backlight unit BLU, the light BL1 is polarized by the first optical conversion layer LCL1 and is incident to the polarized portion PP of the second optical conversion layer LCL 2. The light BL2 is polarized by the first optical conversion layer LCL1 and is incident on the reflection portion RP of the second optical conversion layer LCL 2.

The light incident to the polarization part PP propagates through the second optical conversion layer LCL2 while maintaining the polarization of the light when the light passes through the first optical conversion layer LCL 1. When the ratio of the distance L10 to the pitch PT of the first lattice pattern WG1 and the ratio of the distance L10 to the pitch PT of the second lattice pattern WG2 are the same, the polarization of light may be maintained without reducing the transmittance of light.

The light incident to the reflection portion RP is reflected to the backlight unit BLU. The light reflected to the backlight unit BLU is reflected again by an optical member (not shown) included in the backlight unit BLU. The re-reflected light may be incident to the polarizing portion PP. For example, the light reflected again is incident on the pixel PXij (refer to fig. 3). Due to the above-described function of the reflection portion RP, light generated by the backlight unit BLU is supplied to the pixels PXij without being absorbed by other components. As described above, since the light reflected by the reflection portion RP is supplied back to the pixel PXij, the light emission efficiency of the liquid crystal display device is improved.

Fig. 9 is an SEM image showing a damaged optical conversion layer, and fig. 10 is a bar graph showing an extinction ratio according to the structure of the optical conversion layer and a damaged lattice pattern. For example, the extinction ratio may refer to the ratio of the transmittance of the undesired component to the desired component. In fig. 10, a first histogram GP1 shows the extinction ratio of a polarizer including an optical conversion layer having an undamaged single-layer structure, a second histogram GP2 shows the extinction ratio of a polarizer including an optical conversion layer having a damaged single-layer structure, a third histogram GP3 shows the extinction ratio of a polarizer including a damaged optical conversion layer and another undamaged optical conversion layer, and a fourth histogram GP4 shows the extinction ratio of a polarizer including two undamaged optical conversion layers.

As shown in fig. 9, the first and second lattice patterns WG1 and WG2 may be partially damaged during the manufacturing process. The lattice pattern may not be completely imprinted during the imprinting process and portions of the lattice pattern may be attached to the printing device when the printing device is separated. Therefore, portions of the lattice pattern are damaged as indicated by the dotted circles.

Since the first and second lattice patterns WG1 and WG2 optically compensate each other, the polarizer according to the present example embodiment may provide normally polarized light to the pixels PXij even if portions of the first and second lattice patterns WG1 and WG2 are damaged. For example, although portions of the first lattice patterns WG1 are damaged in the example of fig. 9, the undamaged second lattice patterns WG2 polarize light incident to the polarizer.

As represented by the second column diagram GP2 shown in fig. 10, when the optical conversion layer having a single-layer structure is damaged, the polarizer has an extinction ratio smaller than a reference value. For example, the reference value is represented by the extinction ratio of the first histogram GP 1. In one embodiment, a polarizer is considered defective or inferior if it has an extinction ratio that is less than a reference value.

As indicated by the third bar graph GP3, although one of the optical conversion layers is damaged, the polarizer has an extinction ratio greater than a reference value because the extinction ratio is compensated by the other optical conversion layer. As indicated by the fourth histogram GP4, the polarizer has a relatively high extinction ratio when neither of the optical conversion layers is damaged.

Fig. 11 is a cross-sectional view illustrating a direction in which light provided to a first polarizer travels according to an example embodiment of the present disclosure. Fig. 12 is a plan view of a second optical conversion layer according to an example embodiment of the present disclosure. Fig. 11 corresponds to fig. 5, and fig. 12 corresponds to fig. 7B. Hereinafter, the liquid crystal display panel will be described in detail with reference to fig. 11 and 12. In fig. 11 and 12, the same reference numerals denote the same elements in fig. 1 to 10, and thus detailed descriptions of the same elements will be omitted.

Turning to fig. 11, the first polarizer PL1 includes a first optical conversion layer LCL1 and a second optical conversion layer LCL 2. The first and second lattice patterns WG1 and WG2 have the same pitch PT, height H10, and width W10. The width W10 of the first lattice pattern WG1 may be the same as the distance L10 of the first lattice pattern WG 1. The width W10 of the second lattice pattern WG2 may be the same as the distance L10 of the second lattice pattern WG 2. In this case, the first lattice pattern WG1 may have the same width W10 as that of the second lattice pattern WG 2.

In the example of fig. 11, the first lattice pattern WG1 does not overlap with the second lattice pattern WG 2. The first lattice patterns WG1 are alternately arranged with respect to the second lattice patterns WG 2. Although the first lattice patterns WG1 do not overlap with the second lattice patterns WG2, light passing through the first polarizer PL1 may have the same polarization as that of light passing through the first polarizer PL1 shown in fig. 5.

In another exemplary embodiment, corresponding patterns between the first and second lattice patterns WG1 and WG2 partially overlap each other. In this case, the light passing through the first polarizer PL1 may have the same polarization as that of the light passing through the first polarizer PL1 shown in fig. 5.

Turning to fig. 12, the second optical conversion layer LCL2 includes a reflection portion RP and a polarization portion PP connected to each other. Both end portions of the second lattice pattern WG2 are connected to the reflection portions RP, respectively. The reflection portion RP and the polarization portion PP are integrally formed as a single body and a single unit. The reflection portion RP and the polarization portion PP integrally formed as a single body and a single cell are formed by patterning the slit SLT 10.

Fig. 13A to 13E are sectional views illustrating a liquid crystal display panel according to an example embodiment of the present disclosure. Fig. 13A to 13E correspond to fig. 4. In fig. 13A to 13E, the same reference numerals denote the same elements in fig. 1 to 10, and thus detailed descriptions of the same elements will be omitted.

Turning to fig. 13A, the first polarizer PL10 of the liquid crystal display panel includes a first optical conversion layer LCL10 and a second optical conversion layer LCL 20. A first optical conversion layer LCL10 and a second optical conversion layer LCL20 are arranged on the surface of the first base substrate SUB 1. As shown in FIG. 13A, the first and second optical conversion layers LCL10 and LCL20 may be arranged in different layers.

In the example of fig. 13A, the second optical conversion layer LCL20 is disposed on the first optical conversion layer LCL 10. The first optical conversion layer LCL10 comprises a reflective part RP and a polarizing part PP. The first and second optical conversion layers LCL10 and LCL20 shown in fig. 13A correspond to the second and first optical conversion layers LCL2 and LCL1 shown in fig. 4, respectively.

The liquid crystal display panel according to the present example embodiment may polarize light incident to the first polarizer PL10 even though one of the first and second optical conversion layers LCL10 and LCL20 may be damaged. In addition, the reflection portion RP of the first optical conversion layer LCL10 reflects light without absorbing light. The light reflected by the reflection portion RP is incident to the liquid crystal display panel. Therefore, the amount of light consumed (e.g., absorbed by other elements) is reduced and the amount of light incident to the liquid crystal display panel is increased, thereby improving light emission efficiency.

Turning to FIG. 13B, the first polarizer PL10-1 of the liquid crystal display panel includes a first optical conversion layer LCL10-1 and a second optical conversion layer LCL 20-1. The first and second optical conversion layers LCL10-1 and LCL20-1 correspond to the first and second optical conversion layers LCL1 and LCL2 illustrated in fig. 4, respectively.

In the example of fig. 13B, a first optical conversion layer LCL10-1 is disposed on the lower surface of the first base substrate SUB1 and a second optical conversion layer LCL20-1 is disposed on the upper surface of the first base substrate SUB 1. The first base substrate SUB1 has the same function as that of the first insulating layer 10 shown in fig. 4. The positions of the first and second optical conversion layers LCL10-1 and LCL20-1 may be changed with respect to each other. Although not shown in the drawings, an insulating layer or a protective layer may be further disposed on the lower surface of the first base substrate SUB1 to protect the first optical conversion layer LCL 10-1.

Turning to FIG. 13C, the first polarizer PL10-2 of the liquid crystal display panel includes two first optical conversion layers LCL10-2 and LCL10-20 and one second optical conversion layer LCL 20-2. The two first optical conversion layers LCL10-2 and LCL10-20 shown in FIG. 13C correspond to the first optical conversion layer LCL1 shown in FIG. 4. The second optical conversion layer LCL20-2 corresponds to the second optical conversion layer LCL2 shown in fig. 4. As shown in fig. 13C, the second optical conversion layer LCL20-2 includes a reflection portion RP and a polarization portion PP.

A first optical conversion layer LCL10-2, a second optical conversion layer LCL20-2, and a first optical conversion layer LCL10-20 (hereinafter, referred to as a third optical conversion layer) are sequentially stacked on an upper surface of the first base substrate SUB 1. The first insulating layer 10 disposed between the first and second optical conversion layers LCL10-2 and LCL20-2 and the first insulating layer 10' disposed between the second and third optical conversion layers LCL20-2 and LCL10-20 may be made of the same material. The stacking order of the first, second, and third optical conversion layers LCL10-2, LCL20-2, and LCL10-20 is not limited to the above-described stacking order, and the optical conversion layers may be arranged in any other order.

The first polarizer PL10-2 employing the third optical conversion layer LCL10-20 has improved polarization because the other conversion layers polarize light even when one of the optical conversion layers is damaged.

In another example embodiment, the polarizer may include one first optical conversion layer and two second optical conversion layers. In still another exemplary embodiment, the three optical conversion layers may be the same as the first optical conversion layer LCL1 or the second optical conversion layer LCL 2.

Turning to fig. 13D, the second polarizer PL20 of the liquid crystal display panel includes a third optical conversion layer LCL3 and a fourth optical conversion layer LCL 4. The third and fourth optical conversion layers LCL3 and LCL4 shown in fig. 13D correspond to the first optical conversion layer LCL1 shown in fig. 4. According to the present example embodiment, the second polarizer (which is a stretched polarizing film) shown in fig. 4 is replaced with a polarizer including a plurality of optical conversion layers.

The third optical conversion layer LCL3 is disposed on the upper surface of the second base substrate SUB2 and the sixth insulating layer 60 is disposed on the third optical conversion layer LCL 3. The sixth insulating layer 60 may be the same as the first insulating layer 10 shown in fig. 4. A fourth optical conversion layer LCL4 is disposed on the sixth insulating layer 60. The seventh insulating layer 70 is disposed on the fourth optical conversion layer LCL 4. The seventh insulating layer 70 may be the same as the second insulating layer 20 shown in fig. 4. The protective film PM is disposed on the seventh insulating layer 70 to protect the fourth optical conversion layer LCL 4.

In another example embodiment, at least one of the third and fourth optical conversion layers LCL3 and LCL4 is disposed on a lower surface of the second base substrate SUB 2. At least one of the third optical conversion layer LCL3 and the fourth optical conversion layer LCL4 may be the same as the second optical conversion layer LCL2 illustrated in fig. 4. In addition, the second polarizer PL20 may include three or more optical conversion layers.

Turning to FIG. 13E, the first polarizer PL10-3 of the liquid crystal display panel includes a first optical conversion layer LCL10-3 and a second optical conversion layer LCL 10-30. The second polarizer PL20 includes a third optical conversion layer LCL3 and a fourth optical conversion layer LCL 4. The first, second, third and fourth optical conversion layers LCL10-3, LCL10-30, LCL3 and LCL4 correspond to the first optical conversion layer LCL1 shown in FIG. 4.

Fig. 14A to 14I are perspective views illustrating a method of manufacturing a polarizer according to an example embodiment of the present disclosure. Fig. 14A to 14I illustrate a method of manufacturing the first polarizer described with reference to fig. 4 to 7B.

Turning to fig. 14A, a first metal layer ML1 is formed on a base substrate SUB. The first sacrificial layer SL1 is formed on the first metal layer ML 1. The first mask layer MP1 is disposed on the first sacrificial layer SL 1.

The base substrate SUB may be the first base substrate SUB1 (refer to fig. 4) or a buffer layer disposed on the first base substrate SUB 1. The metal layer ML1 is formed by a sputtering method and includes aluminum. The first sacrificial layer SL1 is formed by a deposition method and includes an inorganic material. The first mask layer MP1 includes a mask pattern through which a plurality of slits MP1-SLT are formed. The first mask layer MP is formed by an imprinting method and includes a resin.

In fig. 14B, the first sacrificial layer SL1 is patterned. The portion of the first sacrificial layer SL1 exposed through the first mask layer MP1 is removed by using a dry etching process. Therefore, the slits SL1-SLT are formed in the first sacrificial layer SL 1.

In fig. 14C, the first metal layer ML1 is patterned. The portion of the first metal layer ML1 exposed through the slits SL1-SLT of the first sacrificial layer SL1 is removed by using a dry etching process. The patterned first metal layer ML1 forms a first lattice pattern WG1 (refer to fig. 7A).

In fig. 14D, the first sacrificial layer SL1 and the first mask layer ML1 are removed and a first insulating layer IL1 is formed on the first lattice pattern WG 1. The first insulating layer IL1 corresponds to the first insulating layer 10 shown in fig. 4. The first insulating layer IL1 provides a flat surface on the first lattice pattern WG 1. The first insulation layer IL1 may be filled in the slits SL1-SLT between the first lattice patterns WG 1.

In fig. 14E, a second metal layer ML2, a second sacrificial layer SL2, and a second mask layer MP2 are formed on the first insulating layer IL 1. The second mask layer MP2 includes a mask pattern in which a plurality of slits MP2-SLT are defined.

In fig. 14F, the second sacrificial layer SL2 is patterned. Slits SL2-SLT are formed in the second sacrificial layer SL2 in the same manner as described in fig. 14B.

In fig. 14G, a protective layer PR is formed on the second mask layer MP2 to partially cover the second mask layer MP 2. The protective layer PR protects portions of the second metal layer ML2 from being etched in the following process. The protective layer PR overlaps with an area in which the reflection portion RP shown in fig. 7 is arranged.

In fig. 14H, the second metal layer ML2 exposed through the protection layer PR is patterned. The portion of the second metal layer ML2 exposed through the slits SL2-SLT of the second sacrificial layer SL2 is removed by using a dry etching process. The patterned second metal layer ML2 forms second lattice patterns WG2 (refer to fig. 7B) and reflection portions RP (refer to fig. 7B).

In fig. 14I, a second insulating layer IL2 is formed on the patterned second metal layer ML 2. The second insulating layer IL2 corresponds to the second insulating layer 20 shown in fig. 4. Subsequently, the thin film transistor TFT, the common electrode CE, and the pixel electrode PE are formed.

In another exemplary embodiment, when the process described with reference to fig. 14A to 14D is performed again on the second insulating layer IL2, an additional polarizer may be formed. In another example embodiment, when the process described with reference to fig. 14A to 14D and the process described with reference to fig. 14E to 14I are changed with respect to each other, the layered structure of the polarizer may be changed.

Although exemplary embodiments of the present invention have been described, it is understood that the present invention should not be limited to these exemplary embodiments but various changes and modifications can be made by one skilled in the art within the spirit and scope of the present invention as defined by the appended claims.

Claims

1. A display device, comprising:

a first base substrate including a plurality of light-transmitting regions and a light-shielding region surrounding each of the light-transmitting regions;

a second base substrate disposed to be spaced apart from the first base substrate;

a plurality of pixels arranged between the first base substrate and the second base substrate and respectively overlapping the light-transmitting regions when viewed in a direction perpendicular to a main surface of the first base substrate;

a plurality of color filters overlapping the light-transmitting area when viewed in a direction perpendicular to the main surface of the first base substrate; and

a first polarizer and a second polarizer spaced apart from each other such that the pixels are disposed therebetween, wherein the first polarizer includes a plurality of optical conversion layers disposed on layers different from each other, each of the optical conversion layers including a plurality of lattice-shaped wirings,

wherein the plurality of optical conversion layers include: a first optical conversion layer including first lattice-shaped wirings; and a second optical conversion layer including second lattice-shaped wirings, wherein the second lattice-shaped wirings are substantially parallel to the first lattice-shaped wirings, and

wherein when a sum of a distance between two adjacent lattice-shaped wirings in a direction in which the first lattice-shaped wirings are arranged and a width of one of the two adjacent lattice-shaped wirings in the direction is defined as a pitch, the second lattice-shaped wirings have the same pitch as the first lattice-shaped wirings and the second lattice-shaped wirings have the same width as the first lattice-shaped wirings,

wherein a portion of the first lattice-shaped wirings corresponding to a portion of the second lattice-shaped wirings completely overlaps with the portion of the second lattice-shaped wirings, and

wherein at least one of the first optical conversion layer and the second optical conversion layer comprises:

a polarizing portion including respective lattice-shaped wirings of the first and second lattice-shaped wirings and overlapping the light-transmitting region when viewed in a direction perpendicular to the main surface of the first base substrate; and

a reflective portion covering the light-shielding region.

2. The display device according to claim 1, wherein the first optical conversion layer and the second optical conversion layer are arranged over the first base substrate.

3. The display device according to claim 2, wherein the first optical conversion layer and the second optical conversion layer are arranged such that the first base substrate is arranged between the first optical conversion layer and the second optical conversion layer.

4. The display device according to claim 2, wherein the first optical conversion layer and the second optical conversion layer are arranged on the same side of the first base substrate.

5. The display device according to claim 4, wherein the first optical conversion layer and the second optical conversion layer are arranged between a surface of the first base substrate and the pixel.

6. The display device according to claim 1, wherein the first optical conversion layer includes the reflection portion and the polarization portion including the first lattice-shaped wirings, and wherein the second optical conversion layer includes the polarization portion including the second lattice-shaped wirings.

7. The display device according to claim 1, wherein each of the pixels comprises:

thin film transistors connected to respective gate lines of the gate lines disposed over the first base substrate and respective data lines of the data lines disposed over the first base substrate; and

and a pixel electrode connected to the thin film transistor.

8. The display device according to claim 7, wherein the polarized portion overlaps with the pixel electrode and the reflective portion overlaps with the thin film transistor when viewed in a direction perpendicular to the main surface of the first base substrate.

9. The display device according to claim 1, wherein each of the first and second lattice-shaped wirings has a height of 50nm to 150 nm.

10. The display device according to claim 1, wherein a ratio of the width of the one lattice-shaped wiring in the direction to the pitch is in a range from 0.3:1 to 0.6: 1.

11. The display device according to claim 1, wherein each of the plurality of lattice-like wirings comprises a metal layer and a metal oxide layer covering the metal layer.

12. The display device according to claim 1, wherein the plurality of optical conversion layers further include a third optical conversion layer including third lattice-shaped wirings that extend in the same direction as the first lattice-shaped wirings and are arranged in the same direction as the first lattice-shaped wirings.

13. The display device according to claim 1, wherein the second polarizer is a stretched polarizing film.

14. The display device according to claim 1, wherein the second polarizer comprises:

a third optical conversion layer including third latticed wirings; and

a fourth optical conversion layer including fourth lattice-shaped wirings extending in the same direction as the third lattice-shaped wirings and arranged in the same direction as the third lattice-shaped wirings, and the third optical conversion layer and the fourth optical conversion layer are arranged over the second base substrate.

15. The display device according to claim 1, further comprising:

a black matrix overlapping the light-shielding region when viewed in a direction perpendicular to the main surface of the first base substrate.

16. A display device, comprising:

a plurality of pixels arranged between the first base substrate and the second base substrate and respectively overlapping the light-transmitting regions when viewed in a direction perpendicular to a main surface of the first base substrate; and

a first polarizer and a second polarizer spaced apart from each other such that the pixels are disposed therebetween,

wherein the first polarizer includes a first optical conversion layer including a plurality of first lattice-shaped wirings, a second optical conversion layer including a plurality of second lattice-shaped wirings which extend in the same direction as the plurality of first lattice-shaped wirings and are arranged in the same direction as the plurality of first lattice-shaped wirings, and a third optical conversion layer including a plurality of third lattice-shaped wirings which extend in the same direction as the plurality of first lattice-shaped wirings and are arranged in the same direction as the plurality of first lattice-shaped wirings,

polarizing portions including respective lattice-shaped wirings and overlapping the light-transmitting regions when viewed in a direction perpendicular to the main surface of the first base substrate; and

a reflective portion covering the light-shielding region,

wherein the third optical conversion layer has the same structure as one of the first optical conversion layer and the second optical conversion layer,

wherein a portion of the first lattice-shaped wirings corresponding to a portion of the second lattice-shaped wirings completely overlaps with the portion of the second lattice-shaped wirings.