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CN104659019A - 扇出式封装结构及其形成方法 - Google Patents

扇出式封装结构及其形成方法 Download PDF

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Publication number
CN104659019A
CN104659019A CN201410032176.5A CN201410032176A CN104659019A CN 104659019 A CN104659019 A CN 104659019A CN 201410032176 A CN201410032176 A CN 201410032176A CN 104659019 A CN104659019 A CN 104659019A
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CN
China
Prior art keywords
dielectric layer
opening
conductive pattern
tube core
connecting portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201410032176.5A
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English (en)
Other versions
CN104659019B (zh
Inventor
王卜
施应庆
卢思维
林俊成
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiwan Semiconductor Manufacturing Co TSMC Ltd
Original Assignee
Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Publication of CN104659019A publication Critical patent/CN104659019A/zh
Application granted granted Critical
Publication of CN104659019B publication Critical patent/CN104659019B/zh
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Anticipated expiration legal-status Critical

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Abstract

本发明的一个实施例是一种结构，包括管芯以及至少横向地密封管芯的密封剂，在该管芯的表面上具有焊盘。穿过密封剂露出焊盘。该结构进一步包括位于密封剂和管芯上方的第一介电层、位于第一介电层上方的第一导电图案、以及位于第一导电图案和第一介电层上方的第二介电层。第一介电层和第二介电层对于管芯的焊盘有第一开口。该结构进一步包括位于第二介电层上方和第一开口内的第二导电图案。第二导电图案邻接第一开口内的第一介电层的侧壁和第一开口内的第二介电层的侧壁。本发明还包括扇出式封装结构及其形成方法。

Description

扇出式封装结构及其形成方法
技术领域
本发明总体涉及半导体技术领域，更具体地，涉及扇出式封装结构及其形成方法。
背景技术
半导体器件用于各种电子应用中，诸如，个人电脑、手机、数码相机和其他电子设备。通常在半导体衬底上方依次沉积绝缘层或介电层、导电层、以及半导体层的材料，然后使用光刻图案化各种材料层以在其上形成电路组件和元件，从而制造半导体器件。通常在单个半导体晶圆上制造数十或数百个集成电路。通过沿划线锯切集成电路从而分割单独的管芯。然后以例如多芯片模块或其他类型的封装将单个管芯分别进行封装。
半导体工业通过不断减小最小部件的尺寸以允许将更多的部件集成到给定的区域中，从而提高各种电子部件（例如，晶体管、二极管、电阻器、电容器等）的集成密度。在一些应用中，这些较小的电子部件（比如集成电路管芯）可能也需要比过去的封装件占用更少面积的更小的封装件。
发明内容
为了解决现有技术中存在的问题，根据本发明的一个方面，提供了一种结构，包括：管芯，具有位于表面上的焊盘；密封剂，至少横向地密封所述管芯，穿过所述密封剂露出所述焊盘；第一介电层，位于所述密封剂和所述管芯上方；第一导电图案，位于所述第一介电层上方；第二介电层，位于所述第一导电图案和所述第一介电层上方，所述第一介电层和所述第二介电层对于所述管芯的所述焊盘具有第一开口；以及第二导电图案，位于所述第二介电层上方和所述第一开口内，所述第二导电图案邻接所述第一开口内的所述第一介电层的侧壁和所述第一开口内的所述第二介电层的侧壁。
在上述结构中，其中，所述第一导电图案包括连接部，所述连接部具有第二开口，所述第二开口限定了所述第一介电层内的所述第一开口，所述连接部的侧壁邻接所述第一开口内的所述第二导电图案。
在上述结构中，其中，所述第一导电图案包括连接部，所述连接部具有第二开口，所述第二开口限定了所述第一介电层内的所述第一开口，所述连接部的侧壁邻接所述第一开口内的所述第二导电图案，所述连接部包括具有所述第二开口的环。
在上述结构中，其中，所述第一导电图案包括连接部，所述连接部具有第二开口，所述第二开口限定了所述第一介电层内的所述第一开口，所述连接部的侧壁邻接所述第一开口内的所述第二导电图案，所述连接部包括矩形、三角形、六边形、八边形或者它们的组合。
在上述结构中，其中，所述第一导电图案包括连接部，所述连接部具有第二开口，所述第二开口限定了所述第一介电层内的所述第一开口，所述连接部的侧壁邻接所述第一开口内的所述第二导电图案，所述连接部具有环绕所述第二开口的连续部。
在上述结构中，其中，所述第一导电图案包括连接部，所述连接部具有第二开口，所述第二开口限定了所述第一介电层内的所述第一开口，所述连接部的侧壁邻接所述第一开口内的所述第二导电图案，所述连接部具有围绕所述第二开口的非连续部。
在上述结构中，其中，所述第二导电图案包括晶种层和位于所述晶种层上方的主层。
在上述结构中，进一步包括：外部电连接件，位于所述第二导电图案上；以及支撑材料，位于所述第二介电层和所述第二导电图案上方并且围绕所述外部电连接件的至少一部分。
根据本发明的另一方面，提供了一种结构，包括：封装件，包括：管芯，包括焊盘；密封剂，围绕所述管芯，及电介质多层结构，位于所述管芯和所述密封剂上方，所述电介质多层结构包括位于所述电介质多层结构中的第一导电图案和位于所述电介质多层结构上的第二导电图案，通过所述电介质多层结构限定了到达所述焊盘的第一开口，所述第一导电图案的至少一部分限定了所述第一开口的至少一部分，所述第二导电图案的至少一部分位于所述第一开口内并且邻接所述电介质多层结构的侧壁，所述第一导电图案未沿着所述第一开口内的所述电介质多层结构的侧壁延伸；以及外部电连接件，位于所述封装件上。
根据上述结构，其中，所述第一导电图案包括连接部，所述连接部具有第二开口，所述第二开口限定了所述第一开口的至少一部分，所述连接部的侧壁邻接所述第一开口内的所述第二导电图案。
根据上述结构，其中，所述第一导电图案包括连接部，所述连接部具有第二开口，所述第二开口限定了所述第一开口的至少一部分，所述连接部的侧壁邻接所述第一开口内的所述第二导电图案，所述连接部包括具有所述第二开口的环。
根据上述结构，其中，所述第一导电图案包括连接部，所述连接部具有第二开口，所述第二开口限定了所述第一开口的至少一部分，所述连接部的侧壁邻接所述第一开口内的所述第二导电图案，所述连接部具有环绕所述第二开口的连续部。
根据上述结构，其中，所述第一导电图案和所述第二导电图案中的每一个均包括晶种层和位于所述晶种层上方的主层。
本发明的又一个方面，提供了一种方法，包括：使用密封剂密封管芯，穿过所述密封剂露出所述管芯的焊盘；在所述密封剂和所述管芯上方形成第一介电层；在所述第一介电层上方形成第一导电图案；在所述第一导电图案和所述第一介电层上方形成第二介电层；在形成所述第一导电图案和所述第二介电层以后，形成穿过所述第二介电层和所述第一介电层到达所述焊盘的开口；以及在所述第二介电层上方和所述开口内形成第二导电图案。
根据上述结构，其中，所述第一导电图案包括连接部，当形成穿过所述第一介电层的所述开口时，将所述连接部用作掩模。
根据上述结构，其中，所述第一导电图案包括连接部，所述连接部包括环。
根据上述结构，其中，形成所述开口的步骤包括：对所述第二介电层进行光刻图案化；以及蚀刻所述第一介电层。
根据上述结构，其中，形成所述开口的步骤包括：在所述第二介电层上方形成掩模；以及蚀刻所述第二介电层和所述第一介电层。
根据上述结构，其中，所述开口内的所述第二导电图案邻接所述第一介电层和所述第二介电层的侧壁。
根据上述结构，进一步包括：形成电连接至所述第二导电图案的外部电连接件；以及形成支撑材料，所述支撑材料位于所述第二介电层和所述第二导电图案上方，并且围绕所述外部电连接件的至少一部分。
附图说明
为了更全面地理解本发明的实施例及其优势，现将结合附图所进行的以下描述作为参考，其中：
图1至图8是根据实施例的在第一工艺过程中的结构的各种截面图；
图9和图10是根据实施例的在第二工艺过程中的结构的各种截面图；以及
图11是根据实施例的通孔的展开图。
具体实施方式
下面，详细讨论本发明各实施例的制造和使用。然而，应该理解，本发明提供了许多可以在各种具体环境中实现的可应用的概念。所讨论的具体实施例仅仅示出了制造和使用本发明主题的具体方式，而不仅用于限制不同实施例的范围。
实施例将在具体的环境中进行描述，即，扇出式封装结构。然而，其他实施例也可以应用于其他封装结构。附图和下文的讨论描述了简化的结构，以便于理解各种部件并忽略多余的部件，这样该结构对于本领域的普通技术人员而言也将是显而易见的。附图中相同的参考符号表示相同的部件。虽然方法实施例可以描述为按照特定的顺序实施，但其他实施例也可以以任何合理的顺序来实施。
图1至图8根据实施例示出了在第一工艺过程中结构的各种截面图。图1示出了在工艺过程中具有环绕模塑料30的两个管芯24。每个管芯24均包括诸如铝焊盘的焊盘26、以及位于管芯24的顶面上方的钝化层28。例如，管芯24可以是逻辑集成电路、存储器管芯、模拟管芯或任何其它管芯。管芯24可以包括诸如块状半导体衬底、绝缘体上半导体衬底等的半导体衬底，根据半导体工艺在该半导体衬底上形成诸如晶体管的有源器件和/或诸如电容器、电感器等的无源器件。金属化层可以位于半导体衬底上，并且可以包括将器件电连接在一起和/或将器件电连接至焊盘26的互连结构。
在实例中，管芯24形成为晶圆的一部分。牺牲层可以包括通过涂布、层压、印刷等形成的干膜或湿膜，牺牲层形成于晶圆的每个管芯24的钝化层28及焊盘26上方。可以通过紫外（UV）辐射、烘箱工艺等对牺牲层进行固化。然后分割晶圆以形成单独的管芯24。使用例如拾取和放置工具将管芯24放置于载体衬底20上，并且管芯24通过管芯附着膜22粘附至载体衬底20，管芯附着膜22诸如任何合适的粘合剂，比如UV胶（当其暴露在UV光线下时将失去其粘附性能）、或导线上膜（FOW）材料。
形成至少横向密封管芯24的模塑料30。也可以使用压膜、层压等形成模塑料30。模塑料30可以是环氧基复合物等。可以使用例如温度介于大约120℃和大约330℃之间的热工艺固化模塑料30。模塑料30可以经历研磨工艺从而露出管芯24上方的牺牲层。可以使用溶剂或化学试剂等去除牺牲层。在实例中，使用诸如稀KOH溶液（例如，约3%至约5%的KOH）对牺牲层进行选择性湿蚀刻以去除牺牲层。从而，可以形成图1中所示的结构。
在图2中，第一介电层32形成于管芯24的钝化层28和焊盘26上方并形成于模塑料30上方。第一介电层32可以包括聚苯并恶唑（PBO）、聚酰亚胺、苯并环丁烯（BCB）等或它们的组合。可以通过旋涂工艺、层压工艺等或它们的组合沉积第一介电层32。
在图3中，第一导电层34形成于第一介电层32上。第一导电层34包括各种迹线。插图35是平面图，并且其示出了迹线37连接至直接形成于相应的焊盘26上方的通孔连接部36。通孔连接部36的开口具有宽度38。通孔连接部36示出为环或类环的形状，并且在其它实施例中，通孔连接部36中的开口可以是矩形或类正方形、三角形、六边形、八边形等。另外，通孔连接部36示出为封闭的形状，并且在其它实施例中，通孔连接部36可以为断开或分离的。
在实例中，第一导电层34包括通过诸如化学镀、电镀等的电镀工艺形成的诸如铜、钛等或它们的组合的金属。例如，在第一介电层32上方沉积晶种层。晶种层可以是通过原子层沉积（ALD）、溅射、另一物理汽相沉积（PVD）工艺等沉积的铜、钛、铜和钛的组合（Ti/Cu）等或者它们的组合。通过诸如可接受的光刻技术沉积并图案化光刻胶，以露出用于第一导电层34的所需的图案。通过化学镀、电镀等将诸如铜、铝等或它们的组合的导电材料沉积在晶种层上。通过诸如合适的光刻胶剥离工艺去除光刻胶。通过诸如湿蚀刻或干蚀刻去除剩下的露出的晶种层部分。
在图4中，第二介电层40形成于第一介电层32和第一导电层34上方。第二介电层40可以包括PBO、聚酰亚胺、BCB等或它们的组合。可通过旋涂工艺、层压工艺等或它们的组合来沉积第二介电层40。
在图5中，使用可接受的光刻技术形成穿过第二介电层40到达第一介电层32和/或第一导电层34（诸如到达通孔连接部36）的开口42，诸如包括将第二介电层40上将要形成开口42的部分暴露于光下。
在图6中，形成穿过第一介电层32到达焊盘26的开口44。在实例中，使用蚀刻工艺形成开口44。蚀刻可以是各向异性的，并且可以包括反应离子蚀刻（RIE）、电容耦合等离子体（CCP）刻蚀、感应耦合等离子体（ICP）蚀刻等或它们的组合。在其他实例中，可以使用诸如激光钻孔的其他可接受的方法。第一导电层34（诸如通孔连接部36）可以在去除第一介电层32以形成开口44的过程中用作掩模。
在图7中，第二导电层46形成于第二介电层40上以及开口44内。第二导电层46包括各种迹线和/或用于焊球的接合焊盘。在实例中，第二导电层46包括通过诸如化学镀、电镀等的电镀工艺形成的诸如铜、钛等或它们的组合的金属。例如，晶种层沉积于第二介电层40上方以及开口44内。晶种层可以是通过ALD、溅射、另一PVD工艺等沉积的铜、钛、铜与钛的组合（Ti/Cu）等或它们的组合。通过诸如可接受的光刻技术沉积并图案化光刻胶，以露出用于第二导电层46的所需的图案。通过化学镀、电镀等将诸如铜、铝等或它们的组合的导电材料沉积于晶种层上。通过诸如合适的光刻胶剥离工艺去除光刻胶。通过诸如湿蚀刻或干蚀刻去除剩下的露出的晶种层部分。在开口44内形成连接相应的焊盘26、第一导电层34的通孔连接部36、和第二导电层46的一部分的通孔。
在图8中，焊球48形成于第二导电层46的接合焊盘上。焊球48可以包括诸如无铅焊料的焊料，并且可以使用可接受的焊球下落（ball drop）工艺来形成。支撑材料50可以形成于第二导电层46和第二介电层40上方，并且围绕焊球48的一部分。支撑材料50可以包括能够提供结构支撑的模塑料等。
图9和图10根据实施例示出了在第二工艺过程中的结构的各个截面图。在根据上文讨论的图1到图4之后进行第二工艺。在图9中，具有开口62的掩模层60形成于第二介电层40上方。掩模层60可以包括氮化硅、氮氧化硅、光敏膜（干膜或湿膜）等或它们的组合，并且可以使用化学汽相沉积（CVD）、涂覆、层压等或它们的组合来形成掩模层60。可以使用可接受的光刻和蚀刻工艺，诸如使用RIE、CCP、ICP等或它们的组合形成开口62。在这个实施例中，可以形成初始厚度小于其在第一工艺中厚度的第二介电层40，因为，例如，相比于图6中开口44的形成，当形成开口64时，掩模层60可以防止第二介电层40的厚度损失。
在图10中，使用掩模层60形成穿过第二介电层40和第一介电层32到达焊盘26的开口64。在实例中，使用蚀刻工艺形成穿过第二介电层40和第一介电层32的开口64。蚀刻可以是各向异性的，并且可以包括RIE、CCP、ICP等或它们的组合。在其他实例中，可以使用诸如激光钻孔的其他可接受的方法。第一导电层34（诸如通孔连接部36）可以在去除第一介电层32以形成开口64的过程中用作掩模。可以在形成开口64以后，诸如通过使用对掩模层60的选择性蚀刻来去除掩模层60。然后通过如上文所讨论的图7和图8继续第二工艺。
在第一工艺和第二工艺的每一个中，可以通过诸如将管芯附着膜22暴露于溶剂或UV光线以去除载体衬底20。因此，封装件可以包括如图8中所示的结构，但不包括图8中示出的载体衬底20和管芯附着膜22。
图11示出了根据上述讨论的工艺形成的通孔的展开图。如图所示，第一导电层34包括第一晶种层70和第一主层72，第二导电层46包括第二晶种层74和第二主层76。包括通孔连接部36的第一导电层34沿着第一介电层32的顶面延伸，并且不沿第一介电层32的侧壁延伸。第二导电层46沿第二介电层40的顶面延伸，其邻接第二介电层40、第一导电层34（例如，通孔连接部36）、以及第一介电层32的侧壁，并且第二导电层46邻接焊盘26的顶面。例如，如图11所示，支撑材料50可填充通孔中任何未被填充的部分。
实施例可以实现多种优势。例如，通过仅以一个导电层沿开口的侧壁形成的通孔，可以减小通孔的高宽比。这可以降低通孔的开口尺寸。从而，使管芯上的焊盘可以更小。此外，使用一些实施例可以降低成本。
一个实施例是一种结构，该结构包括管芯以及至少横向地密封管芯的密封剂，在该管芯的表面上具有焊盘。穿过密封剂露出焊盘。该结构进一步包括位于密封剂和管芯上方的第一介电层、位于第一介电层上方的第一导电图案、以及位于第一导电图案和第一介电层上方的第二介电层。第一介电层和第二介电层对于管芯的焊盘有第一开口。该结构进一步包括位于第二介电层上方和第一开口内的第二导电图案。第二导电图案邻接第一开口内的第一介电层的侧壁和第一开口内的第二介电层的侧壁。
另一个实施例是一种结构，该结构包括封装件和位于该封装件上的外部电连接件。封装件包括包含焊盘的管芯，围绕该管芯的密封剂，以及位于该管芯和密封剂上方的电介质多层结构，电介质多层结构包括位于该电介质多层结构中的第一导电图案和位于该电介质多层结构上的第二导电图案。通过该电介质多层结构限定了到达焊盘的第一开口，第一导电图案的至少一部分限定了第一开口的至少一部分。第二导电图案的至少一部分位于第一开口内并且邻接电介质多层结构的侧壁，第一导电图案未沿着第一开口内的电介质多层结构的侧壁延伸。
进一步的实施例是一种方法，该方法包括：使用密封剂密封管芯，穿过密封剂露出管芯的焊盘；在密封剂和管芯上方形成第一介电层；在第一介电层上方形成第一导电图案；在第一导电图案和第一介电层上方形成第二介电层；在形成第一导电图案和第二介电层以后，形成穿过第二介电层和第一介电层到达焊盘的开口；以及在第二介电层上方和开口内形成第二导电图案。
尽管已经详细地描述了实施例及其优势，但应该理解，可以在不背离所附权利要求限定的本发明主旨和范围的情况下，做各种不同的改变，替换和更改。而且，本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、材料组分、手段、方法和步骤的特定实施例。作为本领域普通技术人员应理解，根据本发明，现有的或今后开发的用于执行与根据本发明所采用的所述相应实施例基本相同的功能或获得基本相同结果的工艺、机器、制造、材料组分、手段、方法或步骤本发明均可以使用。相应的，附加的权利要求意指包括例如工艺、机器、制造、材料组分、手段、方法或步骤的范围。

Claims (10)

1.一种结构，包括：
管芯，具有位于表面上的焊盘；
密封剂，至少横向地密封所述管芯，穿过所述密封剂露出所述焊盘；
第一介电层，位于所述密封剂和所述管芯上方；
第一导电图案，位于所述第一介电层上方；
第二介电层，位于所述第一导电图案和所述第一介电层上方，所述第一介电层和所述第二介电层对于所述管芯的所述焊盘具有第一开口；以及
第二导电图案，位于所述第二介电层上方和所述第一开口内，所述第二导电图案邻接所述第一开口内的所述第一介电层的侧壁和所述第一开口内的所述第二介电层的侧壁。
2.根据权利要求1所述的结构，其中，所述第一导电图案包括连接部，所述连接部具有第二开口，所述第二开口限定了所述第一介电层内的所述第一开口，所述连接部的侧壁邻接所述第一开口内的所述第二导电图案。
3.根据权利要求2所述的结构，其中，所述连接部包括具有所述第二开口的环。
4.根据权利要求2所述的结构，其中，所述连接部包括矩形、三角形、六边形、八边形或者它们的组合。
5.根据权利要求2所述的结构，其中，所述连接部具有环绕所述第二开口的连续部。
6.根据权利要求2所述的结构，其中，所述连接部具有围绕所述第二开口的非连续部。
7.根据权利要求1所述的结构，其中，所述第二导电图案包括晶种层和位于所述晶种层上方的主层。
8.根据权利要求1所述的结构，进一步包括：
外部电连接件，位于所述第二导电图案上；以及
支撑材料，位于所述第二介电层和所述第二导电图案上方并且围绕所述外部电连接件的至少一部分。
9.一种结构，包括：
封装件，包括：
管芯，包括焊盘；
密封剂，围绕所述管芯，及
电介质多层结构，位于所述管芯和所述密封剂上方，所述电介质多层结构包括位于所述电介质多层结构中的第一导电图案和位于所述电介质多层结构上的第二导电图案，通过所述电介质多层结构限定了到达所述焊盘的第一开口，所述第一导电图案的至少一部分限定了所述第一开口的至少一部分，所述第二导电图案的至少一部分位于所述第一开口内并且邻接所述电介质多层结构的侧壁，所述第一导电图案未沿着所述第一开口内的所述电介质多层结构的侧壁延伸；以及
外部电连接件，位于所述封装件上。
10.一种方法，包括：
使用密封剂密封管芯，穿过所述密封剂露出所述管芯的焊盘；
在所述密封剂和所述管芯上方形成第一介电层；
在所述第一介电层上方形成第一导电图案；
在所述第一导电图案和所述第一介电层上方形成第二介电层；
在形成所述第一导电图案和所述第二介电层以后，形成穿过所述第二介电层和所述第一介电层到达所述焊盘的开口；以及
在所述第二介电层上方和所述开口内形成第二导电图案。
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