CN104597819A - C4 bus - Google Patents

Abstract

The invention provides a C4 bus. The C4 bus is that an RS485 hardware line is adopted; the DMX512 protocol is utilized; the carrier sense multiple access technology is carried out; a main control unit CPU sends control data to the bus in a broadcast form during industrial control of an intelligent light; points on the bus receive according to the data frame type, and the same points can synchronously receive the same control instruction; therefore, the time of polling and sending of the original RS485 can be saved, the hardware cost is reduced, the stability and reliability of the system are improved, and the utilization and real-time performance of the bus can be improved.

Description

A kind of C4 bus

One, art

The present invention relates to a kind of bus form, particularly relate to a kind of bus utilization high, the C4 bus that real-time is good.

Two, background technology

Bus communication conventional in modern industry communication has CAN communication and RS485 communication.The advantage of RS485 communication is that cost is low, but RS485 adopts half-duplex operation mostly, and any instant can only have a host node to be in transmission state and send data to bus in the entire network, and other all nodes all must be in accepting state.If there are two or more nodes to send data to bus simultaneously, the data of all transmit legs will be caused to send unsuccessfully.In addition, in the semi-duplex communication system that RS-485 bus is constructed, general adopt master-slave communication pattern, in bus, other nodes all are all from node for host node namely to only have one in whole system, communication mode be generally host node cyclic polling each from node.Once host node breaks down, the collapse of whole system will be caused.Secondly, system communication efficiency is low, because no matter some nodes, the need of sending data or needing to use bus, all will be waited until that host node is polled to self, thus make system bus utilization ratio low, poor real.Also reduce reliability and the dirigibility of system.

CAN communication can realize multi-master communication, and when the node of in CAN sends data, it is broadcast to all nodes in network with message form, and concerning each node, no matter whether data issue oneself, all receive it.Different nodes can receive identical data simultaneously, and the data communication real-time between each node of the network that these features make CAN form is good, and easily forms redundancy structure, improves the reliability of system and the dirigibility of system.But the shortcoming of CAN communication is that comparatively RS485 is high a lot of for cost.

Three, summary of the invention

Can system real time be improved, reliability and dirigibility for solving in communication bus, can reduce costs again, the invention provides a kind of C4 bus.This bus adopts class DMX512 agreement, adopts RS485 hardware bus form, namely improves the real-time of bus, also improve reliability and the dirigibility of system, reduce the cost again.

The technical solution adopted for the present invention to solve the technical problems is: in bus hardware transmission, adopt 485 control chips, agreement adopts class DMX512 agreement.For solving the data collision problem that RS485 bus occurs in data transmission, adopt collision sense multiple multiplex technique (CSMA).Carrier sense, refers to that any equipment being connected to bus is for before transmission frame, must intercepting bus, when confirming that it is idle, just can send; Multiplexed, refer to that multiple equipment can access bus simultaneously, the frame of an equipment transmission also can be received by multiple equipment.The multiplexing limit hair side inspection when sending data of collision sense multiple, once conflict be detected, equipment stops sending data immediately, effectively reduces the generation of conflict, reduces the bit error rate, improve channel utilization.

DMX512 data protocol a kind of lamp dimmer that to be American Stage light association (USITT) issue in nineteen ninety and fixture carry out the standard of data transmission.The information that DMX512 sends comprises 2-513 byte, and a data byte again with one start bit forms a frame together with two stop bit.First character joint is start byte, and ensuing byte is the data be sent on opertaing device.First of control data be 1, second, loop byte to loop 2, the like, to the last pass to 512 loops altogether in a data lines.

The invention has the beneficial effects as follows, while reducing costs, improve the reliability of system, the utilization factor of stability and raising bus, real-time.

Accompanying drawing illustrates:

Below in conjunction with drawings and Examples, the present invention is further described.

Fig. 1: two kinds of forms of carrier sense.

Fig. 2: the embodiment of the present invention 1 control principle drawing.

Fig. 3: the embodiment of the present invention 2 control principle drawing.

In figure, 1, CPU CPU (central processing unit), 2, DO point position, 3, DI point position, 4, AO point position, 5, AI point position, 6, magnetic latching relay module, 7, digital input module, 8, analog input module, 9, analog output module.

Four, embodiment

When Fig. 1 is data transmission, for avoiding the form that the carrier sense that data collision is taked occurs, when main equipment needs to send data to from equipment, need first to bus snooping a period of time, whether testbus there are data transmit (whether bus is idle), if bus free, then directly send data to from equipment; If bus there are data transmit (bus do), then certain interval of time or a period of time of exceeding setting intercept, until send data again during bus free again.

Fig. 2 is intelligent system bit map/bitmap, and CPU (CPU (central processing unit)) 1 connects DO2, DI3, AO4, AI5 point position by RS485 bus.CPU (CPU (central processing unit)) 1 time easily extensible connection control 128 DO point positions, 128 DI point positions, 32 AI point positions and 32 AO point positions (some bit quantity can define as requested).Wherein CPU (CPU (central processing unit)) 1 itself comprises 8 DO points position (DO0-DO7) and 8 DI points position (DI0-DI7), therefore it goes back easily extensible 120 DO points position (DO8-DO127), 120 DI points position (DI8-DI127), 32 AO points position (AO0-AO31), 32 AI points position (AI0-AI31).

In Fig. 3, each magnetic latching relay 6 comprises 8 DO point positions, and each digital input module 7 comprises 16 DI point positions, and each analog input module 8 comprises 8 AI point positions, and each analog output module 9 comprises 8 AO point positions.Therefore a CPU (CPU (central processing unit)) connects 15 magnetic latching relays, 6,7 digital input modules, 7,4 analog input modules 8 and 4 analog output modules by RS485 bus 1 time, connected mode is hand-in-hand connection.

When CPU (CPU (central processing unit)) 1 need various some position in control RS485 bus time, by sending order to all modules in RS485 bus, each module will receive control command, by parsing after receiving, perform corresponding action.During as need be write DO point position as CPU (CPU (central processing unit)) 1, by sending AA 02 00 FF 00 0F 00 F0 01 00 00 00 00 00 00 00 00 00to all magnetic latching relays 6 in bus, the byte of transmission is 16 systems.A position state is write in AA representative, when for A5, is then read module point position state; 02 to represent the some position write be DO point, when writing AO point position for 04 interval scale; Thereafter 128 DO point position states that 16 byte representations will be write, according to scale-of-two and hexadecimal relation, a byte representation 8 DO point position states, 16 bytes are then the states of 128 DO.When for 1 time, represent that to write corresponding DO point be 1; When for 0 time, represent that to write corresponding DO point be 0.

As above 00 FF 00 0F 00 F0 01 00 00 00 00 00 00 00 00 00, 8 DO states of the 1st CPU that byte representation will be write, 8 DO states of first magnetic latching relay that the 2nd byte representation will be write, the like, the 15th the magnetic latching relay DO point position state that the 16th byte representation will be write.1st byte 00 represents that 8 DO points of CPU itself are for (0,000 0000), 2nd byte FF represents that first magnetic latching relay DO state is written as (1,111 1111), and the 4th byte 0F represents that 8 some positions of the 3rd magnetic latching relay DO are for (0,000 1111).Each magnetic latching relay receives orders data, by according to the corresponding corresponding control byte of the some position definition of self, thus performs corresponding action.

When CPU (CPU (central processing unit)) 1 will write the data of AO, by sending order AA 04 xX XX XX XX XX XX XX xX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XXto all analog output modules 9 in RS485 bus.AO point position is write in 04 representative, and 32 XX below represent the size of 32 AO point place values that will write, and scope is at 00-64 (16 system), and a byte represents an AO point position.

DI point position and AI point position only can read, and can not write.AI point position state can active reporting, as A5 03 00 08 03 DF 03 CE 03 F4 03 E9 03 B4 03 EE 03 E4 03 DF8F 8F.A5 represents and reads a some position state, and 03 represents and reads AI point position, when for 01 time represent and read DI point, read DO when being 02, when being 03, read AI, reading AO state when being 04; 00 08 represent 8 the AI point bit quantity read; 0 3 DF 03 CE 03 F4 03 E9 03 B4 03 EE 03 E4 03 DFrepresent 8 the AI point position state values read.Point place value is between 00 00-03FF.

DI point position also can active reporting, when a connection digital input module, report A5 01 08 10 00 00 26 8B, A5 represents read point position state, and 01 represents reading DI point position, and 08 represents DI point position start address, from the 9th DI point position, 10 expressions have read 16 DI point positions, and 00 00 represent DI point position state values, and 26 8B are check code.

Claims (3)

1. a C4 bus, bus hardware adopts RS485 chip, and agreement adopts class DMX512 agreement, adopt collision sense multiple multiplex technique, it is characterized in that control data can be issued in bus by main equipment all from equipment simultaneously, retain corresponding data from device parses, perform corresponding action.

2. a kind of C4 bus according to right 1, it is characterized in that the reliability of system, stability is high, the utilization factor of bus and real-time good.

3. a kind of C4 bus according to right 1, is characterized in that bus adopts band isolation technology.