CN104123103A - High-capacity storage device - Google Patents
High-capacity storage device Download PDFInfo
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- CN104123103A CN104123103A CN201410381758.4A CN201410381758A CN104123103A CN 104123103 A CN104123103 A CN 104123103A CN 201410381758 A CN201410381758 A CN 201410381758A CN 104123103 A CN104123103 A CN 104123103A
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Abstract
The invention discloses a high-capacity storage device which comprises a master control module, a storage module and a clock module. The master control module is used for processing obtained data to be stored and used for managing and controlling the other modules; the storage module is used for conducting data storage; the clock module is used for providing clocks for the storage module. The storage module comprises at least one FerriSSD chip. NAND Flash is adopted in the chip to serve as storage media, the capacity is large, an NAND Flash array manager is integrated to the interior of the chip, the size of the whole chip is only 20 mm*16 mm, the size is small, the chip can be directly welded to a PCB, and the shock-resistant characteristic is good; meanwhile, the chip supports an SATA interface, a traditional 2.5-inch solid state disk can be directly replaced, and software does not need to be changed. It is thus clear that the high-capacity storage device meets the characteristics of large capacity, small sizes, small software and hardware design difficulty, high shock-resistant characteristics and the like needed by train data storage.
Description
Technical field
The invention belongs to memory storage field, relate in particular to a kind of mass storage device.
Background technology
Along with the intelligent development of modern train, increasing information, such as train status, passenger information etc. need record and store.
Current train-installed mass storage device mainly contains two kinds of implementations: the scheme based on NAND Flash array and the scheme based on 2.5 inches of SSD (Solid State Driver, solid state hard disc).Front a kind of scheme adopts NAND Flash array as storage medium, and needs the special NAND Flash controller of design to control and the invalid block in Flash is managed and screened out NAND Flash array, and design of hardware and software difficulty is larger; Rear a kind of scheme, adopt ripe on the market solid-state hard disk SSD as storage medium, but the SSD volume of 2.5 inches is larger, and solid state hard disc can not directly be welded on PCB (Printed Circuit Board, printed circuit board) on, need realize fixing at PCB by SATA connector, and SATA connector volume compared with large and its golden finger form easily because oxidation causes with PCB loose contact, shock resistance also poorly, make equipment dependability be difficult to ensure.
Visible, this area is needed badly provides the memory storage that a kind of capacity is large, volume is little, design of hardware and software difficulty is little, shock resistance is high, reliability is high and storage speed is fast, to meet standby train storage demand.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of mass storage device, the feature that capacity is large, volume is little, design of hardware and software difficulty is little, shock resistance is high, reliability is high and storage speed is fast that need possess to meet train data storage.
For this reason, openly following technical scheme of the present invention:
A kind of mass storage device, comprises main control module, memory module and clock module, wherein;
Described main control module, for the data to be stored of obtaining are processed, and controls for described memory module;
Described memory module, is connected with described main control module, under the control of described main control module, described data to be stored after treatment is stored, and described memory module comprises at least one FerriSSD chip;
Described clock module, is connected with described memory module, is used to described memory module that clock is provided.
Described device, preferred, described main control module comprises central processor CPU and at least one SATA controller being connected with described CPU, wherein:
Described CPU, for the data to be stored of obtaining are processed, and for described SATA controller and described memory module are communicated and manage control;
Described SATA controller, is connected one to one with described FerriSSD chip, carries out data access for the FerriSSD chip to coupled, to realize data in the storage of FerriSSD chip and to read.
Described device, preferred, described SATA controller adopts SATA bus to be connected with described FerriSSD chip.
Described device, preferred, described clock module comprises at least one crystal c rystal, described crystal is connected one to one with described FerriSSD chip, provides clock for the FerriSSD chip to coupled.
Described device, preferably, described FerriSSD chip comprises NANDFlash array and NANDFlash array management device, described NANDFlash array management device is for managing described NANDFlash array, and described NANDFlash array management device is connected with described SATA controller and described NANDFlash array.
Described device, preferred, the size dimension of described FerriSSD chip is 20mm x16mm.
Described device, preferred, described CPU is i.mx6 processor, it adopts ARM Cortex-A9 kernel.
To sum up, the embodiment of the present invention provides a kind of mass storage device, comprises main control module, memory module and clock module.Main control module is used for the data to be stored of obtaining to process, and for described memory module is controlled; Memory module for carrying out data storage under the control of main control module; Clock module is used to memory module that clock is provided; Wherein, memory module comprises at least one FerriSSD chip.FerriSSD chip adopts NAND Flash as storage medium, capacity is larger, and NAND Flash array management device is integrated in to its chip internal, whole chip size is only 20mm x16mm, small volume, thereby this chip has been realized mass data storage with minimum volume, and this chip can directly be welded on pcb board, and shock resistance is good; Meanwhile, it supports standard SATA interface, can directly replace 2.5 inches of traditional solid state hard discs, without variation software, does not need to design special controller.
Visible, the present invention has overcome the various defects that existing memory storage implementation exists, the feature such as met that the required capacity possessing of train data storage is large, volume is little, design of hardware and software difficulty is little, shock resistance is high, reliability is high and storage speed is fast.
Brief description of the drawings
For quote and know for the purpose of, hereinafter use technical term, write a Chinese character in simplified form or abridge sum up be explained as follows:
SATA:Serial ATA, serial ATA bus.
CPU:Central Processing Unit, CPU (central processing unit).
PCB:Print Circuit Board, printed circuit board.
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only embodiments of the invention, for those of ordinary skill in the art, do not paying under the prerequisite of creative work, other accompanying drawing can also be provided according to the accompanying drawing providing.
Fig. 1 is the structural representation of the disclosed mass storage device of the embodiment of the present invention;
Fig. 2 is the fundamental diagram of the disclosed memory storage of the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiment.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
The embodiment of the present invention discloses a kind of mass storage device, (Fig. 1 is specifically to adopt a FerriSSD chip as example) as shown in Figure 1, and this memory storage comprises main control module 100, memory module 200 and clock module 300.
Main control module 100, for the data to be stored of obtaining are processed, and for described memory module is controlled.
Particularly, main control module 100 comprises CPU (Central Processing Unit, central processing unit), and at least one SATA controller being connected with described CPU.
CPU, for the data to be stored of obtaining from device front-end interface (as Ethernet etc.) are processed, and is sent to SATA controller by data after treatment, is responsible for whole memory storage to manage and Control on Communication simultaneously.
The present embodiment specifically selects the i.mx6 processor of Freescale company as CPU, this processor adopting ARM Cortex-A9 kernel, and processing power is strong, low in energy consumption; Meanwhile, this processor is built-in SATA II controller, the speed of SATA II controller can reach 3Gbps, and its SATA signal and control signal can directly be received FerriSSD chip.
SATA controller, is connected one to one with the FerriSSD chip in memory module 200, carries out data access for the FerriSSD chip to coupled, to realize data in the storage of FerriSSD chip and to read.
Memory module 200, is connected with main control module 100, under the control at main control module 100, described data to be stored after treatment is stored, and this memory module 200 comprises at least one FerriSSD chip.
Wherein, the novel storage medium of one that FerriSSD chip Shi Huirong company (SiliconMotion) releases, it is using NAND Flash array as storage medium, capacity is larger, and integrated NAND Flash array management device realization therein managed NAND Flash array.This chip is supported the SATA interface of 3Gb/s and two kinds of speed class of 6Gb/s, access speed is very fast, and adopt one chip BGA (Ball Grid Array, the PCB of ball grid array structure) encapsulation, size is only 20mm x16mm, compared with 2.5 inches of SSD that are of a size of 100mm x 70mm with available technology adopting, greatly reduce storage volume, and this chip can directly be welded on pcb board, need be by SATA connector, be very suitable for all higher Embedded Application occasions of reliability and space requirement.
Visible, FerriSSD chip has the advantages that memory capacity is large, volume is little, access speed is fast, reliability is high.
The present embodiment specifically adopts the FerriSSD chip of 64GB as the storage medium of mass data storage, and by SATA high-speed serial bus, FerriSSD chip is directly articulated on the corresponding SATA controller of main control module 100, realize higher access and processing speed.The PCB that simultaneously FerriSSD chip is directly welded is upper, realized good anti-seismic performance, and volume is small and exquisite, is suitable for the Embedded Application occasion of car-mounted device.
Clock module 300, is connected with memory module 200, is used to memory module 200 that clock is provided.
Clock module 300 comprises at least one crystal (crystal), and described crystal is connected one to one with described FerriSSD chip, and crystal is for providing clock to coupled FerriSSD chip.
It should be noted that, memory storage of the present invention has extensibility, in the time that application is of the present invention, can be according to actual storage demand, the FerriSSD chip of apolegamy some, realizes the data storage of desired volume, wherein, the capacity of each FerriSSD chip can be identical, also can be different; Select the processor of respective numbers SATA controller simultaneously built-in, and selected the external crystal crystal of respective numbers, realized the dilatation of memory capacity.
Refer to Fig. 2, the present embodiment is specifically to match the FerriSSD chip of two 64GB, and the memory capacity that realizes 128GB is example, and the principle of work of memory storage is described.
In this example, specifically select the i.mx6 processor of built-in two SATA II controllers of Freescale company as CPU, the speed of SATA II controller can reach 3Gbps, and its SATA signal and control signal can directly be received FerriSSD chip.
Wherein, as shown in Figure 2, TXP and TXN are FerriSSD chip sends Difference signal pairs from data to SATA controller, and particularly, TXP is that data send anodal differential output signal; TXN is that data send negative pole differential output signal, and FerriSSD chip, by TXP and this signal differential pair of TXN, is realized to SATA controller and sent data.
RXP and RXN are the Difference signal pair of FerriSSD chip from SATA controller receiving data; Particularly, RXP is the anodal differential input signal of data receiver, and RXN is data receiver negative pole differential input signal, and FerriSSD chip, by RXP and this signal differential pair of RXN, is realized from SATA controller receiving data.
XTAL_IN is the external clock input signal of FerriSSD, and XTAL_OUT is the external clock output signal of FerriSSD, and external crystal crystal is as clock source, by these two signals, for FerriSSD chip provides clock signal; FRB0 be FerriSSD inside Flash prepare and busy signal.
Each device inputs or outputs by above corresponding signal, realizes the storage of data and reads.
In sum, the mass storage device that the present invention proposes has adopted FerriSSD chip as storage medium, and this chip capacity is large, account for plate area little (every only 20mm x16mm), realized mass data storage with minimum volume; And perfect data protection and fault detection mechanism are contained in its inside, can support the SATA interface of standard, can directly replace 2.5 inches of traditional (100 mm x 70mm) solid state hard discs, without variation software; And can directly be welded on pcb board, can save the SATA connector that plate carries, shock resistance is strong; On this basis, then coordinate and selected the high-performance processor of SATA controller built-in, can realize the storage of data and read.Therefore the present invention has does not need to design succinctly general, the multiple advantage such as data storing reliability is high, anti-seismic performance is strong and device volume is small and exquisite of specific software, circuit design, overcome the various defects that existing memory storage implementation exists, met the data storage requirement of the train apparatus that locomotive, subway, high speed motor car etc. all have relatively high expectations to capacity, volume, reliability and storage speed.
As seen through the above description of the embodiments, those skilled in the art can be well understood to the mode that the application can add essential general hardware platform by software and realizes.Based on such understanding, the part that the application's technical scheme contributes to prior art in essence in other words can embody with the form of software product, this computer software product can be stored in storage medium, as ROM/RAM, magnetic disc, CD etc., comprise that some instructions (can be personal computers in order to make a computer equipment, server, or the network equipment etc.) carry out the method described in some part of each embodiment of the application or embodiment.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (7)
1. a mass storage device, is characterized in that, comprises main control module, memory module and clock module, wherein;
Described main control module, for the data to be stored of obtaining are processed, and for described memory module is controlled;
Described memory module, is connected with described main control module, under the control of described main control module, described data to be stored after treatment is stored, and described memory module comprises at least one FerriSSD chip;
Described clock module, is connected with described memory module, is used to described memory module that clock is provided.
2. device according to claim 1, is characterized in that, described main control module comprises central processor CPU and at least one SATA controller being connected with described CPU, wherein:
Described CPU, for the data to be stored of obtaining are processed, and for described SATA controller and described memory module are communicated and manage control;
Described SATA controller, is connected one to one with described FerriSSD chip, carries out data access for the FerriSSD chip to coupled, to realize data in the storage of FerriSSD chip and to read.
3. device according to claim 2, is characterized in that, described SATA controller adopts SATA bus to be connected with described FerriSSD chip.
4. device according to claim 2, is characterized in that, described clock module comprises at least one crystal c rystal, and described crystal is connected one to one with described FerriSSD chip, provides clock for the FerriSSD chip to coupled.
5. device according to claim 1, it is characterized in that, described FerriSSD chip comprises NANDFlash array and NANDFlash array management device, described NANDFlash array management device is for managing described NANDFlash array, and described NANDFlash array management device is connected with described SATA controller and described NANDFlash array.
6. device according to claim 1, is characterized in that, the size dimension of described FerriSSD chip is 20mm x16mm.
7. device according to claim 2, is characterized in that, described CPU is i.mx6 processor, and it adopts ARM Cortex-A9 kernel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410381758.4A CN104123103A (en) | 2014-08-05 | 2014-08-05 | High-capacity storage device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410381758.4A CN104123103A (en) | 2014-08-05 | 2014-08-05 | High-capacity storage device |
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| CN104123103A true CN104123103A (en) | 2014-10-29 |
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| CN201410381758.4A Pending CN104123103A (en) | 2014-08-05 | 2014-08-05 | High-capacity storage device |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1828511A (en) * | 2005-01-11 | 2006-09-06 | 三星电子株式会社 | Solid state disk controller apparatus |
| US20110205796A1 (en) * | 2010-02-19 | 2011-08-25 | Samsung Electronics Co., Ltd. | Nonvolatile memory device and system performing repair operation for defective memory cell |
| CN202720628U (en) * | 2012-08-07 | 2013-02-06 | 朱洪模 | High-speed memory system based on solid state disks |
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2014
- 2014-08-05 CN CN201410381758.4A patent/CN104123103A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1828511A (en) * | 2005-01-11 | 2006-09-06 | 三星电子株式会社 | Solid state disk controller apparatus |
| US20110205796A1 (en) * | 2010-02-19 | 2011-08-25 | Samsung Electronics Co., Ltd. | Nonvolatile memory device and system performing repair operation for defective memory cell |
| CN202720628U (en) * | 2012-08-07 | 2013-02-06 | 朱洪模 | High-speed memory system based on solid state disks |
Non-Patent Citations (1)
| Title |
|---|
| 国兵等: "《单片机原理与应用》", 29 February 2008 * |
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Application publication date: 20141029 |