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CN104029112A - Grinding method of chip reverse process - Google Patents

Grinding method of chip reverse process Download PDF

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Publication number
CN104029112A
CN104029112A CN201410292928.1A CN201410292928A CN104029112A CN 104029112 A CN104029112 A CN 104029112A CN 201410292928 A CN201410292928 A CN 201410292928A CN 104029112 A CN104029112 A CN 104029112A
Authority
CN
China
Prior art keywords
chip
sheet
chips
accompanying
grinding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410292928.1A
Other languages
Chinese (zh)
Inventor
张明伦
陈进来
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kunshan Yong Xuzhi Wealth Technology Service Co Ltd
Original Assignee
Kunshan Yong Xuzhi Wealth Technology Service Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kunshan Yong Xuzhi Wealth Technology Service Co Ltd filed Critical Kunshan Yong Xuzhi Wealth Technology Service Co Ltd
Priority to CN201410292928.1A priority Critical patent/CN104029112A/en
Publication of CN104029112A publication Critical patent/CN104029112A/en
Pending legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/04Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/07Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool
    • B24B37/10Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for single side lapping

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Grinding Of Cylindrical And Plane Surfaces (AREA)

Abstract

The invention discloses a grinding method of a chip reverser process. The grinding method includes: allowing the surface to be ground of a chip to face down and be placed on a flat surface; respectively placing rectangular accompanying chips on all sides of the chip to be flush with the chip unilaterally; dripping curing adhesives on the chip and the accompanying chips; finally placing a fixing fixture on the chips and the accompanying chips for standing and curing to complete the process. Since the surfaces of the chip and the accompanying chips face down on the same plane for sample processing, coplane effect can be achieved during grinding regardless of height difference of the accompanying chips; since the edge to be ground, of the chip is as high as the accompany chips, pressure bearing and grinding speed of the accompanying chips are quite matched with that of the center of the chip, and grinding flatness of the chip is good.

Description

A kind of Ginding process of chip reverse process
Technical field
The invention belongs to chip manufacture technology field, relate in particular to a kind of Ginding process of chip reverse process.
Background technology
In integrated circuit fabrication process; reverse process is to understand self circuit and the most effective approach of competitor's circuit; and then as the important method of circuit studies and improved circuit; in traditional die reverse process, grind as one of the effective way of removing layer, but when traditional grinding chip; because chip edge is not protected; in the time grinding, to bear pressure larger at edge, often causes chip edge overgrinding, and form the uneven situation of chip.
Summary of the invention
The object of the present invention is to provide a kind of Ginding process of chip reverse process; when being intended to solve chip and grinding, because chip edge is not protected, in the time grinding, to bear pressure larger at edge; often cause chip edge overgrinding, and form the uneven problem of chip.
The present invention is achieved in that a kind of Ginding process of chip reverse process, first, is positioned over a flat surfaces by surface to be ground chip down; Again the sheet of accompanying of rectangle is positioned over respectively to aliging of chip all around and with chip is monolateral; Curable adhesive agent dripped in chip again and accompany on sheet; Finally put fixed jig leave standstill solidify after complete.
Further, described chip is the Gui sheet forming according to semiconductor technology, and it is shaped as rectangle.
Further, the described sheet of accompanying is that the rectangle corresponding with chip form to be ground accompanied sheet, and thickness is regardless of, and material can be the material of resistance to grinding, as pottery or metal, but taking Gui sheet as best.
Further, described curable adhesive agent and fixed jig, as fixing chip to be ground and accompany sheet use.
Further, the sample after having prepared, it accompanies sheet and chip surface to be ground for having plane surface altogether.
effect gathers
The Ginding process of chip reverse process of the present invention, due to chip with accompany sheet surface under same plane, to prepare sample all down, no matter accompany sheet difference in height, all can in the time grinding, reach coplanar effect; Due to chip edge to be ground with accompany sheet with high, in the time grinding, to bear pressure suitable with chip center, grinding rate is suitable, makes chip grinding flatness better.
Brief description of the drawings
Fig. 1 is normal chip and the chip sides enlarged drawing that the embodiment of the present invention provides;
Fig. 2 is the traditional die that provides of the embodiment of the present invention while grinding, and chip bears grinding pad pressure schematic diagram;
Fig. 3 is the traditional die that provides of the embodiment of the present invention while grinding, and chip bears grinding pad pressure and causes chip edge overgrinding schematic diagram;
Fig. 4 is the sample preparation flow chart that the embodiment of the present invention provides;
Fig. 5 be the embodiment of the present invention provide grind time, chip uniform stressed schematic diagram;
In figure: 1, chip; 2, fixed jig; 3, grinding pad; 4, accompany sheet; 4-1, first accompanies sheet; 4-2, second accompanies sheet; 4-3, escort services' sheet; 4-4, the 4th accompanies sheet; 5, curable adhesive agent.
Detailed description of the invention
In order to make object of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.
Fig. 1 is normal chip and chip sides enlarged drawing; Chip 1 bottom surface is that integrated circuit technology forms multilayer circuit figure; Fig. 2 is traditional die while grinding, and chip bears grinding pad pressure schematic diagram, 2 fixed jigs that are carries chips, and 3 grinding pads that use for process of lapping, in figure, display chip edge is subject to the situation of the more pressure of grinding pad; When Fig. 3 is traditional die grinding, chip bears grinding pad pressure and causes chip edge overgrinding schematic diagram.
As shown in Figure 4, the present invention is achieved in that first by surface to be ground chip 1 down, is positioned over a flat surfaces, as glass; Accompany sheet 4-1 by first of rectangle again, second accompanies sheet 4-2, escort services' sheet 4-3, and the 4th accompanies sheet 4-4 to be positioned over respectively aliging of chip 1 all around and with chip 1 is monolateral; Again by 5 of curable adhesive agents in chip 1 and accompany on sheet 4; Finally putting fixed jig 2 leaves standstill after solidifying and completes.
Further, described chip 1 is the Gui sheet forming according to semiconductor technology, and it is shaped as rectangle.
Further, the described sheet 4 of accompanying is that the rectangle corresponding with chip 1 shape to be ground accompanied sheet, and thickness is regardless of, and material can be the material of resistance to grinding, as pottery or metal, but taking Gui sheet as best.
Further, described curable adhesive agent 5 and fixed jig 2, as fixing chip 1 to be ground and accompany sheet 4 use.
Further, the sample after having prepared, it accompanies sheet 4 and chip to be ground 1 surface is to have plane surface altogether, avoids chip edge to be ground to cause the overground problem of chip edge because pressure is inhomogeneous.
Fig. 5 is the present invention in the time grinding, chip uniform stressed schematic diagram; Sample after having prepared, it accompanies sheet 4 and chip to be ground 1 surface is to have plane surface altogether, can avoid chip edge to cause the overground problem of chip edge because pressure is inhomogeneous when grinding.
The Ginding process of chip reverse process of the present invention, due to chip 1 with accompany sheet 4 surfaces under same plane, to prepare sample all down, no matter accompany sheet 4 differences in height, all can in the time grinding, reach coplanar effect; Due to chip to be ground 1 edge with accompany sheet 4 with high, in the time grinding and to bear pressure suitable at chip 1 center, grinding rate is suitable, makes chip 1 grind flatness better.
By reference to the accompanying drawings the specific embodiment of the present invention is described although above-mentioned; but not limiting the scope of the invention; one of ordinary skill in the art should be understood that; on the basis of technical scheme of the present invention, those skilled in the art do not need to pay various amendments that performing creative labour can make or distortion still within protection scope of the present invention.

Claims (5)

1. a Ginding process for chip reverse process, is characterized in that, first the Ginding process of described chip reverse process, is positioned over a flat surfaces by surface to be ground chip down; Again the sheet of accompanying of rectangle is positioned over respectively to aliging of chip all around and with chip is monolateral; Curable adhesive agent dripped in chip again and accompany on sheet; Finally put fixed jig leave standstill solidify after complete.
2. the Ginding process of chip reverse process as claimed in claim 1, is characterized in that, described chip is the Gui sheet forming according to semiconductor technology, and it is shaped as rectangle.
3. the Ginding process of chip reverse process as claimed in claim 1, is characterized in that, the described sheet of accompanying is that the rectangle corresponding with chip form to be ground accompanied sheet, and thickness is regardless of, and material can be the material of resistance to grinding, as pottery or metal, but taking Gui sheet as best.
4. the Ginding process of chip reverse process as claimed in claim 1, is characterized in that, described curable adhesive agent and fixed jig, as fixing chip to be ground and accompany sheet use.
5. the Ginding process of chip reverse process as claimed in claim 1, is characterized in that, the sample after having prepared, and it accompanies sheet and chip surface to be ground for having plane surface altogether.
CN201410292928.1A 2014-06-23 2014-06-23 Grinding method of chip reverse process Pending CN104029112A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410292928.1A CN104029112A (en) 2014-06-23 2014-06-23 Grinding method of chip reverse process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410292928.1A CN104029112A (en) 2014-06-23 2014-06-23 Grinding method of chip reverse process

Publications (1)

Publication Number Publication Date
CN104029112A true CN104029112A (en) 2014-09-10

Family

ID=51460230

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410292928.1A Pending CN104029112A (en) 2014-06-23 2014-06-23 Grinding method of chip reverse process

Country Status (1)

Country Link
CN (1) CN104029112A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107738141A (en) * 2017-11-10 2018-02-27 上海华力微电子有限公司 A kind of chip sample removes the Ginding process of level
CN109333234A (en) * 2018-12-03 2019-02-15 中国工程物理研究院激光聚变研究中心 The clamping device and its method of small-bore optical element
CN110926891A (en) * 2019-11-04 2020-03-27 广东风华高新科技股份有限公司 Preparation method of metallographic section sample

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010012751A1 (en) * 2000-01-28 2001-08-09 Lam Research Corporation System and method for polishing and planarizing semiconductor wafers using reduced surface area polishing pads and variable partial pad-wafer overlapping techniques
JP2004014780A (en) * 2002-06-06 2004-01-15 Renesas Technology Corp Method of evaluating flattening process and manufacturing semiconductor device
CN1883881A (en) * 2006-05-26 2006-12-27 中国科学院上海技术物理研究所 Surface polishing method for protective side edge of group II-VI semiconductor material
CN201519904U (en) * 2009-11-17 2010-07-07 宜硕科技(上海)有限公司 Chip stripping device
CN102441841A (en) * 2011-08-29 2012-05-09 上海华力微电子有限公司 Method for improving grinding uniformity of chemical mechanical planarization (CMP)

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010012751A1 (en) * 2000-01-28 2001-08-09 Lam Research Corporation System and method for polishing and planarizing semiconductor wafers using reduced surface area polishing pads and variable partial pad-wafer overlapping techniques
JP2004014780A (en) * 2002-06-06 2004-01-15 Renesas Technology Corp Method of evaluating flattening process and manufacturing semiconductor device
CN1883881A (en) * 2006-05-26 2006-12-27 中国科学院上海技术物理研究所 Surface polishing method for protective side edge of group II-VI semiconductor material
CN201519904U (en) * 2009-11-17 2010-07-07 宜硕科技(上海)有限公司 Chip stripping device
CN102441841A (en) * 2011-08-29 2012-05-09 上海华力微电子有限公司 Method for improving grinding uniformity of chemical mechanical planarization (CMP)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107738141A (en) * 2017-11-10 2018-02-27 上海华力微电子有限公司 A kind of chip sample removes the Ginding process of level
CN109333234A (en) * 2018-12-03 2019-02-15 中国工程物理研究院激光聚变研究中心 The clamping device and its method of small-bore optical element
CN109333234B (en) * 2018-12-03 2024-05-17 中国工程物理研究院激光聚变研究中心 Clamping device and method for small-caliber optical element
CN110926891A (en) * 2019-11-04 2020-03-27 广东风华高新科技股份有限公司 Preparation method of metallographic section sample

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Application publication date: 20140910