CH591762A5 - - Google Patents
Info
- Publication number
- CH591762A5 CH591762A5 CH355275A CH355275A CH591762A5 CH 591762 A5 CH591762 A5 CH 591762A5 CH 355275 A CH355275 A CH 355275A CH 355275 A CH355275 A CH 355275A CH 591762 A5 CH591762 A5 CH 591762A5
- Authority
- CH
- Switzerland
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10156—Shape being other than a cuboid at the periphery
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10157—Shape being other than a cuboid at the active surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10158—Shape being other than a cuboid at the passive surface
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Application Of Or Painting With Fluid Materials (AREA)
- Casings For Electric Apparatus (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CH355275A CH591762A5 (fr) | 1975-03-20 | 1975-03-20 | |
DE19752518666 DE2518666A1 (de) | 1975-03-20 | 1975-04-26 | Verfahren zum aufbringen von glasuren auf die oberflaeche von halbleiter-aktivteilen, haltevorrichtung zur ausfuehrung des verfahrens und dessen anwendung zum passivieren von pn-uebergaengen |
DE19757513490 DE7513490U (de) | 1975-03-20 | 1975-04-26 | Haltevorrichtung |
FR7607634A FR2305021A1 (fr) | 1975-03-20 | 1976-03-17 | Procede pour l'application de glacures sur la surface des parties actives d'elements a semi-conducteurs, dispositif de serrage pour la mise en oeuvre du procede et application de celui-ci a la passivation des jonctions pn |
JP2976776A JPS51118966A (en) | 1975-03-20 | 1976-03-18 | Method of glazing activated surface of semiconductor * holder for practising thereby and application of passivating pn transition thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CH355275A CH591762A5 (fr) | 1975-03-20 | 1975-03-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
CH591762A5 true CH591762A5 (fr) | 1977-09-30 |
Family
ID=4258446
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH355275A CH591762A5 (fr) | 1975-03-20 | 1975-03-20 |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPS51118966A (fr) |
CH (1) | CH591762A5 (fr) |
DE (2) | DE7513490U (fr) |
FR (1) | FR2305021A1 (fr) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5367363A (en) * | 1976-11-27 | 1978-06-15 | Mitsubishi Electric Corp | Semiconductor device |
FR2469000A1 (fr) * | 1979-10-30 | 1981-05-08 | Silicium Semiconducteur Ssc | Structure de thyristor tres haute tension glassive et son procede de fabrication |
FR2515874A1 (fr) * | 1981-11-05 | 1983-05-06 | Comp Generale Electricite | Procede d'encapsulation plastique de cellules solaires |
DE3832732A1 (de) * | 1988-09-27 | 1990-03-29 | Asea Brown Boveri | Leistungshalbleiterdiode |
DE3832750A1 (de) * | 1988-09-27 | 1990-03-29 | Asea Brown Boveri | Leistungshalbleiterbauelement |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1438826A (fr) * | 1964-06-30 | 1966-05-13 | Ibm | Formation de films de verre par pulvérisation réactive |
US3473959A (en) * | 1964-08-10 | 1969-10-21 | Licentia Gmbh | Method for coating semiconductors and apparatus |
US3437505A (en) * | 1965-06-28 | 1969-04-08 | Ibm | Method for depositing glass particles on the entire exposed surface of an object |
US3639975A (en) * | 1969-07-30 | 1972-02-08 | Gen Electric | Glass encapsulated semiconductor device fabrication process |
-
1975
- 1975-03-20 CH CH355275A patent/CH591762A5/xx not_active IP Right Cessation
- 1975-04-26 DE DE19757513490 patent/DE7513490U/de not_active Expired
- 1975-04-26 DE DE19752518666 patent/DE2518666A1/de not_active Withdrawn
-
1976
- 1976-03-17 FR FR7607634A patent/FR2305021A1/fr not_active Withdrawn
- 1976-03-18 JP JP2976776A patent/JPS51118966A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JPS51118966A (en) | 1976-10-19 |
DE2518666A1 (de) | 1976-09-30 |
DE7513490U (de) | 1977-05-26 |
FR2305021A1 (fr) | 1976-10-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PL | Patent ceased | ||
PL | Patent ceased |