CH409008A - Speichereinrichtung - Google Patents
SpeichereinrichtungInfo
- Publication number
- CH409008A CH409008A CH695063A CH695063A CH409008A CH 409008 A CH409008 A CH 409008A CH 695063 A CH695063 A CH 695063A CH 695063 A CH695063 A CH 695063A CH 409008 A CH409008 A CH 409008A
- Authority
- CH
- Switzerland
- Prior art keywords
- storage facility
- facility
- storage
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
- G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/06—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element
- G11C11/06007—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element using a single aperture or single magnetic closed circuit
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Electronic Switches (AREA)
- Image Input (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US202173A US3237169A (en) | 1962-06-13 | 1962-06-13 | Simultaneous read-write addressing |
Publications (1)
Publication Number | Publication Date |
---|---|
CH409008A true CH409008A (de) | 1966-03-15 |
Family
ID=22748777
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH695063A CH409008A (de) | 1962-06-13 | 1963-06-04 | Speichereinrichtung |
Country Status (5)
Country | Link |
---|---|
US (1) | US3237169A (de) |
CH (1) | CH409008A (de) |
DE (1) | DE1276375B (de) |
GB (1) | GB978649A (de) |
NL (1) | NL293797A (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3376554A (en) * | 1965-04-05 | 1968-04-02 | Digital Equipment Corp | Digital computing system |
CH491571A (de) * | 1968-04-10 | 1970-05-31 | Siemens Ag | Betriebs-Verfahren und Schaltungsanordnung für elektronische Datenwählvermittlungssysteme |
US3735354A (en) * | 1972-04-07 | 1973-05-22 | Sperry Rand Corp | Multiplexed memory request interface |
US3906453A (en) * | 1974-03-27 | 1975-09-16 | Victor Comptometer Corp | Care memory control circuit |
FR2433792A1 (fr) * | 1978-08-17 | 1980-03-14 | Cii Honeywell Bull | Dispositif universel d'echange d'informations entre les memoires d'ordinateur et les dispositifs de traitement qui le compose |
US6807609B1 (en) | 1989-12-04 | 2004-10-19 | Hewlett-Packard Development Company, L.P. | Interleaving read and write operations on a bus and minimizing buffering on a memory module in a computer system |
JP2826857B2 (ja) * | 1989-12-13 | 1998-11-18 | 株式会社日立製作所 | キャッシュ制御方法および制御装置 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1057362B (de) * | 1956-06-20 | 1959-05-14 | Ibm Deutschland | Datenzuordnungsvorrichtung fuer elektronische Rechenanlagen und datenverarbeitende Maschinen |
US3068452A (en) * | 1959-08-14 | 1962-12-11 | Texas Instruments Inc | Memory matrix system |
-
0
- NL NL293797D patent/NL293797A/xx unknown
-
1962
- 1962-06-13 US US202173A patent/US3237169A/en not_active Expired - Lifetime
-
1963
- 1963-05-30 GB GB21669/63A patent/GB978649A/en not_active Expired
- 1963-06-04 CH CH695063A patent/CH409008A/de unknown
- 1963-06-05 DE DES85541A patent/DE1276375B/de active Pending
Also Published As
Publication number | Publication date |
---|---|
NL293797A (de) | |
US3237169A (en) | 1966-02-22 |
DE1276375B (de) | 1968-08-29 |
GB978649A (en) | 1964-12-23 |
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