CA2879465A1 - Integration of semiconductor devices into system substrate - Google Patents
Integration of semiconductor devices into system substrate Download PDFInfo
- Publication number
- CA2879465A1 CA2879465A1 CA2879465A CA2879465A CA2879465A1 CA 2879465 A1 CA2879465 A1 CA 2879465A1 CA 2879465 A CA2879465 A CA 2879465A CA 2879465 A CA2879465 A CA 2879465A CA 2879465 A1 CA2879465 A1 CA 2879465A1
- Authority
- CA
- Canada
- Prior art keywords
- pixel
- sub
- micro device
- integrated
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 38
- 230000010354 integration Effects 0.000 title claims description 3
- 239000004065 semiconductor Substances 0.000 title description 7
- 239000000945 filler Substances 0.000 claims abstract description 12
- 239000010409 thin film Substances 0.000 claims abstract 7
- 238000000034 method Methods 0.000 claims description 14
- 230000003287 optical effect Effects 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 2
- 238000000059 patterning Methods 0.000 claims 3
- 238000004519 manufacturing process Methods 0.000 claims 2
- 238000012805 post-processing Methods 0.000 abstract 2
- 238000006243 chemical reaction Methods 0.000 abstract 1
- 230000008878 coupling Effects 0.000 abstract 1
- 238000010168 coupling process Methods 0.000 abstract 1
- 238000005859 coupling reaction Methods 0.000 abstract 1
- 239000011159 matrix material Substances 0.000 abstract 1
- 238000001459 lithography Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
- H01L25/0655—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/83005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
Post-processing steps for integrating of micro devices into system (receiver) substrate or improving the performance of the micro devices after transfer. Post processing steps for additional structures such as reflective layers, fillers, black matrix or other layers may be used to improve the out coupling or confining of the generated LED light. Dielectric and metallic layers may be used to integrate an electro-optical thin film device into the system substrate with transferred micro devices. Color conversion layers may be integrated into the system substrate to create different outputs from the micro devices.
Description
Introduction Integrating prefabricated semiconductor devices to driving substrate allows development of high efficient and low power displays and other systems.
In one case, it is using thermal transfer of the devices. The donor substrate with semiconductor device puts in contact with system substrate and then the setup is heats up. The devices connected to pads in the system substrate will be connected to the system substrate. After that, laser or other mechanism can be used to disconnect the semiconductor device from the =
donor substrate. The main challenge is selective transfer of the semiconductor devices to the system substrate as First Donor Substrate
In one case, it is using thermal transfer of the devices. The donor substrate with semiconductor device puts in contact with system substrate and then the setup is heats up. The devices connected to pads in the system substrate will be connected to the system substrate. After that, laser or other mechanism can be used to disconnect the semiconductor device from the =
donor substrate. The main challenge is selective transfer of the semiconductor devices to the system substrate as First Donor Substrate
2 t: N tm -0 tism .
,..., . ¨ ¨ - -System Substrate 1 (a) Second Donor Substrate ts2Ta _____________ tg 1 =::: . _______ ..,....... _____=
t :-_-:-:-_-:-: t =:_::_:õ:õ.: ...____ __________ =______ ti _-_-_-_-_-, .--------------------------. --.---------. z.z.z.,...-...-..1 N., --,--------- ------------Z.....k\ .. ...... - -------imi... ---IIIIIII Ell =
System Substrate 1 _______________________________________________________________ _ (b) Third Donor Substrate ¨ ______________________________________________________________ ts3I 1 ......................................... I
. tt3 . --------..-.
t3 tg 2 _-_-_-_-_-_-_-_-_-_-_-_-.
System Substrate 1 (c) _-_-_-_-_-_-.
-----:::-----:---------_-_-_-,-, -_-_-_¨__ ..,...õ
4...µ ..s.......
IMM L Ili M .............................................................
System Substrate 1 (d) demonstrate in Figure 1. Here, the "G" devices should be transferred to "G" pad on the system substrate.
, Selective transfer of semiconductor devices with different height profile Here the pad profile of the devices on the donor substrate has different height profiles. The height profile is functions of different types of device are being transferred to the system substrate. For example, Figure 1 shows the transfer of three different types of device to the system substrate. Here, after alignment, the donor substrate is put in contact with the system substrate. The connection could be either conductive or nonconductive depending on the function of system substrate and transferred device. As can be seen the height profile of each donor substrate is adjusted to account for the previous devices transferred to the system substrate in addition to some gap (to and to) required between the donor device and .previously transferred devices.
Figure 2 demonstrate the transfer of devices from the remaining devices in the donor substrates to a second system substrate. Here the process is performed similar to the first system substrate.
Figure 3 demonstrate the transfer of devices from the remaining devices in the donor substrates to a third system substrate.
Also, one can adjust the height of placement area in the system substrate to enhance the integration.
IF the semiconductor device is optical device, one may need to use planarization with proper optical characteristics to eliminate optical distortion due to height profile in the device. In one case, one can planarize the surface with a dark (or other type) material (photoresist). Then open the area on the surface of each device by different technics such as imprinting, stamping, or lithography. Then fill the opening with optical fillers with proper characteristics that can transfer the light to the surface. At the surface, one can add diffraction layer (or lens) to diffract the light to different direction. Figure 4 shows the process steps'for the treatment of optical devices.
,..., . ¨ ¨ - -System Substrate 1 (a) Second Donor Substrate ts2Ta _____________ tg 1 =::: . _______ ..,....... _____=
t :-_-:-:-_-:-: t =:_::_:õ:õ.: ...____ __________ =______ ti _-_-_-_-_-, .--------------------------. --.---------. z.z.z.,...-...-..1 N., --,--------- ------------Z.....k\ .. ...... - -------imi... ---IIIIIII Ell =
System Substrate 1 _______________________________________________________________ _ (b) Third Donor Substrate ¨ ______________________________________________________________ ts3I 1 ......................................... I
. tt3 . --------..-.
t3 tg 2 _-_-_-_-_-_-_-_-_-_-_-_-.
System Substrate 1 (c) _-_-_-_-_-_-.
-----:::-----:---------_-_-_-,-, -_-_-_¨__ ..,...õ
4...µ ..s.......
IMM L Ili M .............................................................
System Substrate 1 (d) demonstrate in Figure 1. Here, the "G" devices should be transferred to "G" pad on the system substrate.
, Selective transfer of semiconductor devices with different height profile Here the pad profile of the devices on the donor substrate has different height profiles. The height profile is functions of different types of device are being transferred to the system substrate. For example, Figure 1 shows the transfer of three different types of device to the system substrate. Here, after alignment, the donor substrate is put in contact with the system substrate. The connection could be either conductive or nonconductive depending on the function of system substrate and transferred device. As can be seen the height profile of each donor substrate is adjusted to account for the previous devices transferred to the system substrate in addition to some gap (to and to) required between the donor device and .previously transferred devices.
Figure 2 demonstrate the transfer of devices from the remaining devices in the donor substrates to a second system substrate. Here the process is performed similar to the first system substrate.
Figure 3 demonstrate the transfer of devices from the remaining devices in the donor substrates to a third system substrate.
Also, one can adjust the height of placement area in the system substrate to enhance the integration.
IF the semiconductor device is optical device, one may need to use planarization with proper optical characteristics to eliminate optical distortion due to height profile in the device. In one case, one can planarize the surface with a dark (or other type) material (photoresist). Then open the area on the surface of each device by different technics such as imprinting, stamping, or lithography. Then fill the opening with optical fillers with proper characteristics that can transfer the light to the surface. At the surface, one can add diffraction layer (or lens) to diffract the light to different direction. Figure 4 shows the process steps'for the treatment of optical devices.
Claims (14)
1. A method of integrated device fabrication, the integrated device comprising a plurality pixels each comprising at least one sub-pixel comprising a micro device integrated on a substrate, the method comprising:
extending an active area of a first sub-pixel to an area larger than an area of a first micro device of the first sub-pixel by patterning of a filler layer about the first micro device and between the first micro device and at least one second micro device.
extending an active area of a first sub-pixel to an area larger than an area of a first micro device of the first sub-pixel by patterning of a filler layer about the first micro device and between the first micro device and at least one second micro device.
2. A method according to claim 1 further comprising:
fabricating at least one reflective layer covering at least a portion of one side of the patterned filler layer, the reflective layer for confining at least a portion of incoming or outgoing light within the active area of the sub-pixel.
fabricating at least one reflective layer covering at least a portion of one side of the patterned filler layer, the reflective layer for confining at least a portion of incoming or outgoing light within the active area of the sub-pixel.
3. A method according to claim 2 wherein the reflective layer is fabricated as an electrode of the micro device.
4. A method according to claim 1 wherein the patterning of the filler layer further patterns the filler layer about a further sub-pixel.
5. A method according to claim 1 wherein the patterning of the filler layer further is performed with a dielectric filler material.
6. An integrated device comprising:
a plurality pixels each comprising at least one sub-pixel comprising a micro device integrated on a substrate; and a patterned filler layer formed about a first micro device of a first sub-pixel and between the first micro device and at least one second micro device, the patterned filler layer extending an active area of the first sub-pixel to an area larger than an area of the first micro device.
a plurality pixels each comprising at least one sub-pixel comprising a micro device integrated on a substrate; and a patterned filler layer formed about a first micro device of a first sub-pixel and between the first micro device and at least one second micro device, the patterned filler layer extending an active area of the first sub-pixel to an area larger than an area of the first micro device.
7. An integrated device according to claim 6 further comprising:
at least one reflective layer covering at least a portion of one side of the patterned filler layer, the reflective layer for confining at least a portion of incoming or outgoing light to the active area of the first sub-pixel.
at least one reflective layer covering at least a portion of one side of the patterned filler layer, the reflective layer for confining at least a portion of incoming or outgoing light to the active area of the first sub-pixel.
8. An integrated device according to claim 7 wherein the reflective layer is an electrode of the micro device.
9. An integrated device according to claim 7 wherein the patterned filler layer is formed about a further sub-pixel.
10. A method of integrated device fabrication, the device comprising a plurality pixels each comprising at least one sub-pixel comprising a micro device integrated on a substrate, the method comprising:
integrating at least one micro device into a receiver substrate; and subsequently to the integration of the at least one micro device, integrating at least one thin-film electro-optical device into the receiver substrate.
integrating at least one micro device into a receiver substrate; and subsequently to the integration of the at least one micro device, integrating at least one thin-film electro-optical device into the receiver substrate.
11. A method according to claim 10, wherein integrating the at least one thin-film electro-optical device comprises forming an optical path for the micro device through all or some layers of the at least one electro-optical device.
12. A method according to claim 10 wherein integrating the at least one thin-film electro-optical device is such that an optical path for the micro device is through a surface or area of the integrated device other than a surface or area of the electro-optical device.
13. A method according to claim 10, further comprising fabricating an electrode of the thin-film electro-optical device, the electrode of the thin-film electro-optical device defining an active area of at least one of a pixel and a sub-pixel.
14.
A method of according to claim 10, further comprising fabricating an electrode which serves as a shared electrode of both the thin-film electro-optical device and the light emitting micro device.
A method of according to claim 10, further comprising fabricating an electrode which serves as a shared electrode of both the thin-film electro-optical device and the light emitting micro device.
Priority Applications (31)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA2879465A CA2879465A1 (en) | 2015-01-23 | 2015-01-23 | Integration of semiconductor devices into system substrate |
| US15/002,662 US20160219702A1 (en) | 2015-01-23 | 2016-01-21 | Selective micro device transfer to receiver substrate |
| PCT/IB2016/050307 WO2016116889A1 (en) | 2015-01-23 | 2016-01-21 | Selective micro device transfer to receiver substrate |
| CN201680006964.4A CN107851586B (en) | 2015-01-23 | 2016-01-21 | Selective microdevice transfer to acceptor substrates |
| CN202110684431.4A CN113410146A (en) | 2015-01-23 | 2016-01-21 | Selective micro device transfer to a receptor substrate |
| DE112016000447.8T DE112016000447T5 (en) | 2015-01-23 | 2016-01-21 | Selective micro-device transfer to a receptor substrate |
| US15/060,942 US10134803B2 (en) | 2015-01-23 | 2016-03-04 | Micro device integration into system substrate |
| CN201780013977.9A CN109075119B (en) | 2015-01-23 | 2017-03-06 | Integrated Device Manufacturing Method |
| CN202310495809.5A CN116525532A (en) | 2015-01-23 | 2017-03-06 | Integrated device manufacturing method |
| US15/653,120 US10700120B2 (en) | 2015-01-23 | 2017-07-18 | Micro device integration into system substrate |
| CN201880047604.8A CN110892530B (en) | 2015-01-23 | 2018-07-18 | Integrated optical system |
| KR1020237044348A KR20240001289A (en) | 2015-01-23 | 2018-07-18 | Micro device integration into system substrate |
| TW107124809A TWI820033B (en) | 2015-01-23 | 2018-07-18 | Micro device integration into system substrate |
| PCT/IB2018/055347 WO2019016730A1 (en) | 2015-01-23 | 2018-07-18 | Micro device integration into system substrate |
| KR1020207004053A KR102618938B1 (en) | 2015-01-23 | 2018-07-18 | Microdevice integration into the system board |
| CN202311598175.2A CN117613166A (en) | 2015-01-23 | 2018-07-18 | Integrated optical system |
| DE112018003713.4T DE112018003713T5 (en) | 2015-01-23 | 2018-07-18 | MICRO DEVICE INTEGRATION IN SYSTEM SUBSTRATE |
| TW112137111A TW202406172A (en) | 2015-01-23 | 2018-07-18 | Micro device integration into system substrate |
| US16/107,692 US10847571B2 (en) | 2015-01-23 | 2018-08-21 | Micro device integration into system substrate |
| US16/107,680 US20180358404A1 (en) | 2015-01-23 | 2018-08-21 | Micro device integration into system substrate |
| US16/912,049 US11735623B2 (en) | 2015-01-23 | 2020-06-25 | Micro device integration into system substrate |
| US16/931,132 US11728302B2 (en) | 2015-01-23 | 2020-07-16 | Selective micro device transfer to receiver substrate |
| US17/200,467 US20210202572A1 (en) | 2015-01-23 | 2021-03-12 | Micro device integration into system substrate |
| US17/365,634 US11735545B2 (en) | 2015-01-23 | 2021-07-01 | Selective micro device transfer to receiver substrate |
| US17/365,708 US11476216B2 (en) | 2015-01-23 | 2021-07-01 | Selective micro device transfer to receiver substrate |
| US17/569,918 US11735547B2 (en) | 2015-01-23 | 2022-01-06 | Selective micro device transfer to receiver substrate |
| US17/569,893 US11728306B2 (en) | 2015-01-23 | 2022-01-06 | Selective micro device transfer to receiver substrate |
| US17/569,900 US11735546B2 (en) | 2015-01-23 | 2022-01-06 | Selective micro device transfer to receiver substrate |
| US17/730,719 US12199058B2 (en) | 2015-01-23 | 2022-04-27 | Selective micro device transfer to receiver substrate |
| US18/177,613 US20230207611A1 (en) | 2015-01-23 | 2023-03-02 | Micro device integration into system substrate |
| US18/895,330 US20250015030A1 (en) | 2015-01-23 | 2024-09-24 | Selective micro device transfer to receiver substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA2879465A CA2879465A1 (en) | 2015-01-23 | 2015-01-23 | Integration of semiconductor devices into system substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2879465A1 true CA2879465A1 (en) | 2016-07-23 |
Family
ID=56413930
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA2879465A Abandoned CA2879465A1 (en) | 2015-01-23 | 2015-01-23 | Integration of semiconductor devices into system substrate |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA2879465A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110892530A (en) * | 2015-01-23 | 2020-03-17 | 维耶尔公司 | Micro device integration into system substrate |
-
2015
- 2015-01-23 CA CA2879465A patent/CA2879465A1/en not_active Abandoned
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110892530A (en) * | 2015-01-23 | 2020-03-17 | 维耶尔公司 | Micro device integration into system substrate |
| CN110892530B (en) * | 2015-01-23 | 2023-12-19 | 维耶尔公司 | Integrated optical system |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Bae et al. | Quantum dot-integrated GaN light-emitting diodes with resolution beyond the retinal limit | |
| US10078158B2 (en) | Manufacturing display panels with integrated micro lens array | |
| JP7278421B2 (en) | In-situ curing of the color conversion layer in recesses | |
| US20230170338A1 (en) | Circuit and system integration onto a microdevice substrate | |
| JP6505226B2 (en) | Integrated color LED micro display | |
| Li et al. | Transfer-printed, tandem microscale light-emitting diodes for full-color displays | |
| US7227692B2 (en) | Method and apparatus for balancing color response of imagers | |
| CN105789122B (en) | Method for transferring photoelectric element | |
| JP2007329434A5 (en) | ||
| TW201714012A (en) | Projection display system | |
| WO2008108032A1 (en) | Liquid crystal display device and its manufacturing method | |
| WO2015067066A1 (en) | Display panel and preparation method therefor, and display device | |
| KR102032382B1 (en) | Manufacturing method of capacitor for display apparatus and display apparatus | |
| TWI233692B (en) | Semiconductor apparatus and method for fabricating the same | |
| TW200740220A (en) | Solid-state imaging device, method for producing the same, and camera | |
| KR20140081409A (en) | Thin film transistor array substrate and method for manufacturing the same | |
| MX2018005899A (en) | Methods of manufacturing image element arrays for security devices. | |
| US9305965B2 (en) | Solid-state imaging apparatus and method of manufacturing the same | |
| US9825251B2 (en) | Display apparatus comprising a seal portion having two different thicknesses | |
| CA2879465A1 (en) | Integration of semiconductor devices into system substrate | |
| GB2599864A (en) | Method of fabricating an integrated structure for an optoelectronic device and integrated structure for an optoelectronic device | |
| Bae et al. | Direct single-step printing of conductive grids on curved surfaces using template-guided foaming | |
| TWI753954B (en) | Color conversion layer integration into display substrate with high intensity light sources | |
| CN106249463B (en) | Display panel, manufacturing method thereof and display device | |
| CA3225494A1 (en) | Integrated optoelectronic devices for lighting and display applications |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FZDE | Dead |
Effective date: 20180123 |