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BRPI0919671A2 - aparelho e método de processamento de dados, e, programa - Google Patents

aparelho e método de processamento de dados, e, programa

Info

Publication number
BRPI0919671A2
BRPI0919671A2 BRPI0919671A BRPI0919671A BRPI0919671A2 BR PI0919671 A2 BRPI0919671 A2 BR PI0919671A2 BR PI0919671 A BRPI0919671 A BR PI0919671A BR PI0919671 A BRPI0919671 A BR PI0919671A BR PI0919671 A2 BRPI0919671 A2 BR PI0919671A2
Authority
BR
Brazil
Prior art keywords
program
processing apparatus
data processing
data
processing
Prior art date
Application number
BRPI0919671A
Other languages
English (en)
Portuguese (pt)
Inventor
Naoki Yoshimochi
Toshiyuki Miyauchi
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of BRPI0919671A2 publication Critical patent/BRPI0919671A2/pt

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H03M13/2909—Product codes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1833—Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1866—Error detection or correction; Testing, e.g. of drop-outs by interleaving
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2721—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions the interleaver involves a diagonal direction, e.g. by using an interleaving matrix with read-out in a diagonal direction
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1876—Interpolating methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1833—Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information
    • G11B2020/1853—Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information using a product code which has inner and outer parity symbols
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B2220/00—Record carriers by type
    • G11B2220/20—Disc-shaped record carriers
    • G11B2220/25—Disc-shaped record carriers characterised in that the disc is based on a specific recording technology
    • G11B2220/2508—Magnetic discs
    • G11B2220/2516—Hard disks
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B2220/00—Record carriers by type
    • G11B2220/20—Disc-shaped record carriers
    • G11B2220/25—Disc-shaped record carriers characterised in that the disc is based on a specific recording technology
    • G11B2220/2537—Optical discs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1515—Reed-Solomon codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing (AREA)
  • Mathematical Physics (AREA)
  • Error Detection And Correction (AREA)
BRPI0919671A 2008-10-27 2009-10-27 aparelho e método de processamento de dados, e, programa BRPI0919671A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2008275173A JP5309889B2 (ja) 2008-10-27 2008-10-27 データ処理装置および方法、並びにプログラム
PCT/JP2009/068357 WO2010050446A1 (fr) 2008-10-27 2009-10-27 Dispositif de traitement de données, procédé et programme

Publications (1)

Publication Number Publication Date
BRPI0919671A2 true BRPI0919671A2 (pt) 2015-12-01

Family

ID=42128808

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0919671A BRPI0919671A2 (pt) 2008-10-27 2009-10-27 aparelho e método de processamento de dados, e, programa

Country Status (7)

Country Link
US (1) US8539322B2 (fr)
EP (1) EP2343705B1 (fr)
JP (1) JP5309889B2 (fr)
CN (1) CN102187395B (fr)
BR (1) BRPI0919671A2 (fr)
RU (1) RU2504848C2 (fr)
WO (1) WO2010050446A1 (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9240807B2 (en) 2011-06-29 2016-01-19 Nec Corporation Radio transmitting/receiving device, communication system, and channel coding processing method used thereby
US20160197703A1 (en) * 2013-09-10 2016-07-07 Electronics And Telecommunications Research Institute Ldpc-rs two-dimensional code for ground wave cloud broadcasting
US9396062B1 (en) * 2014-04-04 2016-07-19 Seagate Technology Llc Group based codes for multi-dimensional recording (MDR)
ES2553152B1 (es) * 2014-06-03 2016-10-07 Universidad Carlos Iii De Madrid Método para la detección y corrección de errores en memorias volátiles
WO2017126733A1 (fr) * 2016-01-19 2017-07-27 연세대학교 산학협력단 Appareil et procédé de codage ldpc approprié pour une communication de grande fiabilité et à faible latence
CN109495206B (zh) * 2017-09-11 2020-06-30 上海朗帛通信技术有限公司 一种被用于无线通信的用户、基站中的方法和设备
JP6921216B2 (ja) * 2017-09-27 2021-08-18 三菱電機株式会社 符号化装置、送信機、復号装置および受信機
US11016844B2 (en) * 2019-03-15 2021-05-25 Toshiba Memory Corporation Error correction code structure
US11150839B2 (en) * 2019-12-19 2021-10-19 Western Digital Technologies, Inc. Host and method for interleaving data in a storage system for enhanced quality of service
US11221950B2 (en) * 2019-12-19 2022-01-11 Western Digital Technologies, Inc. Storage system and method for interleaving data for enhanced quality of service
KR20220031776A (ko) * 2020-09-03 2022-03-14 삼성전자주식회사 반도체 메모리 장치 및 그것의 동작 방법

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5627935A (en) * 1994-11-11 1997-05-06 Samsung Electronics Co., Ltd. Error-correction-code coding & decoding procedures for the recording & reproduction of digital video data
US5778139A (en) * 1995-05-29 1998-07-07 Samsung Electronics Co., Ltd. Digital video data recording with outer-error-correction coding of trick-play data and apparatus for use therewith
US6732315B2 (en) * 2000-01-31 2004-05-04 Texas Instruments Incorporated Home networking over phone lines
US6289000B1 (en) * 2000-05-19 2001-09-11 Intellon Corporation Frame control encoder/decoder for robust OFDM frame transmissions
JP2002074862A (ja) 2000-08-25 2002-03-15 Toshiba Corp データ処理方法及び装置及び記録媒体及び再生方法及び装置
JP4130534B2 (ja) * 2001-02-07 2008-08-06 株式会社東芝 情報記録媒体、情報記録装置、情報記録方法、情報再生装置、及び情報再生方法
JP3745709B2 (ja) * 2002-06-28 2006-02-15 インターナショナル・ビジネス・マシーンズ・コーポレーション 符号化装置、復号化装置、符号化方法、復号化方法、プログラム、プログラム記録媒体、及びデータ記録媒体
JP2004193727A (ja) * 2002-12-09 2004-07-08 Hitachi Ltd 信号処理方法及び信号処理回路
CN100412979C (zh) * 2003-10-08 2008-08-20 宇田控股有限公司 错误码更正方法与装置
JP4543895B2 (ja) * 2004-11-17 2010-09-15 ソニー株式会社 データ処理方法、データ記録装置及びデータ伝送装置
JP2007087529A (ja) * 2005-09-22 2007-04-05 Rohm Co Ltd 信号復号装置、信号復号方法、および記憶システム
JP4864535B2 (ja) * 2006-05-16 2012-02-01 三菱電機株式会社 送受信装置及び送受信方法
US8032812B1 (en) 2006-10-04 2011-10-04 Marvell World Trade Ltd. Error correction decoding methods and apparatus
US8194750B2 (en) * 2006-10-16 2012-06-05 Samsung Electronics Co., Ltd. System and method for digital communication having a circulant bit interleaver for equal error protection (EEP) and unequal error protection (UEP)
JP2007149340A (ja) * 2007-03-16 2007-06-14 Toshiba Corp データ処理方法及び情報記録媒体

Also Published As

Publication number Publication date
JP5309889B2 (ja) 2013-10-09
RU2011115420A (ru) 2012-10-27
RU2504848C2 (ru) 2014-01-20
JP2010103882A (ja) 2010-05-06
EP2343705A1 (fr) 2011-07-13
US20110246863A1 (en) 2011-10-06
CN102187395B (zh) 2015-07-22
US8539322B2 (en) 2013-09-17
EP2343705B1 (fr) 2014-07-16
WO2010050446A1 (fr) 2010-05-06
EP2343705A4 (fr) 2012-12-12
CN102187395A (zh) 2011-09-14

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Legal Events

Date Code Title Description
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B06T Formal requirements before examination [chapter 6.20 patent gazette]
B11T Dismissal: dismissal of application maintained