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BE891213A - CARRIER ELEMENT FOR INTEGRATED CIRCUIT COMPONENT - Google Patents

CARRIER ELEMENT FOR INTEGRATED CIRCUIT COMPONENT Download PDF

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Publication number
BE891213A
BE891213A BE6/47553A BE6047553A BE891213A BE 891213 A BE891213 A BE 891213A BE 6/47553 A BE6/47553 A BE 6/47553A BE 6047553 A BE6047553 A BE 6047553A BE 891213 A BE891213 A BE 891213A
Authority
BE
Belgium
Prior art keywords
emi
component
carrier element
integrated circuit
film
Prior art date
Application number
BE6/47553A
Other languages
French (fr)
Inventor
J Hoppe
Yahya Haghiri-Tehrani
Original Assignee
Gao Ges Automation Org
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gao Ges Automation Org filed Critical Gao Ges Automation Org
Publication of BE891213A publication Critical patent/BE891213A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745Mounting details of integrated circuit chips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Theoretical Computer Science (AREA)
  • Wire Bonding (AREA)

Description

       

   <EMI ID=1.1>  <EMI ID=2.1> 

  
conductrice* du réseau soient relire par uns de leur*

  
 <EMI ID=3.1> 

  
composent et rejoignant par leurs autres extrémités des surfaces de contact.

  
 <EMI ID=4.1> 

  
circuits intégrés sont logés dans des boîtiers d'une manipulation simple, par exemple dans ce qu'on appelle  des bottiers double-ligne, qui présentent un grand volume

  
 <EMI ID=5.1> 

  
inconvénient surtout dans le cas d'agencements complexes de circuits lorsqu'on doit loger ceux-ci dans un volume extrêmement étroit.

  
On a par conséquent déjà proposé de mettre en oeuvre les composants à circuits intégrés dans une condition non enrobée, auquel cas le composant est monté, en vue d'une meilleure manipulation, par exemple sur une bande de film. A cet égard, on peut citer l'agencement connu sous la désignation allemande " Mikropack-Anordnung" ( se référer à ce sujet au document de la Société Siemens

  
 <EMI ID=6.1> 

  
qui peut être utilisé avantageusement dans tous les cas

  
où on ne dispose que d'un volume de montage étroitement limité pour un ensemble de circuits ( circuits pour mordre,

  
 <EMI ID=7.1> 

  
Comme matière première pour l'agencement précité, on utilise une bande de matière en feuille -résistant à la température, dans laquelle on poinçonne à intervalles égaux des fenêtres adaptées aux dimensions du composant.

  
La bande est revêtue d'une matière conductrice dans laquelle on forme par décapage des voies conductrices dont les extrémités s'étendent en porte-à-faux dans l'évidement de fenêtre. Enfin les points de jonction du composant sont reliés avec les extrémités correspondantes des voies condu&#65533;trices. 

  
 <EMI ID=8.1> 

  
 <EMI ID=9.1> 

  
 <EMI ID=10.1> 

  
d'incorporer dea composants non enrobés du type précité 

  
 <EMI ID=11.1> 

  
 <EMI ID=12.1> 

  
 <EMI ID=13.1> 

  
 <EMI ID=14.1> 

  
 <EMI ID=15.1> 

  
aussi petite que possible. D'autre part les surfaces de  contact doivent être disposées sur le film portant la  composant de telle sorte qu'il soit possible d'établir  directement un contact avec des fiches par exemple lors de l'utilisation de la carte dans une machine automatique.

  
Du fait que, avec l'agencement précité, les surfaces de contact, qui doivent comporter, lors d'un établissement galvanique de contact dans une machine automatique, une surface mini&#65533;le de 1 à 2 mm2, sont réparties autour de l'évidement de fenêtre, l'ensemble du

  
 <EMI ID=16.1> 

  
ailes du composant à circuit intégré proprement dit. 

  
La présente invention a pour but de fournir- un  élément porteur pour composants à circuits intégrés, qui possède, par comparaison aux agencements connus jusqu'à  maintenant, des dimensions mieux adaptées au composant à circuit intégré.

  
Le problème est résolu selon l'invention en.ce

  
 <EMI ID=17.1> 

  
que les surfaces de contact sont placées sur le composant, sur le côté de la feuille qui est opposé au composant, à  l'intérieur du contour de ce dernier et en ce que les liaisons des extrémités des voies conductrices avec les points correspondants de jonction du composant sont établies au travers de fenêtre poinçonnées dans la feuille* La solution conforme à l'invention permet d'obtenir des éléments porteurs compacts, à établissement de contacts par film, de surfaces adaptées à celle des composants à circuits intégrés et qui peuvent être utilisés dans tous les cas où on ne dispose que de très petites surfaces de montage. 

  
Les faibles dimensions de l'élément porteur

  
de circuit intégré font en sorte que seulement une petite surface correspondante soit soumise à des sollicitations mécaniques. Pour cette raison, l'élément convient particulièrement bien pour être incorporé à des supports, comme par exemple des cartes d'identité, qui sont soumises en cours d'usage à de fortes sollicitations mécaniques.

  
D'autres avantages et caractéristiques de l'invention seront mis en évidence dans la suite dé la description, donnée à titre d'exemple non limitatif, en référence aux dessins annexés dans lesquels :

  
la fig. 1 est une vue en plan d'un agencement conforme à la présente invention,

  
la fig. 2 représente en coupe l'agencement de la fig. 1, et

  
les fig. 3 à 6 représentent d'autres exemples de réalisation de l'invention.

  
Dans l'exemple de réalisation représenté sur les fig. 1 et 2, le composant à circuit intégré 6 est monté sur une bande de film 1. Les perforations 2 prévues d'une manière classique dans des bandes de film, par exemple des films super-8, peuvent être utilisées pour le transport du film pendant les phases de production de l'élément porteur.

  
 <EMI ID=18.1> 

  
surfaces de contact 4 dont les extrémités 7 de voies conductrices sont reliées aux points correspondants de jonction

  
 <EMI ID=19.1> 

  
La disposition et l'étendue des surfaces de contact 4 sont choisies de manière que, pendant le couplage de l'élément porteur avec un appareil électrique, il soit possible d'établir directement des contacts, par exemple à l'aide de brochas de contact appropriées. Les extrémités

  
7 des voies conductrices sont disposées au-dessus de fenêtres 3 poinçonnées dans le film 1. Dans un mode avantageux de réalisation, les fenêtres 3 sont profilées de manière que les extrémités des voies conductrices pénètrent en porte-à-faux dans l'évidement de fenêtre 3 et puissent ainsi être reliées, pendant l'établissement du contact,

  
au travers de la fenêtre avec le composant à circuit intégré.

  
Pour la fabrication de l'élément porteur, le  film 1 est soumis dans une première opération et à intervalles réguliers à un processus de poinçonnage, de manière à produire par exemple le modèle de poinçonnage comportant les fenêtres 3 et représenté sur la fig. 1. Ensuite, un côté du film est revêtu d'une couche conductrice, dans laquelle on forme par décapage par des procédés connus les

  
 <EMI ID=20.1> 

  
du composant à circuit intégré. 

  
Dans l'exemple représenté, les voies conductrices sont décapées de telle sorte qu'on obtienne sur.la surface du composant, à l'intérieur du contour de ce dernier sur le film 1, les surfaces de contact 4 et, sur les fenêtres poinçonnées, les voies conductrices 7 assurant la liaison avec le composant.

  
Pour terminer la fabrication de l'élément porteur, les extrémités 7 des voies conductrices sont guidées au travers des fenêtres poinçonnées 3 du film jusqu'aux points de jonction 8 du composant à circuit intégré 6 et elles sont reliées à celui-ci par un processus de brasage.

  
Comme le montre la fig. 2, le composant - qui est maintenu de façon flexible - peut être pourvu de contacts à une certaine distance du film 1. Lorsqu'on ne dispose, pour l'application ultérieure de l'élément porteur, que d'une très faible profondeur de montage, on assure la jonction du composant 6, par exemple par collage, avec les extrémités des voies conductrices en l'appliquant directement contre le film. 

  
Pour les éléments porteurs représentés sur les fig. 3 et 4, les extrémités des voies conductrices des surfaces de contact sont pré-conditionnées de manière qu'il  soit également possible de monter des composants à circuits intégrés avec des points de jonction qui sont placés à des distances plus rapprochées par rapport aux premiers exemples.

  
Dans le mode de réalisation représenté sur la fig. 3, les extrémités de voies conductrices 10 sont incurvées, avant l'établissement des contacts sur le composant 11, au travers des fenêtres poinçonnées 3 sur le côté du film qui est opposé aux surfaces de contact 4. Les points de jonction 8 du composant 11 sont alors reliés avec les extrémités recourbées 10 des voies conductrices.

  
Dans l'exemple de réalisation représenté sur la fige 4, les extrémités de voies conductrices 10 sont recourbées au travers des fenêtres poinçonnées 3 du film autour du composant à circuit intégré et elles sont ensuite liées aux points de jonction du composant. Le composant peut être fixé, avant l'opération de pliage, à l'aide d'un adhésif approprié 12 sur le film 1 afin qu'il soit solidement bloqué en position pendant le processus de pliage.

  
La fig. 5 représente un exemple de réalisation de l'élément porteur selon l'invention, dans lequel le composant à circuit intégré 11 est pourvu de contacts par une technique dite de " bondérisation ". Dans ce cas, les points de jonction 8 du composant 11 sont reliés, par l'intermédiaire de fins filaments d'or 15 au travers des fenêtres 3 du film, avec les extrémités de voies conductrices des surfaces de contact. Dans ce mode de réalisation, comme indiqué par exemple sur la fige 5, la forme des extrémités de voies conductrices 10, qui font saillie audessus des fenêtres poinçonnées 3, est tout à fait efficace.

  
La fig. 6 représente un exemple de réalisation de l'élément porteur selon l'invention, dans lequel intervient un composant à circuit intégré 11 qui est pourvu de points de jonction 8a, 8b sur le côté avant et sur le côté arrière. Les techniques utilisées pour 1 'établissement des contacts ont été décrites en référence aux figures 2 et 3.

  
En plus de la possibilité de former les surfaces de contact par décapage* d'un revêtement conducteur du film, on sait également réaliser les éléments, indépendamment d'un support ou d'un film, dans une opération séparée sous la forme de ce qu'on appelle un réseau de contact.

  
 <EMI ID=21.1> 

  
voies conductrices ou bien les surfaces de contact est fixé sur le film pendant le processus d'établissement de contacts par exemple à l'aide d'un adhésif. Dans la même opération, les extrémités de voies conductrices peuvent,

  
 <EMI ID=22.1> 

  
reliées aux points correspondants de jonction du composant.

  
Dans le procédé précité, toutes les surfaces de contact et les extrémités associées de voies conductrices sont mises en oeuvre en commun car elles constituent des éléments d'une ossature commune, qui est appelée un réseau de contact.

  
D'autre part il est possible de fabriquer les éléments ( surface de contact avec voie conductrice ) sous la forme de pièces individuelles et de les mettre en oeuvre conformément à la présente invention. Les éléments peuvent dans ce cas être formés par poinçonnage d'un matériau conducteur, qui est le cas échéant relié au

  
film porteur, par exemple d'après le '[deg.] principe des étiquettes ". 

  
 <EMI ID=23.1> 

  
 <EMI ID=24.1> 

  
ce qu'on appelle' un réseau de contact sur un support de telle sort" que les voies conductrices du réseau soient reliées par une de leurs extrémités avec les points correspondants de jonction du composant et rejoignent par leurs autres extrémités des surfaces de contact,  caractérisa en ce que les surfaces de contact (4) sont disposées, sur le côté de la feuille (1) qui est opposé

  
 <EMI ID=25.1> 

  
 <EMI ID=26.1> 

  
 <EMI ID=27.1> 

  
établies avec les points correspondants de jonction (8, Sa,

  
 <EMI ID=28.1> 

  
çonnées dans la feuille (1).



   <EMI ID = 1.1> <EMI ID = 2.1>

  
* conductor of the network to be reread by one of their *

  
 <EMI ID = 3.1>

  
compose and join by their other ends contact surfaces.

  
 <EMI ID = 4.1>

  
integrated circuits are housed in housings which are easy to handle, for example in so-called double-line shoemakers, which have a large volume

  
 <EMI ID = 5.1>

  
disadvantage especially in the case of complex arrangements of circuits when they have to be housed in an extremely narrow volume.

  
It has therefore already been proposed to use the integrated circuit components in an uncoated condition, in which case the component is mounted, for better handling, for example on a film strip. In this regard, we can cite the arrangement known under the German designation "Mikropack-Anordnung" (refer to this document in the document of the Siemens Company

  
 <EMI ID = 6.1>

  
which can be used advantageously in all cases

  
where there is only a tightly limited mounting volume for a set of circuits (circuits for biting,

  
 <EMI ID = 7.1>

  
As a raw material for the above-mentioned arrangement, a strip of temperature-resistant sheet material is used, in which windows adapted to the dimensions of the component are punched at equal intervals.

  
The strip is coated with a conductive material in which conductive tracks are formed by pickling, the ends of which extend in a cantilever fashion in the window recess. Finally, the junction points of the component are connected with the corresponding ends of the conductive paths.

  
 <EMI ID = 8.1>

  
 <EMI ID = 9.1>

  
 <EMI ID = 10.1>

  
to incorporate uncoated components of the above type

  
 <EMI ID = 11.1>

  
 <EMI ID = 12.1>

  
 <EMI ID = 13.1>

  
 <EMI ID = 14.1>

  
 <EMI ID = 15.1>

  
as small as possible. On the other hand, the contact surfaces must be arranged on the film carrying the component so that it is possible to establish direct contact with cards, for example when the card is used in an automatic machine.

  
Because, with the above arrangement, the contact surfaces, which must include, during a galvanic contact establishment in an automatic machine, a minimum area of 1 to 2 mm2, are distributed around the window recess, the entire

  
 <EMI ID = 16.1>

  
wings of the integrated circuit component proper.

  
The object of the present invention is to provide a carrier element for components with integrated circuits, which has, by comparison with the arrangements known up to now, dimensions better suited to the component with integrated circuit.

  
The problem is solved according to the invention en.ce

  
 <EMI ID = 17.1>

  
that the contact surfaces are placed on the component, on the side of the sheet which is opposite to the component, inside the contour of the latter and in that the connections of the ends of the conducting paths with the corresponding points of junction of the component are established through window punched in the sheet * The solution according to the invention makes it possible to obtain compact carrier elements, with film contact establishment, of surfaces adapted to that of the integrated circuit components and which can be used in all cases where only very small mounting surfaces are available.

  
The small dimensions of the carrier element

  
integrated circuit means that only a small corresponding surface is subjected to mechanical stresses. For this reason, the element is particularly suitable for being incorporated into supports, such as for example identity cards, which are subjected during use to high mechanical stresses.

  
Other advantages and characteristics of the invention will be highlighted in the following description, given by way of nonlimiting example, with reference to the appended drawings in which:

  
fig. 1 is a plan view of an arrangement in accordance with the present invention,

  
fig. 2 shows in section the arrangement of FIG. 1, and

  
fig. 3 to 6 show other embodiments of the invention.

  
In the embodiment shown in FIGS. 1 and 2, the integrated circuit component 6 is mounted on a film strip 1. The perforations 2 provided in a conventional manner in film strips, for example super-8 films, can be used for transporting the film during the production phases of the carrier element.

  
 <EMI ID = 18.1>

  
contact surfaces 4, the ends 7 of conductive tracks of which are connected to the corresponding junction points

  
 <EMI ID = 19.1>

  
The arrangement and extent of the contact surfaces 4 are chosen so that, during the coupling of the carrier element with an electrical device, it is possible to establish contacts directly, for example using contact brochas appropriate. The extremities

  
7 of the conductive paths are arranged above windows 3 punched in the film 1. In an advantageous embodiment, the windows 3 are profiled so that the ends of the conductive paths enter in a cantilever fashion in the recess of window 3 and can thus be linked, during the establishment of the contact,

  
through the window with the integrated circuit component.

  
For the production of the carrier element, the film 1 is subjected in a first operation and at regular intervals to a punching process, so as to produce for example the punching model comprising the windows 3 and shown in FIG. 1. Next, one side of the film is coated with a conductive layer, in which the pickling is formed by known methods.

  
 <EMI ID = 20.1>

  
of the integrated circuit component.

  
In the example shown, the conductive tracks are etched so that one obtains on the surface of the component, inside the outline of the latter on the film 1, the contact surfaces 4 and, on the punched windows , the conductive channels 7 ensuring the connection with the component.

  
To complete the manufacture of the carrier element, the ends 7 of the conductive paths are guided through the punched windows 3 of the film to the junction points 8 of the integrated circuit component 6 and they are connected to the latter by a process soldering.

  
As shown in fig. 2, the component - which is held in a flexible manner - can be provided with contacts at a certain distance from the film 1. When only a very shallow depth is available for the subsequent application of the carrier element mounting, the component 6 is joined, for example by gluing, with the ends of the conductive tracks by applying it directly against the film.

  
For the load-bearing elements shown in fig. 3 and 4, the ends of the conductive paths of the contact surfaces are preconditioned so that it is also possible to mount components with integrated circuits with junction points which are placed at closer distances from the first examples .

  
In the embodiment shown in FIG. 3, the ends of the conductive tracks 10 are curved, before the establishment of the contacts on the component 11, through the punched windows 3 on the side of the film which is opposite to the contact surfaces 4. The junction points 8 of the component 11 are then connected with the curved ends 10 of the conductive tracks.

  
In the embodiment shown in FIG. 4, the ends of the conductive tracks 10 are bent through the punched windows 3 of the film around the integrated circuit component and they are then linked to the junction points of the component. The component can be fixed, before the folding operation, using a suitable adhesive 12 to the film 1 so that it is securely locked in position during the folding process.

  
Fig. 5 shows an exemplary embodiment of the carrier element according to the invention, in which the integrated circuit component 11 is provided with contacts by a technique called "bonderization". In this case, the junction points 8 of the component 11 are connected, by means of fine gold filaments 15 through the windows 3 of the film, with the ends of the conductive tracks of the contact surfaces. In this embodiment, as indicated for example in FIG. 5, the shape of the ends of conductive tracks 10, which project above the punched windows 3, is quite effective.

  
Fig. 6 shows an embodiment of the carrier element according to the invention, in which an integrated circuit component 11 is involved which is provided with junction points 8a, 8b on the front side and on the rear side. The techniques used for establishing contacts have been described with reference to Figures 2 and 3.

  
In addition to the possibility of forming the contact surfaces by etching * of a conductive coating of the film, it is also known to produce the elements, independently of a support or of a film, in a separate operation in the form of what is called a contact network.

  
 <EMI ID = 21.1>

  
conductive paths or else the contact surfaces is fixed to the film during the contact establishment process for example using an adhesive. In the same operation, the ends of conductive tracks can,

  
 <EMI ID = 22.1>

  
connected to the corresponding junction points of the component.

  
In the aforementioned method, all of the contact surfaces and the associated ends of conductive tracks are used in common since they constitute elements of a common framework, which is called a contact network.

  
On the other hand, it is possible to manufacture the elements (contact surface with conductive path) in the form of individual parts and to use them in accordance with the present invention. The elements can in this case be formed by punching a conductive material, which is if necessary connected to the

  
carrier film, for example according to the '[deg.] principle of labels'.

  
 <EMI ID = 23.1>

  
 <EMI ID = 24.1>

  
what is called "a contact network on a support of such a kind" that the conductive paths of the network are connected by one of their ends with the corresponding junction points of the component and join by their other ends of the contact surfaces, characterized in that the contact surfaces (4) are arranged on the opposite side of the sheet (1)

  
 <EMI ID = 25.1>

  
 <EMI ID = 26.1>

  
 <EMI ID = 27.1>

  
established with the corresponding junction points (8, Sa,

  
 <EMI ID = 28.1>

  
shown in sheet (1).


    

Claims (1)

2. Elément porteur selon la revendication 1, caractérisé en ce que les extrémités de voies conductrices 2. Carrier element according to claim 1, characterized in that the ends of conductive tracks (7) sont reliées au travers des fenêtres (3) directement <EMI ID=29.1> (7) are connected through windows (3) directly <EMI ID = 29.1> fenêtres (3). windows (3). 3. Elément porteur selon la revendication 1, caractérisa en ce que les extrémités de voies conductrices 3. Carrier element according to claim 1, characterized in that the ends of conductive tracks (10) recouvrant en étendue les fenêtres (3) et en ce que les points de jonction (8) sont reliés par l'intermédiaire (10) covering in extent the windows (3) and in that the junction points (8) are connected by the intermediary <EMI ID=30.1>  <EMI ID = 30.1> <EMI ID=31.1>  <EMI ID = 31.1> trices (10). trices (10). 4. Elément porteur selon la revendication 1, caractérisé en ce que les extrémités de voies conductrices 4. Carrier element according to claim 1, characterized in that the ends of conductive tracks <EMI ID=32.1>  <EMI ID = 32.1> côté arrière du composant (11;, le cas échéant collé avec la feuille (1), et sont reliées aux points de jonction (8) se trouvant dans cette zone. rear side of the component (11 ;, optionally glued with the sheet (1), and are connected to the junction points (8) located in this area. 5. Elément porteur selon la revendication 1, caractérisé en ce que les extrémités de voies conductrices 5. Carrier element according to claim 1, characterized in that the ends of conductive tracks (10) sont insérées au travers des fenêtres (3) entre le côté inférieur de la feuille et le côté supérieur du <EMI ID=33.1> (10) are inserted through the windows (3) between the lower side of the sheet and the upper side of <EMI ID = 33.1> <EMI ID=34.1>  <EMI ID = 34.1> <EMI ID=35.1>  <EMI ID = 35.1> <EMI ID=36.1>  <EMI ID = 36.1> <EMI ID=37.1>  <EMI ID = 37.1> qu'une partie des extrémités de voies conductrices sont that part of the ends of conductive tracks are <EMI ID=38.1>  <EMI ID = 38.1> <EMI ID=39.1>  <EMI ID = 39.1>
BE6/47553A 1980-11-21 1981-11-20 CARRIER ELEMENT FOR INTEGRATED CIRCUIT COMPONENT BE891213A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE3043877 1980-11-21

Publications (1)

Publication Number Publication Date
BE891213A true BE891213A (en) 1982-03-16

Family

ID=6117252

Family Applications (1)

Application Number Title Priority Date Filing Date
BE6/47553A BE891213A (en) 1980-11-21 1981-11-20 CARRIER ELEMENT FOR INTEGRATED CIRCUIT COMPONENT

Country Status (2)

Country Link
JP (1) JPS57145354A (en)
BE (1) BE891213A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0615275B2 (en) * 1987-04-13 1994-03-02 イビデン株式会社 Printed wiring board for IC card
GB2536064B (en) 2015-03-06 2017-06-07 Dyson Technology Ltd A suction nozzle for a vacuum cleaner

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4064552A (en) * 1976-02-03 1977-12-20 Angelucci Thomas L Multilayer flexible printed circuit tape
JPS5332382A (en) * 1976-09-03 1978-03-27 Suwa Seikosha Kk Flexible printed substrate structure for electronic wrist watch
JPS5811113B2 (en) * 1977-09-21 1983-03-01 松下電器産業株式会社 electronic circuit equipment
JPS5826667B2 (en) * 1977-03-08 1983-06-04 松下電器産業株式会社 semiconductor equipment
FR2439438A1 (en) * 1978-10-19 1980-05-16 Cii Honeywell Bull RIBBON CARRYING ELECTRIC SIGNAL PROCESSING DEVICES, MANUFACTURING METHOD THEREOF AND APPLICATION THEREOF TO A SIGNAL PROCESSING ELEMENT

Also Published As

Publication number Publication date
JPS57145354A (en) 1982-09-08
JPS6354219B2 (en) 1988-10-27

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