AU613467B2 - Current surge limiter - Google Patents

Description

613467 OiIamw 0 0 COMMOWEALTH OF AUSTMAA PATENTS A02 1952-1969 COMPLETE SPECIJVICATION FOR THE RVEjNrtON ENTIED "'CtRRENT SURGE LIMITER" The following statement is a full descr'iption of this Invention, inc 11ing the best method of' performning it known to us,.- This invention relates to a circuit arrangement for limiting current surge caused by uncharged capacitors in a sub-assembly when it is plugged into working equipment.

Such circuits prevent interruptions occurring in the power supply to a device already in operation when plugging in a sub-assembly and thus causing breakdowns if uncharged capacitors of the sub-assembly have to be charged in the shortest possible time.

Various circuits of this type are already known. They have either a protective resistor in the power supply cable that after a certain time is shorted out by means of a switch or they use current limiters in the power supply cable which attenuate high current surges.

The use of a protective resistor ensures that the capacitors to be charged are always only partially charged. The residual load, whose current differential corresponds to the drop in the voltage caused in the protective resistor, takes place instantly through control of the switch shorting out the protective resistor.

Current limiters are suitable primar y for the attenuation of short, extremely steep current surges. Should broader current peaks be required to be attenuated then these current limiters must have high inductive resistor values and are therefore large, heavy and costly.

An object of the present invention is provide a circuit arrangement by means of which it is possible to slowly charge, up to a full charge, the capacitors of a plug-in sub-assembly and one which has a lower weight and smaller space requirements in comparison with equally effective inductance assembly components.

The N channel MOS field-effect transistor (MOSFET) of the enhancement type used in the present invention has extremely low ohmic resistance in the controlled condition so that only a small amount of power loss in the form of heat has to be dissipated and a voltage drop arising in its drain/source elements can be ignored. MOSFET, being a voltage controlled ii assembly component, requires hardly any energy so that for the production of the control voltage a control switch which needs to supply only a small voltage is sufficient and therefore requires only very small capacitors for smoothing out its output voltage. Such a control switch can be directly switched to the power supply without fear of charging activities that lead to interruptions to the power supply.

In order that the invention may be carried into effect, embodiments thereof will now be described in relation to the drawings, in which: Fig. 1 shows the circuit arrangement with a drive circuit feed through two complementary Schmitt triggers.

Fig. 2 shows the circuit arrangement with a drive via a voltage mulo* tiplier.

Referring to Fig. 1, the circuit arrangement comprises an N channel a 4 MOS field-effect transistor (MOSFET) of the enhancement type as a switch, o a one rectifier GS controlling this and one AC generator that, as is known, is made up of one Schmitt trigger TI, a resistor RG and a capacitor CG.

The MOSFET is controlled by the rectifier circuit in such a way that it a 6 0 S slowly moves from a non-conducting state to a low ohmic conducting state 9 a and then (by means of a symbolically indicated resistor RL and a capacitor CL) connects resistive loads and uncharged capacitors to a newly plugged-in sub-assembly BG with power supply +VB.

As soon as the sub-assembly, on which the circuit arrangement shown in Figure 1 is located, is connected to the power supply via a contact plug ST, the Schmitt trigger Tl receives its operating voltage. It then oscillates as a multivibrator with a frequency that is set by an R0 network made up of the resistor RG aid the capacitor CG.

The output signal of the Schmitt trigger TI is fed, on the one hand, directly and, on the other hand, inverted by the second Schmitt trigger T2 via coupling capacitors OKI and CK2 of the rectifier circuit.

1 .4 Mhe rectifier circuit consists of. two anti-parallel diodes Dl and D2 connected to the coupling capacitors and a third compensating diode D3 connected to the coupling capacitors and thus connecting one side the antiparallel diodes. On the output side, the rectifier circuit works on a filter capacitor CS whose plates are attached to the source and the gate connections of the MOSFE and on which the control voltage for the MOSFET is queued. A resistor RS is switched parallel to the filter capacitor in order to ensure a rapid discharging of the filter capacitor after disconnection of the power supply and thus also secure the functioning capability of the current liiter circuit even after short interruptions to the power supply.

Should the voltage of the f ilter capacitor be increased slowly after plugging in the sub-assembly, then the MOSFBW is brought slowly from a high ohmic state to the conductive state corresponding to its characteristic t 4 curve.

Since through the use of an N channel enhancement type MO0SFET a saturation and thus a low ohmic advanced control is achieved only when the 4 gate/source voltage is around 4I v, the control voltage must be at least 4I v higher than the power supply to be connected. This is achieved by control 44 circuit consisting of an AC generator and rectifier circuit as shown in Figure 1. W~e to the complementary power supply to the rectifier circuit the control voltage doubles Itself in relation to the output voltage of the Schmitt triggers fed in whiich is lower than the power supply, In addition, the control voltage queued at the filter capacitor CS Is potential free as a result of the capacitance *6iipling of the rectifier circuit so that it clueuea independently of the source potential on the gate/dource section of the MOSM~E.

Should a timing pulse generator be In opqration in the device in which the sub-assembly Is to be plugged, then Instead of a special AC generator a connection to the timing pulse generator QLK can also be provided for and 4 the control voltage can be obtained through the rectification of the pulse signal. The connection to the timing pulse generator CLK, drawn as a broken line in Figure 1, then begins to function. The RC generator made up of the Schmitt trigger T1, the resistor RG and capacitor CG is not applUnable.

The switching on time of such a circuit arrangement is determine] by the values of the filter capacitor and the coupling capacitors as well as by the frequency of the AC generator or the timing pulse generator and directly in respect of the relationship of the capacitors of the filter capacitor and coupling capacitors and inversely proportional to the frequency of the AC generator.

If relatively short switching on times are permitted, the gate/source o 0 capacitance of the MOSFET is often sufficient as the filter capacitor. In o 4O case of particularly long switching on times an additional RC network may o be reswitched to the filter capacitor on whose capacitor the control volt- 0 4 V 0o age is then measured off and whose resistance to the rapid discharging is shorted out by means of a diode switched to a high resistance direction.

e In order to achieve a high control voltage, a voltage multiplier cir- ScQuit (Villard circuit) as shown in Figure 2 can be used in place of the rectifier circuit shown in Figure 1. A complementary power supply is then not applicable. The AC generator (Schmitt trigger T3 in Figure 2 with resistor RG and capacitor CG) then operates single phased via the coupling capacitor C5 1 on the Villard circuit. The Villard circuit consists of diodes D4 to DT, capacitors CK3, CS1 and CS2 and a discharging resistor RS.

SThe control voltage is taken from the series circuit of the capacitors CSl and CS2 that has the effect of a filter capacitor. In the case of the circuit arrangement shown in Figure 2, an external pulse signal for obtaining the control voltage can also be used instead of an AC generator.

Claims (8)

1. A surge limiting circuit arrangement for use in a plug-in sub-assembly to limit a current surge caused by current charging uncharged capacitance means in a plug. in sub-assembly when the sub-assembly is plugged into an operating device powered by a supply voltage, the arrangement comprising a semiconductor switch located in the sub-assembly whose switching elements lie in the sub-assembly's power supply circuit path, the control element of the switch being coupled to a control circuit, wherein said semiconductor switch is an N channel MOS field-effect transistor of the enhancement type, wherein, when the sub-assembly is plugged into the operating device, the control t: 10 circuit is connected to the supply voltage, and wherein the control circuit generates a slowly rising control voltage which is applied to the control clement whereby the r t t switching path provided by the switching elements is driven from a non-conducting state to a low impedance conducting state over a predetermined time so that the ot current to charge the capacitance means is supplied in a controlled manner.

2. A circuit arrangement as claimed in claim 1, wherein the control circuit com- prises an alternating voltage generator means and a voltage doubling rectifier circuit means said control voltage being provided by a capacitor means across said rectifier circuit's output. A circuit arrangement as claimed in claim 2, wherein the rectifier circuit is capacitively coupled with the alternating voltage generator means.

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4. A circuit arrangement as claimed in claim 2 or claim 3, wherein the capacitor means across the rectifier circuit's output is the gate/source capacitance of the MOS field-effect transistor. I

5. A circuit arrangement as claimed in any one of claims 2, 3 or 4 wheein the 25 rectifier circuit comprises first and second diodes connected in anti-parall' and first inverter means inverting the output of the alternating voltage generator means, wherein the alternating voltage signal is applied to the first diode via a first coupling capacitor, and the inverted alternating voltage signal is applied via a second coupling capacitor to the second diode, the functions of the first and second diodes with the respective first and second coupling capacitors being connected by a compensating diode.

6. A circuit arrangement as claimed in any one of claims 2 to 4, wherein the rectifier circuit is in the form of a voltage multiplier circuit. i

7, A circuit arrangement as clah id in any one of claims 2 to 6, wherein the al- Sr ternating voltage generator means is an extcrtal clock. 4 j o. 'A I 7

8. A circuit arrangement substantially as herein cscribcd with rcfercncc to Figs. I and 2 or the accompanying dr~awings. DATED THIS TWENTIETH DAY OF MAY 1991. A LCATRL N. t w t t #1 t~ I# t t I I If II t* t I I ftttl t I It It I I II I I I III I II I I I I I I. II I I Il I II