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AU2003291323A1 - Trench isolation structure for a semiconductor device with a different degree of corner rounding and a method of manufacturing the same - Google Patents

Trench isolation structure for a semiconductor device with a different degree of corner rounding and a method of manufacturing the same

Info

Publication number
AU2003291323A1
AU2003291323A1 AU2003291323A AU2003291323A AU2003291323A1 AU 2003291323 A1 AU2003291323 A1 AU 2003291323A1 AU 2003291323 A AU2003291323 A AU 2003291323A AU 2003291323 A AU2003291323 A AU 2003291323A AU 2003291323 A1 AU2003291323 A1 AU 2003291323A1
Authority
AU
Australia
Prior art keywords
manufacturing
semiconductor device
same
isolation structure
trench isolation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003291323A
Inventor
Gert Burbach
Stephan Kruegel
Ralf Van Bentum
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE10259728A external-priority patent/DE10259728B4/en
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of AU2003291323A1 publication Critical patent/AU2003291323A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H01L21/76235Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls trench shape altered by a local oxidation of silicon process step, e.g. trench corner rounding by LOCOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
AU2003291323A 2002-12-19 2003-11-05 Trench isolation structure for a semiconductor device with a different degree of corner rounding and a method of manufacturing the same Abandoned AU2003291323A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
DE10259728A DE10259728B4 (en) 2002-12-19 2002-12-19 A method of fabricating a trench isolation structure and method of controlling a degree of edge rounding of a trench isolation structure in a semiconductor device
DE10259728.6 2002-12-19
US10/444,191 2003-05-23
US10/444,191 US6943088B2 (en) 2002-12-19 2003-05-23 Method of manufacturing a trench isolation structure for a semiconductor device with a different degree of corner rounding
PCT/US2003/035344 WO2004061945A1 (en) 2002-12-19 2003-11-05 Trench isolation structure for a semiconductor device with a different degree of corner rounding and a method of manufacturing the same

Publications (1)

Publication Number Publication Date
AU2003291323A1 true AU2003291323A1 (en) 2004-07-29

Family

ID=32714758

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003291323A Abandoned AU2003291323A1 (en) 2002-12-19 2003-11-05 Trench isolation structure for a semiconductor device with a different degree of corner rounding and a method of manufacturing the same

Country Status (5)

Country Link
EP (1) EP1573801A1 (en)
JP (1) JP2006525652A (en)
KR (1) KR20050084434A (en)
AU (1) AU2003291323A1 (en)
WO (1) WO2004061945A1 (en)

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4671970A (en) * 1986-02-05 1987-06-09 Ncr Corporation Trench filling and planarization process
JPH02118937A (en) * 1988-10-26 1990-05-07 Seiko Epson Corp Optical pickup
JPH07130725A (en) * 1993-10-29 1995-05-19 Sony Corp Semiconductor device and method of forming its element isolating film
KR100195208B1 (en) * 1996-04-15 1999-06-15 윤종용 Method of forming an element isolation region in a semiconductor device
JP3904676B2 (en) * 1997-04-11 2007-04-11 株式会社ルネサステクノロジ Method for manufacturing trench type element isolation structure and trench type element isolation structure
US6251734B1 (en) * 1998-07-01 2001-06-26 Motorola, Inc. Method for fabricating trench isolation and trench substrate contact
KR100346844B1 (en) * 2000-12-09 2002-08-03 삼성전자 주식회사 Semiconductor device having shallow trench isolation structure and method for manufacturing the same
KR100378190B1 (en) * 2000-12-28 2003-03-29 삼성전자주식회사 Method for fabricating trench isolation having sidewall oxide layers with a different thickness
US6518146B1 (en) * 2002-01-09 2003-02-11 Motorola, Inc. Semiconductor device structure and method for forming

Also Published As

Publication number Publication date
WO2004061945A1 (en) 2004-07-22
JP2006525652A (en) 2006-11-09
KR20050084434A (en) 2005-08-26
EP1573801A1 (en) 2005-09-14

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase