AU2003291348A1 - An improved barrier layer for a copper metallization layer including a low k dielectric - Google Patents
An improved barrier layer for a copper metallization layer including a low k dielectricInfo
- Publication number
- AU2003291348A1 AU2003291348A1 AU2003291348A AU2003291348A AU2003291348A1 AU 2003291348 A1 AU2003291348 A1 AU 2003291348A1 AU 2003291348 A AU2003291348 A AU 2003291348A AU 2003291348 A AU2003291348 A AU 2003291348A AU 2003291348 A1 AU2003291348 A1 AU 2003291348A1
- Authority
- AU
- Australia
- Prior art keywords
- dielectric
- low
- improved barrier
- copper metallization
- barrier layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/76808—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10250889A DE10250889B4 (en) | 2002-10-31 | 2002-10-31 | An improved SiC barrier layer for a low-k dielectric, metallization layer and method of making the same |
DE10250889.5 | 2002-10-31 | ||
US10/403,483 | 2003-03-31 | ||
US10/403,483 US6893956B2 (en) | 2002-10-31 | 2003-03-31 | Barrier layer for a copper metallization layer including a low-k dielectric |
PCT/US2003/035433 WO2004040623A2 (en) | 2002-10-31 | 2003-10-27 | An improved barrier layer for a copper metallization layer including a low k dielectric |
Publications (2)
Publication Number | Publication Date |
---|---|
AU2003291348A8 AU2003291348A8 (en) | 2004-05-25 |
AU2003291348A1 true AU2003291348A1 (en) | 2004-05-25 |
Family
ID=32231869
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2003291348A Abandoned AU2003291348A1 (en) | 2002-10-31 | 2003-10-27 | An improved barrier layer for a copper metallization layer including a low k dielectric |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU2003291348A1 (en) |
WO (1) | WO2004040623A2 (en) |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6100559A (en) * | 1998-08-14 | 2000-08-08 | Advanced Micro Devices, Inc. | Multipurpose graded silicon oxynitride cap layer |
US6784485B1 (en) * | 2000-02-11 | 2004-08-31 | International Business Machines Corporation | Diffusion barrier layer and semiconductor device containing same |
US6879046B2 (en) * | 2001-06-28 | 2005-04-12 | Agere Systems Inc. | Split barrier layer including nitrogen-containing portion and oxygen-containing portion |
US6455417B1 (en) * | 2001-07-05 | 2002-09-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming damascene structure employing bi-layer carbon doped silicon nitride/carbon doped silicon oxide etch stop layer |
JP3745257B2 (en) * | 2001-08-17 | 2006-02-15 | キヤノン販売株式会社 | Semiconductor device and manufacturing method thereof |
US6670715B2 (en) * | 2001-12-05 | 2003-12-30 | United Microelectronics Corp. | Bilayer silicon carbide based barrier |
-
2003
- 2003-10-27 AU AU2003291348A patent/AU2003291348A1/en not_active Abandoned
- 2003-10-27 WO PCT/US2003/035433 patent/WO2004040623A2/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
WO2004040623A2 (en) | 2004-05-13 |
AU2003291348A8 (en) | 2004-05-25 |
WO2004040623A3 (en) | 2004-07-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |