AU2002220164A1 - Planar structure and methods of fabricating non-volatile memory devices - Google Patents
Planar structure and methods of fabricating non-volatile memory devicesInfo
- Publication number
- AU2002220164A1 AU2002220164A1 AU2002220164A AU2016402A AU2002220164A1 AU 2002220164 A1 AU2002220164 A1 AU 2002220164A1 AU 2002220164 A AU2002220164 A AU 2002220164A AU 2016402 A AU2016402 A AU 2016402A AU 2002220164 A1 AU2002220164 A1 AU 2002220164A1
- Authority
- AU
- Australia
- Prior art keywords
- methods
- volatile memory
- memory devices
- planar structure
- fabricating non
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/40—EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09723635 | 2000-11-28 | ||
US09/723,635 US6465306B1 (en) | 2000-11-28 | 2000-11-28 | Simultaneous formation of charge storage and bitline to wordline isolation |
US09/893,026 US6541816B2 (en) | 2000-11-28 | 2001-06-27 | Planar structure for non-volatile memory devices |
US09893026 | 2001-06-27 | ||
PCT/US2001/046124 WO2002045171A1 (en) | 2000-11-28 | 2001-11-15 | Planar structure and methods of fabricating non-volatile memory devices |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2002220164A1 true AU2002220164A1 (en) | 2002-06-11 |
Family
ID=27110840
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2002220164A Abandoned AU2002220164A1 (en) | 2000-11-28 | 2001-11-15 | Planar structure and methods of fabricating non-volatile memory devices |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP1338037B1 (en) |
AU (1) | AU2002220164A1 (en) |
TW (1) | TW518726B (en) |
WO (1) | WO2002045171A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10246343B4 (en) * | 2002-10-04 | 2007-02-08 | Infineon Technologies Ag | Method for producing a semiconductor memory cell array |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5168334A (en) | 1987-07-31 | 1992-12-01 | Texas Instruments, Incorporated | Non-volatile semiconductor memory |
JPH06291330A (en) * | 1993-03-31 | 1994-10-18 | Citizen Watch Co Ltd | Semiconductor non-volatile memory element and preparation thereof |
JP3424427B2 (en) | 1995-07-27 | 2003-07-07 | ソニー株式会社 | Nonvolatile semiconductor memory device |
US6117730A (en) | 1999-10-25 | 2000-09-12 | Advanced Micro Devices, Inc. | Integrated method by using high temperature oxide for top oxide and periphery gate oxide |
-
2001
- 2001-11-15 AU AU2002220164A patent/AU2002220164A1/en not_active Abandoned
- 2001-11-15 WO PCT/US2001/046124 patent/WO2002045171A1/en not_active Application Discontinuation
- 2001-11-15 EP EP01999006A patent/EP1338037B1/en not_active Expired - Lifetime
- 2001-11-27 TW TW090129264A patent/TW518726B/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
WO2002045171A1 (en) | 2002-06-06 |
EP1338037B1 (en) | 2011-03-30 |
TW518726B (en) | 2003-01-21 |
EP1338037A1 (en) | 2003-08-27 |
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