ATE426918T1 - Recycling eines wafers mit einer mehrschichtstruktur nach dem abnehmen einer dunnen schicht - Google Patents
Recycling eines wafers mit einer mehrschichtstruktur nach dem abnehmen einer dunnen schichtInfo
- Publication number
- ATE426918T1 ATE426918T1 AT04700491T AT04700491T ATE426918T1 AT E426918 T1 ATE426918 T1 AT E426918T1 AT 04700491 T AT04700491 T AT 04700491T AT 04700491 T AT04700491 T AT 04700491T AT E426918 T1 ATE426918 T1 AT E426918T1
- Authority
- AT
- Austria
- Prior art keywords
- layers
- wafer
- recycling
- layer structure
- layer
- Prior art date
Links
- 238000004064 recycling Methods 0.000 title 1
Classifications
-
- H01L27/12—
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76259—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Recrystallisation Techniques (AREA)
- Solid-Sorbent Or Filter-Aiding Compositions (AREA)
- Water Treatment By Sorption (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0300099A FR2849715B1 (fr) | 2003-01-07 | 2003-01-07 | Recyclage d'une plaquette comprenant une structure multicouches apres prelevement d'une couche mince |
US47243503P | 2003-05-22 | 2003-05-22 |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE426918T1 true ATE426918T1 (de) | 2009-04-15 |
Family
ID=32715106
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT04700491T ATE426918T1 (de) | 2003-01-07 | 2004-01-07 | Recycling eines wafers mit einer mehrschichtstruktur nach dem abnehmen einer dunnen schicht |
Country Status (8)
Country | Link |
---|---|
US (2) | US7256075B2 (de) |
EP (1) | EP1588416B1 (de) |
JP (1) | JP4949014B2 (de) |
KR (1) | KR100889886B1 (de) |
CN (1) | CN100483666C (de) |
AT (1) | ATE426918T1 (de) |
DE (1) | DE602004020181D1 (de) |
WO (1) | WO2004061944A1 (de) |
Families Citing this family (88)
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FR2892228B1 (fr) * | 2005-10-18 | 2008-01-25 | Soitec Silicon On Insulator | Procede de recyclage d'une plaquette donneuse epitaxiee |
FR2861497B1 (fr) | 2003-10-28 | 2006-02-10 | Soitec Silicon On Insulator | Procede de transfert catastrophique d'une couche fine apres co-implantation |
US7825006B2 (en) * | 2004-05-06 | 2010-11-02 | Cree, Inc. | Lift-off process for GaN films formed on SiC substrates and devices fabricated using the method |
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EP1309989B1 (de) * | 2000-08-16 | 2007-01-10 | Massachusetts Institute Of Technology | Verfahren für die herstellung eines halbleiterartikels mittels graduellem epitaktischen wachsen |
US6940089B2 (en) * | 2001-04-04 | 2005-09-06 | Massachusetts Institute Of Technology | Semiconductor device structure |
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-
2004
- 2004-01-07 EP EP04700491A patent/EP1588416B1/de not_active Expired - Lifetime
- 2004-01-07 KR KR1020057012742A patent/KR100889886B1/ko active IP Right Grant
- 2004-01-07 JP JP2006500316A patent/JP4949014B2/ja not_active Expired - Lifetime
- 2004-01-07 DE DE602004020181T patent/DE602004020181D1/de not_active Expired - Lifetime
- 2004-01-07 WO PCT/IB2004/000311 patent/WO2004061944A1/en active Application Filing
- 2004-01-07 AT AT04700491T patent/ATE426918T1/de not_active IP Right Cessation
- 2004-01-07 CN CNB2004800061438A patent/CN100483666C/zh not_active Expired - Lifetime
-
2005
- 2005-03-07 US US11/075,273 patent/US7256075B2/en not_active Expired - Lifetime
- 2005-03-07 US US11/075,324 patent/US20050167002A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
CN1757106A (zh) | 2006-04-05 |
CN100483666C (zh) | 2009-04-29 |
KR20050092394A (ko) | 2005-09-21 |
JP2006518544A (ja) | 2006-08-10 |
EP1588416A1 (de) | 2005-10-26 |
JP4949014B2 (ja) | 2012-06-06 |
US20050167002A1 (en) | 2005-08-04 |
KR100889886B1 (ko) | 2009-03-20 |
DE602004020181D1 (de) | 2009-05-07 |
EP1588416B1 (de) | 2009-03-25 |
US7256075B2 (en) | 2007-08-14 |
WO2004061944A1 (en) | 2004-07-22 |
US20050170611A1 (en) | 2005-08-04 |
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