NL7613440A - Werkwijze en inrichting voor het vervaardigen van een halfgeleiderinrichting. - Google Patents
Werkwijze en inrichting voor het vervaardigen van een halfgeleiderinrichting.Info
- Publication number
- NL7613440A NL7613440A NL7613440A NL7613440A NL7613440A NL 7613440 A NL7613440 A NL 7613440A NL 7613440 A NL7613440 A NL 7613440A NL 7613440 A NL7613440 A NL 7613440A NL 7613440 A NL7613440 A NL 7613440A
- Authority
- NL
- Netherlands
- Prior art keywords
- manufacture
- semiconductor device
- semiconductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/60—Lateral BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/213—Channel regions of field-effect devices
- H10D62/221—Channel regions of field-effect devices of FETs
- H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/111—Narrow masking
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- High Energy & Nuclear Physics (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Bipolar Transistors (AREA)
- Junction Field-Effect Transistors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05637177 US4038107B1 (en) | 1975-12-03 | 1975-12-03 | Method for making transistor structures |
Publications (1)
Publication Number | Publication Date |
---|---|
NL7613440A true NL7613440A (nl) | 1977-06-07 |
Family
ID=24554884
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NL7613440A NL7613440A (nl) | 1975-12-03 | 1976-12-02 | Werkwijze en inrichting voor het vervaardigen van een halfgeleiderinrichting. |
Country Status (11)
Country | Link |
---|---|
US (1) | US4038107B1 (nl) |
JP (1) | JPS6038877B2 (nl) |
BE (1) | BE848991A (nl) |
CA (1) | CA1063731A (nl) |
DE (1) | DE2654482A1 (nl) |
ES (1) | ES453911A1 (nl) |
FR (1) | FR2334203A1 (nl) |
GB (1) | GB1558349A (nl) |
IT (1) | IT1106505B (nl) |
NL (1) | NL7613440A (nl) |
SE (1) | SE418031B (nl) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2802838A1 (de) * | 1978-01-23 | 1979-08-16 | Siemens Ag | Mis-feldeffekttransistor mit kurzer kanallaenge |
US4145233A (en) * | 1978-05-26 | 1979-03-20 | Ncr Corporation | Method for making narrow channel FET by masking and ion-implantation |
US4485390A (en) * | 1978-03-27 | 1984-11-27 | Ncr Corporation | Narrow channel FET |
US4212683A (en) * | 1978-03-27 | 1980-07-15 | Ncr Corporation | Method for making narrow channel FET |
US4294002A (en) * | 1979-05-21 | 1981-10-13 | International Business Machines Corp. | Making a short-channel FET |
US4280855A (en) * | 1980-01-23 | 1981-07-28 | Ibm Corporation | Method of making a dual DMOS device by ion implantation and diffusion |
US4343082A (en) * | 1980-04-17 | 1982-08-10 | Bell Telephone Laboratories, Incorporated | Method of making contact electrodes to silicon gate, and source and drain regions, of a semiconductor device |
USRE32613E (en) * | 1980-04-17 | 1988-02-23 | American Telephone And Telegraph Company, At&T Bell Laboratories | Method of making contact electrodes to silicon gate, and source and drain regions, of a semiconductor device |
US4758528A (en) * | 1980-07-08 | 1988-07-19 | International Business Machines Corporation | Self-aligned metal process for integrated circuit metallization |
US4366613A (en) * | 1980-12-17 | 1983-01-04 | Ibm Corporation | Method of fabricating an MOS dynamic RAM with lightly doped drain |
US4442589A (en) * | 1981-03-05 | 1984-04-17 | International Business Machines Corporation | Method for manufacturing field effect transistors |
US4691435A (en) * | 1981-05-13 | 1987-09-08 | International Business Machines Corporation | Method for making Schottky diode having limited area self-aligned guard ring |
US5118631A (en) * | 1981-07-10 | 1992-06-02 | Loral Fairchild Corporation | Self-aligned antiblooming structure for charge-coupled devices and method of fabrication thereof |
JPS58137262A (ja) * | 1982-02-09 | 1983-08-15 | Seiko Instr & Electronics Ltd | 静電誘導半導体装置の製造方法 |
DE3219888A1 (de) * | 1982-05-27 | 1983-12-01 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Planares halbleiterbauelement und verfahren zur herstellung |
BE897139A (nl) * | 1983-06-27 | 1983-12-27 | Bell Telephone Mfg Cy Nov | Proces voor het maken van een halfgeleider-inrichting en inrichting hierdoor verkregen |
GB2148589B (en) * | 1983-10-18 | 1987-04-23 | Standard Telephones Cables Ltd | Improvements in intergrated circuits |
GB2199694A (en) * | 1986-12-23 | 1988-07-13 | Philips Electronic Associated | A method of manufacturing a semiconductor device |
US4764482A (en) * | 1986-11-21 | 1988-08-16 | General Electric Company | Method of fabricating an integrated circuit containing bipolar and MOS transistors |
US4923824A (en) * | 1988-04-27 | 1990-05-08 | Vtc Incorporated | Simplified method of fabricating lightly doped drain insulated gate field effect transistors |
US5543646A (en) * | 1988-09-08 | 1996-08-06 | Mitsubishi Denki Kabushiki Kaisha | Field effect transistor with a shaped gate electrode |
US4898835A (en) * | 1988-10-12 | 1990-02-06 | Sgs-Thomson Microelectronics, Inc. | Single mask totally self-aligned power MOSFET cell fabrication process |
TW203148B (nl) * | 1991-03-27 | 1993-04-01 | American Telephone & Telegraph | |
US5242841A (en) * | 1992-03-25 | 1993-09-07 | Texas Instruments Incorporated | Method of making LDMOS transistor with self-aligned source/backgate and photo-aligned gate |
US5702967A (en) * | 1996-07-22 | 1997-12-30 | Vanguard International Semiconductor Corporation | Method of fabricating a deep submicron MOSFET device using a recessed, narrow polysilicon gate structure |
JP2001352079A (ja) * | 2000-06-07 | 2001-12-21 | Nec Corp | ダイオードおよびその製造方法 |
KR101024638B1 (ko) * | 2008-08-05 | 2011-03-25 | 매그나칩 반도체 유한회사 | 반도체 소자의 제조방법 |
US8202791B2 (en) * | 2009-03-16 | 2012-06-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for generating two dimensions for different implant energies |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1053046A (nl) * | 1963-02-25 | 1900-01-01 | ||
US3456168A (en) * | 1965-02-19 | 1969-07-15 | United Aircraft Corp | Structure and method for production of narrow doped region semiconductor devices |
US3406049A (en) * | 1965-04-28 | 1968-10-15 | Ibm | Epitaxial semiconductor layer as a diffusion mask |
US3558366A (en) * | 1968-09-17 | 1971-01-26 | Bell Telephone Labor Inc | Metal shielding for ion implanted semiconductor device |
US3764396A (en) * | 1969-09-18 | 1973-10-09 | Kogyo Gijutsuin | Transistors and production thereof |
US3681147A (en) * | 1970-01-22 | 1972-08-01 | Ibm | Method for masking semiconductor regions for ion implantation |
US3719535A (en) * | 1970-12-21 | 1973-03-06 | Motorola Inc | Hyperfine geometry devices and method for their fabrication |
US3765961A (en) * | 1971-02-12 | 1973-10-16 | Bell Telephone Labor Inc | Special masking method of fabricating a planar avalanche transistor |
US3947299A (en) * | 1971-05-22 | 1976-03-30 | U.S. Philips Corporation | Method of manufacturing semiconductor devices |
US3846822A (en) * | 1973-10-05 | 1974-11-05 | Bell Telephone Labor Inc | Methods for making field effect transistors |
-
1975
- 1975-12-03 US US05637177 patent/US4038107B1/en not_active Expired - Lifetime
-
1976
- 1976-11-17 CA CA265,883A patent/CA1063731A/en not_active Expired
- 1976-11-22 SE SE7613031A patent/SE418031B/xx not_active IP Right Cessation
- 1976-12-01 GB GB50058/76A patent/GB1558349A/en not_active Expired
- 1976-12-01 DE DE19762654482 patent/DE2654482A1/de active Granted
- 1976-12-02 FR FR7636332A patent/FR2334203A1/fr active Granted
- 1976-12-02 BE BE172907A patent/BE848991A/xx not_active IP Right Cessation
- 1976-12-02 IT IT69889/76A patent/IT1106505B/it active
- 1976-12-02 NL NL7613440A patent/NL7613440A/nl not_active Application Discontinuation
- 1976-12-03 JP JP51144854A patent/JPS6038877B2/ja not_active Expired
- 1976-12-03 ES ES453911A patent/ES453911A1/es not_active Expired
Also Published As
Publication number | Publication date |
---|---|
FR2334203A1 (fr) | 1977-07-01 |
CA1063731A (en) | 1979-10-02 |
SE418031B (sv) | 1981-04-27 |
IT1106505B (it) | 1985-11-11 |
ES453911A1 (es) | 1977-11-16 |
GB1558349A (en) | 1979-12-28 |
SE7613031L (sv) | 1977-06-04 |
US4038107A (en) | 1977-07-26 |
JPS6038877B2 (ja) | 1985-09-03 |
JPS5279668A (en) | 1977-07-04 |
FR2334203B1 (nl) | 1980-03-14 |
DE2654482C2 (nl) | 1989-04-20 |
DE2654482A1 (de) | 1977-06-16 |
BE848991A (fr) | 1977-04-01 |
US4038107B1 (en) | 1995-04-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
BA | A request for search or an international-type search has been filed | ||
BB | A search report has been drawn up | ||
BC | A request for examination has been filed | ||
A85 | Still pending on 85-01-01 | ||
BV | The patent application has lapsed |