NL7100073A - - Google Patents

Info

Publication number: NL7100073A
Authority: NL; Netherlands

Application number

NL7100073A

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1970-01-05

Filing date

1971-01-05

Publication date

1971-07-07

1971-01-05 Application filed filed Critical

1971-07-07 Publication of NL7100073A publication Critical patent/NL7100073A/xx

Classifications

- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes) consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
- H01L23/4855—Overhang structure
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/043—Dual dielectric
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/051—Etching
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/106—Masks, special
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/114—Nitrides of silicon

Landscapes

Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
Condensed Matter Physics & Semiconductors (AREA)
General Physics & Mathematics (AREA)
Computer Hardware Design (AREA)
Microelectronics & Electronic Packaging (AREA)
Power Engineering (AREA)
Manufacturing & Machinery (AREA)
Bipolar Transistors (AREA)

NL7100073A 1970-01-05 1971-01-05 NL7100073A (xx)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US68070A	1970-01-05	1970-01-05

Publications (1)

Publication Number	Publication Date
NL7100073A true NL7100073A (xx)	1971-07-07

Family

ID=21692579

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
NL7100073A NL7100073A (xx)	1970-01-05	1971-01-05

Country Status (3)

Country	Link
US (1)	US3681153A (xx)
DE (2)	DE7100215U (xx)
NL (1)	NL7100073A (xx)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3977920A (en) *	1970-10-30	1976-08-31	Hitachi, Ltd.	Method of fabricating semiconductor device using at least two sorts of insulating films different from each other
US4012763A (en) *	1971-01-29	1977-03-15	Hitachi, Ltd.	Semiconductor device having insulator film with different prescribed thickness portions
US3910804A (en) *	1973-07-02	1975-10-07	Ampex	Manufacturing method for self-aligned mos transistor
US3951693A (en) *	1974-01-17	1976-04-20	Motorola, Inc.	Ion-implanted self-aligned transistor device including the fabrication method therefor
US4038110A (en) *	1974-06-17	1977-07-26	Ibm Corporation	Planarization of integrated circuit surfaces through selective photoresist masking
US3966514A (en) *	1975-06-30	1976-06-29	Ibm Corporation	Method for forming dielectric isolation combining dielectric deposition and thermal oxidation
US4149307A (en) *	1977-12-28	1979-04-17	Hughes Aircraft Company	Process for fabricating insulated-gate field-effect transistors with self-aligned contacts
KR950010041B1 (ko) *	1992-03-28	1995-09-06	현대전자산업주식회사	콘택 홀(contact hole) 구조 및 그 제조방법

1970
- 1970-01-05 US US680A patent/US3681153A/en not_active Expired - Lifetime
1971
- 1971-01-05 DE DE19717100215U patent/DE7100215U/de not_active Expired
- 1971-01-05 NL NL7100073A patent/NL7100073A/xx unknown
- 1971-01-05 DE DE19712100292 patent/DE2100292A1/de active Pending

Also Published As

Publication number	Publication date
DE7100215U (de)	1971-04-22
DE2100292A1 (de)	1972-07-13
US3681153A (en)	1972-08-01

Publication	Publication Date	Title
AU1473870A (xx)	1971-11-11
AU2044470A (xx)	1972-03-30
AU2130570A (xx)	1972-04-27
AU1326870A (xx)	1971-10-28
AU1336970A (xx)	1971-10-07
AU1517670A (xx)	1971-11-18
AU1716970A (xx)	1972-01-06
AU1833270A (xx)	1972-02-10
AU2017870A (xx)	1972-03-23
AU2085370A (xx)	1972-04-13
AU1832970A (xx)	1972-02-03
AU1943370A (xx)	1972-03-09
AU1918570A (xx)	1972-03-02
AU1328670A (xx)	1971-10-07
AU1343870A (xx)	1971-10-07
AU1581370A (xx)	1971-12-09
AU2144270A (xx)	1972-04-27
AU2131570A (xx)	1972-04-27
AU2130770A (xx)	1972-04-27
AU1591370A (xx)	1971-12-09
AU2119370A (xx)	1972-04-20
AU2115870A (xx)	1972-04-20
AU2112570A (xx)	1972-04-20
AU1064870A (xx)	1971-07-29
AU2061170A (xx)	1972-04-13