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NL2028691B1 - Electron Transport Layer- and/or Hole Transport Layer-Free Silicon HeteroJunction Solar Cells - Google Patents

Electron Transport Layer- and/or Hole Transport Layer-Free Silicon HeteroJunction Solar Cells Download PDF

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Publication number
NL2028691B1
NL2028691B1 NL2028691A NL2028691A NL2028691B1 NL 2028691 B1 NL2028691 B1 NL 2028691B1 NL 2028691 A NL2028691 A NL 2028691A NL 2028691 A NL2028691 A NL 2028691A NL 2028691 B1 NL2028691 B1 NL 2028691B1
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layer
solar cell
substrate
tco
intrinsic
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NL2028691A
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Dutch (nl)
Inventor
Isabella Olindo
Zhao Yifeng
Zeman Miroslav
Alejandro Procel Moya Paul
Mazzarella Luana
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Univ Delft Tech
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Priority to NL2028691A priority Critical patent/NL2028691B1/en
Priority to EP22736397.5A priority patent/EP4371162A1/en
Priority to PCT/NL2022/050383 priority patent/WO2023287279A1/en
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Publication of NL2028691B1 publication Critical patent/NL2028691B1/en

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    • H01L31/0747
    • H01L31/022425

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  • Life Sciences & Earth Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Sustainable Energy (AREA)
  • Sustainable Development (AREA)
  • Photovoltaic Devices (AREA)

Abstract

The present invention is in the field of a semiconductor device sensitive to light, and specially adapted for the conversion of the energy of such radiation into electrical energy, in particular a silicon hetero-junction solar cell, or photovoltaic (PV) cell, a processor for the manufacture thereof, and details thereof. Said solar cells comprise at least one hetero junction and typically two hetero junctions.

Description

P100677NL00 Electron Transport Layer- and/or Hole Transport Layer-Free Silicon HeteroJunction Solar Cells
FIELD OF THE INVENTION The present invention is in the field of a semiconductor device sensitive to light, and specially adapted for the conversion of the energy of such radiation into electrical energy, in particular a silicon hetero-junction solar cell, or photovoltaic (PV) cell, a processor for the manufacture thereof, and details thereof. Said solar cells comprise at least one hetero junc- tion and typically two hetero junctions.
BACKGROUND OF THE INVENTION A solar cell, or photovoltaic (PV) cell, is an electrical device that converts energy of light, typically sun light (hence “solar”), directly into electricity by the so-called photovoltaic effect. The solar cell may be considered a photoelectric cell, having electrical characteristics, such as current, voltage, resistance, and fill factor, which vary when exposed to light and which vary from type of cell to type. Solar cells are described as being photovoltaic irrespective of whether the source is sunlight or artificial light. They may also be used as photo detector. When a solar cell absorbs light it may generate either electron-hole pairs or excitons. In order to obtain an electrical current charge carriers of opposite types are separated. The separated charge carriers are “extracted” to an external circuit, typically providing a DC-cur- rent. For practical use, a DC-current may be transformed into an AC-current, e.g. by using a transformer. Typically solar cells are grouped into an array of elements. Various elements may form a panel, and various panels may form a system. Wafer-based c-Si solar cells contribute to more than 90% of the total PV market. Ac- cording to recent predictions, this trend will remain for the upcoming years and many years beyond. Due to their simplified process, conventional c-Si solar cells dominate a large part of the market. As an alternative to the industry to improve the power to cost ratio, the silicon heterojunction approach has become increasingly attractive for the PV industry, even though the relatively complicated process to deploy the proper front layers, such as a transparent conductive oxide (TCO) and an inherent low thermal budget of the cells limiting usage of existing production lines and thus result in a relatively small market share so far. A hetero- junction is an interface that occurs between two layers or regions of dissimilar crystalline semiconductors. These semiconducting materials have unequal band gaps as opposed to a homojunction. A homojunction relates to a semiconductor interface formed by typically two layers of similar semiconductor material, wherein these semiconductor materials have equal band gaps and typically have a different doping (either in concentration, in type, or both). A common example is a homojunction at the interface between an n-type layer and a p-type layer, which is referred to as a p-n junction. In heterojunctions advanced techniques are used to precisely control a deposition thickness of layers involved and to create a lattice-matched abrupt interface. Three types of heterojunctions can be distinguished, a straddling gap, a staggered gap, and a broken gap.
A disadvantage of solar cells is that the conversion per se is not very efficient, typi- cally, for Si-solar cells, limited to somewhat above 20%. Theoretically a single p—n junction crystalline silicon device has a maximum power efficiency of 32%. An infinite number of layers may reach a maximum power efficiency of 86%. The highest ratio achieved for a solar cell per se at present is about 44%. For commercial silicon solar cells, the record is about
26.7% (an interdigitated back-contacted silicon heterojunction solar cell). In view of effi- ciency, the front contacts may be moved to a rear or back side, eliminating shaded areas. In addition, thin silicon films were applied to the wafer. Solar cells also suffer from various im- perfections, such as recombination losses, reflectance losses, heating during use, thermody- namic losses, shadow, internal resistance, such as shunt and series resistance, leakage, etc. A qualification of performance of a solar cell is the fill factor (FF). The fill factor may be de- fined as a ratio of an actual maximum obtainable power to the product of the open-circuit voltage and short-circuit current. It is considered to be a key parameter in evaluating perfor- mance. A typical advanced commercial solar cell has a fill factor > 0.75, whereas less ad- vanced cells have a fill factor between 0.4 and 0.7. Cells with a high fill factor typically have a low equivalent series resistance and a high equivalent shunt resistance; in other words, less internal losses occur. Efficiency is nevertheless improving gradually, so every relatively small improvement is welcomed and of significant importance.
At present a solar cell having a full area front passivating contact is not attractive, such as due to highly absorptive materials used to build such a structure. That is the case of heav- ily doped poly-silicon and a-Si layers. In a poly-silicon case, the process requires a very thin polysilicon film for minimizing parasitic absorption loss, and in case of a-Si, the process re- quires e.g. an extra transparent conductive oxide (TCO) layer for supporting the carrier lat- eral transport.
In particular, the electron transport layer and/or hole transport layer hinder the conver- sion of light into electrical power. In addition, to form such a transport layer, typically extra process steps in the manufacture of a solar cell are involved, such as a doping step, and the deposition of the transport layer, and possibly even (intermediate) cleaning steps, as well as extra or multi-chamber process tools, typically deposition tools. In view of cross-contamina- tion between tools, it 1s typically better to use separate tools and/or multi-chamber tools. Ex- tra tools or multi-chamber tools in addition add to the cost of production as more of the ex- pensive clean-room surface is occupied thereby.
The present invention relates to an increased efficiency hetero junction solar cell and various aspects thereof and a simplified process for manufacturing the solar cell which over- comes one or more of the above disadvantages, without jeopardizing functionality and advantages.
SUMMARY OF THE INVENTION The present invention relates in a first aspect to a hetero-junction silicon solar cell according, typically a front and rear contacted solar cell, and in a second aspect to a method for making such a solar cell.
The invention involves the removal of the electron transport layer (ETL) and/or hole transport layer (HTL). So either or both of the transport layers can be removed. These layers are typically used in conventional, prior art, silicon heterojunction (SHI) crystalline silicon (c-Si) solar cells and other solar cells as well. An ETL (and likewise a HTL) is usually doped with impurity atoms to exhibit electron (hole) selective transport characteristics. However, both the ETL and HTL hinder the full exploitation, that is conversion of light into electrical power, of the incident light, and in addition typically require multi-chamber deposition tools, or likewise a number of tools, to prevent cross-contamination. Typically the ETL and HTL induce parasitic absorption, which negatively affects conversion of light into electrical power. Therefore, a simplified SHI solar cell structure is provided, which is ETL- and/or HTL-free. Advantages of the removal of the ETL and/or HTL on an illuminated side of solar cells are a lower non-useful absorption (parasitic absorption), thus higher conversion effi- ciency, a simplified device structure and process, thus higher throughput, and reduced manu- facturing cost as no doping chamber is necessary, and simplified equipment can be used. The present invention relates to a properly optimized intrinsic passivating layer (stack), such as (1)a-Si:H or intrinsic hydrogenated nanocrystalline silicon ((i)nc-Si:H), or a combination of both materials and their alloys, together with a transparent conductive oxide (TCO) or simi- lar functioning materials, and metal contacts, to form the either of electron/hole contact stack of layers. In order to achieve optimal selective electron or hole collections, a careful combi- nation of passivating layer 11 and TCO materials 12 (e.g. different work functions), as well as doping type of the c-Si, are taken into account. Experiments and simulations showed that (1)a-Si:H/TCO can act as an effective electron contact stack for high-efficiency SHJ solar cells, and likewise as an effective hole contact stack. The present solar cells have as ad- vantages e.g. an increased conversion efficiency, improved transparency, good carrier collec- tion, low parasitic absorption, a not very complex structure, a high Voc, a high Jsc, a high fill factor, and good passivation especially of the contacts. The present solar cells are a powerful alternative to improve power to cost ratio. They are competitive to conventional and bifacial single hetero junction solar cells. The present stack of layers provides sufficient carrier mo- bility for lateral carrier transport, good passivation and low parasitic absorption. Also the so- lar cell fabrication process is less costly and high conversion efficiencies are achieved. A proof-of-concept SHJ solar cell was made with ETL-free with (1)a-S1:H/AZO (aluminum doped zinc oxide) for electron collections, the devices exhibit VOC of >700 mV, JSC of >40 mA/cm?, FF of >80%, and efficiency of >23%.
So due to the removal of the ETL and/or HTL in the prior art structure of SHJ solar cells, the present invention clearly allows a simpler process, cost reductions, and potentially a higher conversion efficiency. Cost reductions come from both materials saving during the device manufacturing, and also simplification of fabrication tools, in particular the Plasma- Enhanced Chemical-Vapor-Deposition (PECVD). The higher efficiency may result from the omission of non-useful absorption from ETL and/or HTL. This invention is furthermore 1n- dustrial relevant due to simplified processes and lower costs which are compatible with state-of-the-art industry production lines.
In the present solar cells either front and rear (also indicated as back) contacts, or both, may be present. The present solar cell comprises at least one hetero junction and typically two hetero junctions. The heterojunctions are typically of staggered type. The present solar cells comprise at least one stack of layers(1), the stack comprising a substrate (10), wherein the substrate comprises Si and dopants, directly on the substrate, at least one intrinsic layer (11), directly on the intrinsic layer a transparent conductive oxide (TCO)-layer (12), wherein the at least one intrinsic layer (11) and transparent conductive oxide (TCO)-layer (12) pro- vide electron transport or hole transport, respectively, and a metal contact (13) in electrical contact with the TCO-layer. The substrate is typically a crystalline Si-substrate, such as a n- doped or p-doped crystalline Si layer 10, typically of 50 um-300 um thickness. The layers of the stack are typically provided directly on one and another, that is, without an intermediate layer, or in any case an intermediate layer of significance to the performance of the hetero Junction solar cell.
In a second aspect the present invention relates to a method of producing a front-side and back-side contacted silicon hetero-junction solar cell (100) according to the invention, comprising providing a substrate, such as a crystalline Si-substrate, such as a Si-wafer, op- tionally texturing the substrate, such as double-side texturing the substrate, wherein the sub- strate is dipped into an alkaline solution, such as Tetramethylammonium hydroxide, TMAH, or single-side texturing the substrate, wherein one side of the substrate is coated with a die- lectric layer, such as hydrogenated amorphous silicon nitride, aSiNx:H, and dipping the sub- strate into an alkaline solution for texturing the uncoated side, and removing the dielectric layer thereafter, such as with an acidic solution, e.g. hydrogen fluoride, HF, thereafter im- mersing the substrate into a strong oxidizing solution, such as nitric acid, HNO3, thereafter etching the oxidized substrate by dipping the oxidized substrate into an acidic solution, e.g. hydrogen Fluoride, HF, directly thereafter loading the etched substrate into a layer deposi- tion tool, e.g. a plasma-enhanced chemical vapor deposition tool, PECVD and depositing an intrinsic Si layer on at least one side of the etched substrate, thereafter depositing a transpar- ent conductive oxide(TCO) layer on the at least one intrinsic Si-layer, such as by sputtering, and then depositing metal contacts on the TCO-layer, such as by evaporation, screen-print- ing, or electrical plating. So in particular, only one PECVD chamber for said intrinsic layer is needed as there are no other doped layer depositions, which generally require extra cham- bers for doped layers. The present method 1s considered to be relatively simple, and therefore providing a higher throughput. In particular, fabrication tools thereof are al- ready part of standard production lines. Therefore the present invention may be con- 5 sidered commercially available from the start since it does not require development of additional process tools.
In summary, the present invention provides a simplified fabrication process wherein solar cell precursors can be finished within a couple of steps, and which is a low cost and high throughput process, using compatible industrial standard metalliza- tion steps, solar cells featuring a high Voc, solar cells featuring a high Jsc & Voc, so- lar cells featuring a relatively high fill factor (FF), and wherein the design is applica- ble to both a front/rear contacted conventional solar cell architecture, a bifacial solar cell architecture, for interdigitated back-contacted (IBC) solar cells, and for both n- type and p-type bulk material.
Thereby the present invention provides a solution to one or more of the above men- tioned problems.
Advantages of the present description are detailed throughout the description. Refer- ences to the figures are not limiting, and are only intended to guide the person skilled in the art through details of the present invention.
DETAILED DESCRIPTION OF THE INVENTION The present invention relates in a first aspect to a silicon hetero junction solar cell, and in a second aspect to a process for making such a solar cell.
Where multiple layers or the like of a similar or same material are present, characteris- tics of said layers apply to each layer individually. Also “bottom” and “top”, or “front” and “back” are relative terms, which terms may be interchanged in so far as applicable.
In an exemplary embodiment of the present hetero junction solar cell the substrate (10) comprises crystalline Si.
In an exemplary embodiment of the present hetero junction solar cell the substrate (10) is a single sided or double sided flat substrate (10) surface.
In an exemplary embodiment of the present hetero junction solar cell the substrate (10) 1s a single sided or double sided textured substrate (10) surface (ISO 4287:1997), in par- ticular textured with a surface roughness, each individually, R4 of 1-20 um, such as 2-10 um.
In an exemplary embodiment of the present hetero junction solar cell the textured surface, each individually, has an aspect ratio (height:depth of a textured structure) of 2-10, preferably 5-8. A textured surface is found to increase the efficiency of the solar cell.
In an exemplary embodiment of the present hetero junction solar cell the at least one intrinsic layer (11) is selected from intrinsic Si, such as (i)a-Si:H and (i)nc-Si:H, from intrinsic Si-dielectrics, such as (i)a-SiOx:H, (i)a-SiCx:H, and (1)a-SiNx:H, or dielectric metal oxide passivation layer, and combinations thereof.
In an exemplary embodiment of the present hetero junction solar cell the material of the transparent conductive oxide layer (12) is selected from Indium Tin Oxide (ITO), IOH, ZnO, or doped ZnO, such as Aluminium doped ZnO, doped Tin oxide, such as fluorine doped tin oxide, doped indium oxide, such as Indium Fluor Oxide (IFO:H), and Indium Tungsten Oxide (IWO).
In an exemplary embodiment of the present hetero junction solar cell a thickness of the transparent conductive layer (12) is 10-200 nm, in particular 30-170 nm.
In an exemplary embodiment of the present hetero junction solar cell the refrac- tive index of the transparent conductive layer (12) is <2.2.
In an exemplary embodiment of the present hetero junction solar cell in the at least one intrinsic layer (11) and transparent conductive oxide (TCO)-layer (12) providing electron transport, the TCO-layer is selected from Aluminium doped ZnO.
In an exemplary embodiment of the present hetero junction solar cell in the at least one intrinsic layer (11) and transparent conductive oxide (TCO)-layer (12) providing hole transport, the TCO-layer is selected from IWO.
In an exemplary embodiment of the present hetero junction solar cell the work function of the TCO layer (12) is from 2 eV to 8 eV, in particular 3.4 eV to 6.4 eV.
In an exemplary embodiment of the present hetero junction solar cell the work function of the TCO layer (12) is 3.4 eV to 4.7 eV in case of the TCO-layer mainly trans- porting electrons.
In an exemplary embodiment of the present hetero junction solar cell the work function of the TCO layer (12) is 4.7 eV to 6.4 eV in case of the TCO-layer mainly collect- ing holes.
In an exemplary embodiment of the present hetero junction solar cell in at least one first stack the TCO layer (12) has a work function for transporting electrons and in at least one second stack the TCO layer (12) has a work function for collecting holes.
In an exemplary embodiment of the present hetero junction solar cell the TCO layer each individually is textured, in particular with a same texturing as the intrinsic layer.
In an exemplary embodiment of the present hetero junction solar cell the substrate (10) comprises 1*10!2-0.5*10!° n- or p-type dopants/cm®, in particular 2*10*-1017 do- pants/em?, more in particular 5*10!*-1015 dopants/em’, such as 8*10-3%10'° dopants/cm’. It is noted that for instance a n-type c-Si wafer could have a dopant concentration of about
9.148 x 10 cm™.
In an exemplary embodiment of the present hetero junction solar cell the substrate (10) has a resistivity of 0.1-1000 ohm*cm at 300K, more in particular 1-100 ohm*cm, such as 5-10 ohm*cm. It is noted that resistivities of Si-doped materials as a function of various dopant concentrations are well-known to the skilled person. It can be measured with any suitable instruments (e.g. of Freiberg Instruments, e.g. according to ATSM D257) or simply looked up in a table.
In an exemplary embodiment of the present hetero junction solar cell a doping concentration is spatially constant, or wherein a doping concentration varies spatially, and/or 5 wherein n-type dopants are selected from P, As, Bi, Sb and Li.
In an exemplary embodiment of the present hetero junction solar cell p-type do- pants are selected from B, Ga, and In.
In an exemplary embodiment of the present hetero junction solar cell a dopant concentration is 5*10'*-0.5%10" n- or p-type dopants/cm®. The dopants are found to contrib- ute to the advantages of the invention.
In an exemplary embodiment of the present hetero junction solar cell the metal of the metal contacts (13) independently comprises at least one of Cu, Al, W, Ti, Ni, Cr, Ag.
In an exemplary embodiment of the present hetero junction solar cell a thickness of said metal contacts (13) is 200 nm-50 um, in particular 1-25 um.
In an exemplary embodiment of the present hetero junction solar cell the metal contact (13) is selected from a metal layer, a metal grid, a metal line, or a combination thereof.
In an exemplary embodiment of the present hetero junction solar cell the metal contact (13f) at a front side covers <20% of a surface area of the front side, preferably <10% thereof, such as <5% thereof.
In an exemplary embodiment of the present hetero junction solar cell the solar cell is a back-contacted solar cell, such as an interdigitated back-contacted solar cell, or wherein the solar cell is a back and front contacted solar cell, wherein at least one stack (11) is provided on a front side of the solar cell, and wherein at least one stack (1b) is provided on a back side of the solar cell, and wherein the front side stack and back side stack are pro- vided on the one and the same substrate (10).
In an exemplary embodiment of the present hetero junction solar cell the thick- ness of the intrinsic layer each individually is from 0.1 nm-50 nm, in particular 1-20 nm, such as 2-15 nm.
In an exemplary embodiment of the present hetero junction solar cell the intrinsic layer each individually is textured, in particular with a same texturing as the substrate.
In an exemplary embodiment of the present hetero junction solar cell the VOC is >700 mV, such as > 705 mV, and/or wherein a Js is > 30 mA/cm?, such as > 40 mA/cm”, and/or a fill factor (FF) of >75%, in particular > 79%, such as > 80%, and/or having an effi- ciency of > 23%, such as > 23.2%.
In an exemplary embodiment of the present solar cell the contact stack is trans- parent, such as > 90% @ 490 nm, preferably > 95%.
In an exemplary embodiment the present solar cell comprises a single sided or double sided textured substrate 10, typically a crystalline Si substrate, such as a mi- croscale texture, a nanoscale texture, and combinations thereof. Therewith an im- proved efficiency is obtained.
In an exemplary embodiment the present solar cell comprises a 1047-1017 do- pants/cm’ n- or p-type doped substrate, typically Si, preferably 1015-1015 dopants/cm”.
In an exemplary embodiment the present solar cell comprises at least one of a metal layer on a back side 13b, and metal contacts on a front side 13f and/or on a back side. The metal contacts are used to connect the solar cells, such as to a grid, to a stor- age unit, such as a battery, to a DC/AC converter, etc.
In an exemplary embodiment of the present solar cell the material of the thick- ness of the transparent conductive layer < 100 nm, and/or wherein the refractive index < 2.2, preferably < 2, such as > 1.5. The refractive index is preferably close enough to air in terms of efficiency. This refractive index is preferred to be ~2.0, which equals to the square root of the product of the refractive indexes of air (1) and silicon (-4)(@587 nm). This will provide better anti-reflection effect. Either too low or too high is not preferred.
In an exemplary embodiment of the present solar cell in the stack of layers, the respective layers are each independently in full contact with one and another over an area of >50% of a surface of the largest of two contacting surfaces, preferably >90%, more preferably >95%, even more preferably >98%, such as >99%. In other words the layers in the stack of layers are in contact with one and another and no further layers are provided in between.
The invention is further detailed by the accompanying figures and examples, which are exemplary and explanatory of nature and are not limiting the scope of the invention. To the person skilled in the art it may be clear that many variants, being ob- vious or not, may be conceivable falling within the scope of protection, defined by the present claims.
SUMMARY OF FIGURES Figure 1 shows an example of a prior-art solar cell.
Figures 2-4 show a schematic representation of an example of the present solar cell.
DETAILED DESCRIPTION OF FIGURES In the figures : 100 hetero-junctions Si-solar cell 1 stack of layers If front-side stack of layers Ib back-side stack of layers 10 Si-substrate, typically crystalline, 11 intrinsic silicon layer
12 transparent conductive oxide layer 13 metal contacts or metal layer 13b back side metal contacts or back side metal layer 13f front side metal contacts or front side metal layer 20 electron transport layer (ETL) 30 hole transport layer (HTL) Various exemplary embodiments of the present solar cell are detailed below.
The solar cell of fig. 1 relates to a prior art solar cell. The solar cell comprises a substrate 10, at either side of the substrate an intrinsic layer 11, typically an intrinsic Si-layer, in the example an ETL layer 20 on the top intrinsic layer and an HTL 30 on the bottom intrinsic layer, a TCO layer 12 on either side, and metal contacts or a metal contact layer 13 on the TCO layer.
The solar cell of fig. 2 relates to a solar cell according to the invention. The solar cell comprises a substrate 10, at either side of the substrate an intrinsic layer 11, typi- cally an intrinsic Si-layer, in the example an HTL 30 on the bottom intrinsic layer, a TCO layer 12 on either side, and metal contacts or a metal contact layer 13 on the TCO layer.
The solar cell of fig. 3 relates to a solar cell according to the invention. The solar cell comprises a substrate 10, at either side of the substrate an intrinsic layer 11, typi- cally an intrinsic Si-layer, in the example an ETL 20 on the bottom intrinsic layer, a TCO layer 12 on either side, and metal contacts or a metal contact layer 13 on the TCO layer.
Figs. 2 and 3, in so far as the ETL or HTL are concerned, in that respect make use of prior art technology, whereas in so far as the ETL or HTL are absent, respec- tively, make use of the present invention.
The solar cell of fig. 4 relates to a solar cell according to the invention. The solar cell comprises a substrate 10, at either side of the substrate an intrinsic layer 11, typi- cally an intrinsic Si-layer, a TCO layer 12 on either side, and metal contacts or a metal contact layer 13 on the TCO layer. No ETL or HTL is present.
The above types of solar cell are indicative of the versatile design of the present invention.
The figures are further detailed in the description of the experiments below.
Some general remarks are as follows.
The phosphorus doping of n-type c-Si wafer in an example is 9.148 x 10" cm™, which corresponds to a wafer resistivity of 5 ohm*cm at 300K; the doping concentration can be higher or lower to achieve a lower wafer resistivity or a higher wafer resistivity, respec- tively; The boron doping of p-type c-Si wafer in an example is 2.762 x 1015 cm™, which corresponds to a wafer resistivity of 5 ohm*cm at 300K; the doping concentration can be higher or lower to achieve a lower wafer resistivity or a higher wafer resistivity, respec- tively, The WF of TCO can be around 3.4 eV to 6.4 eV; While for TCO that has WF in the range of around 3.4 eV to 4.7 eV, a lower WF TCO tends to be more favourable to act as electron collectors; while for TCO that has WF in the range of around 4.7 eV to 6.4 eV, a higher WF TCO tends to be more favourable to act as hole collectors. As mentioned above the (i)-layer can be (1)a-Si:H, (i)nc-Si:H, their alloys such as (i)a- SiOx:H, (Da-SiCx:H, or dielectric passivation layer, and their possible combinations; the ETL (electron transport layer) can be (n)a-Si:H, (n)nc-Si:H, their alloys such as (n)a-SiOx:H, (n)a-SiCx:H, or electron-selective transition metal oxide layers, and their possible combina- tions; the HTL (hole transport layer) can be (p)a-Si:H, (p)nc-Si:H, their alloys such as (p)a- SiOx:H, (p)a-SiCx:H, or hole-selective transition metal oxide layers, and their possible com- binations; the TCO is a transparent conductive oxide; and the junction position can be in- verted. The invention although described in detailed explanatory context may be best understood in conjunction with the accompanying figures. It should be appreciated that for commercial application it may be preferable to use one or more variations of the present system, which would similar be to the ones disclosed in the present application and are within the spirit of the invention. For the purpose of searching the following section is added, of which the last section represents a translation into Dutch.
1. A silicon hetero-junction solar cell (100) comprising at least one hetero junction, at least one stack of stack of layers(1), the stack comprising a substrate (10), wherein the substrate comprises Si and dopants, directly on the substrate, at least one intrinsic layer (11), directly on the intrinsic layer a transparent conductive oxide (TCO)-layer (12), wherein the at least one intrinsic layer (11) and transparent conductive oxide (TCO)-layer (12) provide electron transport or hole transport, respectively, and an metal contact (13) in electrical contact with the TCO-layer.
2. The silicon hetero-junction solar cell (100) according to embodiment 1, wherein the sub- strate (10) comprises crystalline Si, and/or wherein the substrate (10) is a single sided or double sided flat substrate (10) surface, and/or wherein the substrate (10) is a single sided or double sided textured substrate (10) surface (ISO 4287:1997), in particular textured with a surface roughness Ra of 1-20 um, such as 2- 10 um, and/or wherein the textured surface has an aspect ratio (height:depth of a textured structure) of 2-
10.
3. The silicon hetero-junction solar cell (100) according to embodiment 1 or 2, wherein the at least one intrinsic layer (11) is selected from intrinsic Si, such as (i)a-Si:H and (1)nc-Si:H, from intrinsic Si-dielectrics, such as (1)a-SiOx:H, (1)a-SiCx:H, and (1)a-SiNx:H, or dielectric metal oxide passivation layer, and combinations thereof.
4. The silicon hetero-junction solar cell (100) according to any of embodiments 1-3, wherein the material of the transparent conductive oxide layer (12) is selected from Indium Tin Oxide (ITO), IOH, ZnO, or doped ZnO, such as Aluminium doped ZnO, doped Tin ox- ide, such as fluorine doped tin oxide, doped indium oxide, such as Indium Fluor Oxide (IFO:H), and Indium Tungsten Oxide (TWO), and/or wherein a thickness of the transparent conductive layer (12) is 10-200 nm, in particular 30- 170 nm, and/or wherein the refractive index of the transparent conductive layer (12) is <2.2.
5. The silicon hetero-junction solar cell (100) according to any of embodiments 1-4, wherein in the at least one intrinsic layer (11) and transparent conductive oxide (TCO)-layer (12) providing electron transport, the TCO-layer is selected from Aluminium doped ZnO, and/or wherein in the at least one intrinsic layer (11) and transparent conductive oxide (TCO)-layer (12) providing hole transport, the TCO-layer is selected from TWO.
6. The silicon hetero-junction solar cell (100) according to any of embodiments 1-5, wherein the work function of the TCO layer (12) is from 2 eV to 8 eV, in particular 3.4 eV to 6.4 eV, and/or wherein the work function of the TCO layer (12) is 3.4 eV to 4.7 eV in case of the TCO- layer mainly transporting electrons, and/or wherein the work function of the TCO layer (12) is 4.7 eV to 6.4 eV in case of the TCO- layer mainly collecting holes, and/or wherein in at least one first stack the TCO layer (12) has a work function for transporting electrons and in at least one second stack the TCO layer (12) has a work function for collect- ing holes, and/or wherein the TCO layer each individually is textured, in particular with a same texturing as the intrinsic layer.
7. The silicon hetero-junction solar cell (100) according to any of embodiments 1-6, wherein the substrate (10) comprises 1*10:2-0.5*10!° n- or p-type dopants/cm?, in particular 2*101-1017 dopants/cm?®, more in particular 5*101-10!% dopants/cm’, such as 8*101-3*1015 dopants/cem’, and/or wherein the substrate (10) has a resistivity of 0.1-1000 ohm*cm at 300K, more in particular 1-100 ohm*cm, such as 5-10 ohm*cm.
8. The silicon hetero-junction solar cell (100) according to embodiment 7, wherein a doping concentration is spatially constant, or wherein a doping concentration varies spatially, and/or wherein n-type dopants are selected from P, As, Bi, Sb and Li, and/or wherein p-type dopants are selected from B, Ga, and In, and/or wherein a dopant concentration is 5*10*-0.5* 10" n- or p-type dopants/cm?.
9. Silicon hetero-junction solar cell (100) according to any of embodiments 1-8, wherein the metal of the metal contacts (13) independently comprises at least one of Cu, Al, W, Ti, Ni, Cr, Ag, and/or wherein a thickness of said metal contacts (13) is 200 nm-50 um, in particular 1-25 um, and/or wherein the metal contact (13) is selected from a metal layer, a metal grid, a metal line, or a combination thereof, and/or wherein the metal contact (13f) at a front side covers <20% of a surface area of the front side, preferably <10% thereof, such as <5% thereof.
10. The silicon hetero-junction solar cell (100) according to any of embodiments 1-9, wherein the solar cell is a back-contacted solar cell, such as an interdigitated back-contacted solar cell, or wherein the solar cell is a back and front contacted solar cell, wherein at least one stack (1f) is provided on a front side of the solar cell, and wherein at least one stack (1b) is provided on a back side of the solar cell, and wherein the front side stack and back side stack are pro- vided on the one and the same substrate (10).
11. Silicon hetero-junction solar cell (100) according to any of embodiments 1-10, wherein the thickness of the intrinsic layer each individually is from 0.1 nm-50 nm, in partic- ular 1-20 nm, such as 2-15 nm, and/or wherein the intrinsic layer each individually is textured, in particular with a same texturing as the substrate.
12. Silicon hetero-junction solar cell (100) according to any of embodiments 1-11, wherein the VOC 1s >700 mV, such as > 705 mV, and/or wherein a Js is > 30 mA/cm?, such as > 40 mA/cm?, and/or a fill factor (FF) of >75%, in particular > 79%, such as > 80%, and/or having an efficiency of > 23%, such as > 23.2%.
13. Method of producing a front-side and back-side contacted silicon hetero-junction solar cell (100) according to any of embodiments 1-12, comprising providing a substrate, such as a crystalline Si-substrate, optionally texturing the substrate, such as double-side texturing the substrate, thereafter immersing the substrate into a strong oxidizing solution, thereafter etching the oxi- dized substrate by dipping the oxidized substrate into an acidic solution, directly thereafter loading the etched substrate into a layer deposition tool, and depositing an intrinsic Si layer on at least one side of the etched substrate,
thereafter depositing a transparent conductive oxide(TCO) layer on the at least one intrinsic Si-layer, and then depositing metal contacts on the TCO-layer.

Claims (13)

ConclusiesConclusions 1. Een silicium heterojunctie zonnecel (100) omvattend ten minste één heterojunctie, ten minste één stapel van lagen (1), de stapel omvattend een substraat (10), waarin het substraat Si en doteringsmiddelen omvat, direct op het substraat, ten minste één intrinsieke laag (11), direct op de intrinsieke laag een transparante geleidende oxidelaag (TCO) (12), waar- bij de ten minste één intrinsieke laag (11) en de transparante geleidende oxidelaag (TCO) (12) zorgen voor respectievelijk elektronentransport of gatentransport, en een metaalcontact (13) dat in elektrisch contact met de TCO-laag.A silicon heterojunction solar cell (100) comprising at least one heterojunction, at least one stack of layers (1), the stack comprising a substrate (10), wherein the substrate comprises Si and dopants, directly on the substrate, at least one intrinsic layer (11), directly on the intrinsic layer a transparent conductive oxide layer (TCO) (12), the at least one intrinsic layer (11) and the transparent conductive oxide layer (TCO) (12) respectively providing electron transport or hole transport, and a metal contact (13) that is in electrical contact with the TCO layer. 2. De silicium heterojunctie zonnecel (100) volgens conclusie 1, waarbij het substraat (10) uit kristallijn Si omvat, en/of waarbij het substraat (10) een enkelzijdig of dubbelzijdig vlak substraat (10) oppervlak is, en/of waarbij het substraat (10) een enkelzijdig of dubbelzijdig getextureerd substraat (10) opper- vlak 1s (ISO 4287:1997), in het bijzonder getextureerd met een oppervlakteruwheid Ra van 1-20 um, zoals 2-10 um, en/of waarbij het getextureerde oppervlak een aspectverhouding (hoogte:diepte van een getextu- reerde structuur) heeft van 2-10.The silicon heterojunction solar cell (100) according to claim 1, wherein the substrate (10) comprises crystalline Si, and/or wherein the substrate (10) is a single-sided or double-sided flat substrate (10) surface, and/or wherein the substrate (10) a single-sided or double-sided textured substrate (10) surface 1s (ISO 4287:1997), especially textured with a surface roughness Ra of 1-20 µm, such as 2-10 µm, and/or where the textured surface has an aspect ratio (height:depth of a textured structure) of 2-10. 3. De silicium heterojunctie zonnecel (100) volgens conclusie 1 of 2, waarbij de ten minste één intrinsieke laag (11) is gekozen uit intrinsiek Si, zoals (1)a-Si:H en (i)nc-Si:H, uit intrin- sieke Si-diélektrische materialen, zoals (i)a-S1Ox:H, (i)a-SiCx:H, en (1)a-SiNx:H, of diëlek- trische metaaloxidepassiveringslaag, en combinaties daarvan.The silicon heterojunction solar cell (100) according to claim 1 or 2, wherein the at least one intrinsic layer (11) is selected from intrinsic Si, such as (1)a-Si:H and (i)nc-Si:H, from intrinsic Si dielectric materials, such as (i)a-S1Ox:H, (i)a-SiCx:H, and (1)a-SiNx:H, or dielectric metal oxide passivation layer, and combinations thereof. 4. De silicium heterojunctie zonnecel (100) volgens een van de conclusies 1-3, waarbij het materiaal van de transparante geleidende oxidelaag (12) is gekozen uit Indium Tin Oxide (ITO), IOH, ZnO, of gedoteerd ZnO, zoals aluminium gedoteerd ZnO, gedoteerd Tin Oxide, zoals fluor gedoteerd Tin Oxide, gedoteerd indium oxide, zoals Indium Fluor Oxide (IFO:H), en Indium Wolfraam Oxide (IWO), en/of waar een dikte van de transparante geleidende laag (12) 10-200 nm is, in het bijzonder 30- 170 nm, en/of waarbij de brekingsindex van de transparante geleidende laag (12) <2,2 is.The silicon heterojunction solar cell (100) according to any one of claims 1 to 3, wherein the material of the transparent conductive oxide layer (12) is selected from Indium Tin Oxide (ITO), IOH, ZnO, or doped ZnO, such as aluminum doped ZnO, Doped Tin Oxide, such as Fluorine Doped Tin Oxide, Doped Indium Oxide, such as Indium Fluorine Oxide (IFO:H), and Indium Tungsten Oxide (IWO), and/or where a thickness of the transparent conductive layer (12) is 10- 200 nm, especially 30-170 nm, and/or wherein the refractive index of the transparent conductive layer (12) is <2.2. 5. De silicium heterojunctie zonnecel (100) volgens een van de conclusies 1-4, waarbij in de ten minste één intrinsieke laag (11) en de transparante geleidende oxidelaag (TCO) (12) die zorgt voor het elektron transport, de TCO-laag is gekozen uit Aluminium-gedoteerd ZnO, en/of waarbij in de intrinsieke laag (11) en de transparante geleidende oxidelaag (TCO) (12) die zorgt voor het gatentransport, de TCO-laag is gekozen uit IWO.The silicon heterojunction solar cell (100) according to any one of claims 1 to 4, wherein in the at least one intrinsic layer (11) and the transparent conductive oxide (TCO) layer (12) providing the electron transport, the TCO- layer is selected from Aluminium-doped ZnO, and/or wherein in the intrinsic layer (11) and the transparent conductive oxide (TCO) layer (12) providing the hole transport, the TCO layer is selected from IWO. 6. De silicium heterojunctie zonnecel (100) volgens een van de conclusies 1-5, waarbij de werkfunctie van de TCO-laag (12) van 2 eV tot 8 eV is, in het bijzonder 3,4 eV tot 6,4 eV, en/of waarin de werkfunctie van de TCO-laag (12) 3,4 eV tot 4,7 eV bedraagt in het geval dat de TCO-laag hoofdzakelijk elektronen transporteert, en/of waar de werkfunctie van de TCO-laag (12) 4,7 eV tot 6,4 eV bedraagt in het geval van een TCO-laag die hoofdzakelijk gaten opvangt, en/of waarin in ten minste één eerste stapel de TCO-laag (12) een werkfunctie heeft voor het trans- porteren van elektronen en in ten minste één tweede stapel de TCO-laag (12) een werkfunc- tie heeft voor het opvangen van gaten, en/of waarin de TCO-laag elk afzonderlijk getextureerd is, in het bijzonder met eenzelfde textuur als de intrinsieke laag.The silicon heterojunction solar cell (100) according to any one of claims 1 to 5, wherein the work function of the TCO layer (12) is from 2 eV to 8 eV, especially 3.4 eV to 6.4 eV, and/or wherein the work function of the TCO layer (12) is 3.4 eV to 4.7 eV in case the TCO layer mainly transports electrons, and/or where the work function of the TCO layer (12) is 4.7 eV to 6.4 eV in the case of a TCO layer that mainly collects holes, and/or in which in at least one first stack the TCO layer (12) has a work function of transporting electrons and in at least one second stack the TCO layer (12) has a working function of collecting holes, and/or wherein the TCO layer is individually textured, in particular with a similar texture to the intrinsic layer. 7. De silicium heterojunctie zonnecel (100) volgens een van de conclusies 1-6, waarbij het substraat (10) 1*10:-0.5*101° n- of p-type doteringsmiddelen/cm’ bevat, in het bijzonder 2*101*-10!7 doteringsmiddelen/em’, meer in het bijzonder 5*10!+-10!° doterings- middelen/cm?, zoals 8*101#-3*1015 doteringsmiddelen/cm?’, en/of waarbij het substraat (10) een weerstand heeft van 0,1-1000 ohm*cm bij 300K, meer in het bijzonder 1-100 ohm*cm, zoals 5-10 ohm*cm.The silicon heterojunction solar cell (100) according to any one of claims 1-6, wherein the substrate (10) contains 1*10:-0.5*101° n- or p-type dopants/cm', especially 2* 101*-10!7 dopants/em', more specifically 5*10!+-10!° dopants/cm?, such as 8*101#-3*1015 dopants/cm?', and/or where the substrate (10) has a resistance of 0.1-1000 ohm*cm at 300K, more specifically 1-100 ohm*cm, such as 5-10 ohm*cm. 8. De silicium heterojunctie zonnecel (100) volgens conclusie 7, waarin een dopingconcentratie ruimtelijk constant is, of waarin een dopingconcentratie ruim- telijk varieert, en/of waar de n-type doteringsstoffen zijn gekozen uit P, As, Bi, Sb en Li, en/of waar de p-typische doteringsstoffen zijn gekozen uit B, Ga en In, en/of waarbij de concentratie van de doteringsstoffen 5*1017-0,5*10!° n- of p-type doteringsstof- fen/cm® bedraagt.The silicon heterojunction solar cell (100) of claim 7, wherein a doping concentration is spatially constant, or wherein a doping concentration varies spatially, and/or where the n-type dopants are selected from P, As, Bi, Sb, and Li , and/or where the p-type dopants are selected from B, Ga and In, and/or where the concentration of the dopants is 5*1017-0.5*10!° n- or p-type dopants/cm ® amounts to. 9. Silicium heterojunctie zonnecel (100) volgens een van de conclusies 1-8, waarbij het metaal van de metaalcontacten (13) onafhankelijk ten minste één van Cu, Al, W, Ti, Ni, Cr, Ag omvat, en/of waar een dikte van de metaalcontacten (13) 200 nm-50 um is, in het bijzonder 1-25 um, en/of waar het metaalcontact (13) is gekozen uit een metaallaag, een metaalrooster, een metaallijn, of een combinatie daarvan, en/of waarbij het metaalcontact (13f) aan een voorzijde <20% van een oppervlakte van de voor- zijde beslaat, bij voorkeur <10% daarvan, zoals <5% daarvan.The silicon heterojunction solar cell (100) according to any one of claims 1 to 8, wherein the metal of the metal contacts (13) independently comprises at least one of Cu, Al, W, Ti, Ni, Cr, Ag, and/or where a thickness of the metal contacts (13) is 200 nm-50 µm, in particular 1-25 µm, and/or where the metal contact (13) is selected from a metal layer, a metal lattice, a metal line, or a combination thereof, and /or wherein the metal contact (13f) on a front side occupies <20% of an area of the front side, preferably <10% thereof, such as <5% thereof. 10. De silicium heterojunctie zonnecel (100) volgens een van de conclusies 1-9, waarbij de zonnecel een zonnecel met achtercontact is, zoals een geïnterdigiteerde zonnecel met achter- contact, of waarbij de zonnecel een zonnecel is met achter- en voorcontact, waarbij ten minste één sta- pel (1f) zich aan de voorzijde van de zonnecel bevindt, en ten minste één stapel (1b) zich aan de achterzijde van de zonnecel bevindt, en waarbij de stapel aan de voorzijde en de stapel aan de achterzijde zich op hetzelfde substraat (10) bevinden.The silicon heterojunction solar cell (100) according to any one of claims 1 to 9, wherein the solar cell is a back contact solar cell, such as an interdigitated back contact solar cell, or wherein the solar cell is a back and front contact solar cell, wherein at least one stack (1f) is located at the front of the solar cell, and at least one stack (1b) is located at the rear of the solar cell, and wherein the stack at the front and the stack at the back are at the same substrate (10). 11. Silicium heterojunctie zonnecel (100) volgens een van de conclusies 1-10, waarbij de dikte van de intrinsieke laag elk afzonderlijk van 0,1 nm-50 nm, in het bijzonder 1-20 nm, zoals 2-15 nm is, en/of waarin de intrinsieke laag elk afzonderlijk getextureerd is, in het bijzonder met dezelfde tex- tuur als het substraat.A silicon heterojunction solar cell (100) according to any one of claims 1-10, wherein the thickness of the intrinsic layer is each from 0.1nm-50nm, especially 1-20nm, such as 2-15nm, and/or wherein the intrinsic layer is individually textured, in particular with the same texture as the substrate. 12. Silicium heterojunctie zonnecel (100) volgens een van de conclusies 1-11, waarin de VOC >700 mV is, zoals > 705 mV, en/of waarin een Jsc > 30 mA/em? is, zoals > 40 mA/cm?, en/of een vulfactor (FF) van >75%, in het bijzonder > 79%, zoals > 80%, en/of met een rendement van > 23%, zoals > 23,2%.A silicon heterojunction solar cell (100) according to any one of claims 1-11, wherein the VOC is >700 mV, such as >705 mV, and/or wherein a Jsc >30 mA/em? is, such as > 40 mA/cm?, and/or with a fill factor (FF) of >75%, in particular > 79%, such as > 80%, and/or with an efficiency of > 23%, such as > 23, 2%. 13. Werkwijze voor het produceren van een aan de voor- en achterzijde gecontacteerde sili- cium heterojunctie zonnecel (100) volgens een van de conclusies 1-12, omvattend het verstrekken van een substraat, zoals een kristallijn Si-substraat, het optioneel textureren van het substraat, zoals het dubbelzijdig textureren van het substraat, vervolgens het substraat onderdompelen in een sterke oxiderende oplossing, vervolgens het geoxideerde substraat etsen door het geoxideerde substraat onder te dompelen in een zure oplossing direct daarna het geëtste substraat in een laagafzettingsapparaat plaatsen, en een intrinsieke Si laag op ten minste één zijde van het geëtste substraat afzetten vervolgens een transparante geleidende oxidelaag (TCO) op de ten minste één intrinsieke Si- laag afzetten, en vervolgens het afzetten van metaalcontacten op de TCO-laag.A method of producing a front and back contacted silicon heterojunction solar cell (100) according to any one of claims 1 to 12, comprising providing a substrate, such as a crystalline Si substrate, optionally texturing the substrate, such as double-sided texturing of the substrate, then immerse the substrate in a strong oxidizing solution, then etch the oxidized substrate by immersing the oxidized substrate in an acidic solution immediately after that, put the etched substrate in a layer deposition device, and an intrinsic depositing a Si layer on at least one side of the etched substrate, then depositing a transparent conductive oxide (TCO) layer on the at least one intrinsic Si layer, and then depositing metal contacts on the TCO layer.
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