NL170901C - Werkwijze voor het vervaardigen van een halfgeleiderinrichting. - Google Patents
Werkwijze voor het vervaardigen van een halfgeleiderinrichting.Info
- Publication number
- NL170901C NL170901C NLAANVRAGE7104496,A NL7104496A NL170901C NL 170901 C NL170901 C NL 170901C NL 7104496 A NL7104496 A NL 7104496A NL 170901 C NL170901 C NL 170901C
- Authority
- NL
- Netherlands
- Prior art keywords
- manufacturing
- semiconductor device
- semiconductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
- H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
- H01L21/31658—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
- H01L21/31662—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of silicon in uncombined form
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
- H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/0817—Thyristors only
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/049—Equivalence and options
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/117—Oxidation, selective
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Element Separation (AREA)
Priority Applications (18)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NLAANVRAGE7104496,A NL170901C (nl) | 1971-04-03 | 1971-04-03 | Werkwijze voor het vervaardigen van een halfgeleiderinrichting. |
DE19722215351 DE2215351C3 (de) | 1971-04-03 | 1972-03-29 | Verfahren zur Herstellung eines Halbleiterbauelements |
SE7204115A SE381955B (sv) | 1971-04-03 | 1972-03-29 | Halvledaranordning och sett att framstella densamma |
CH467272A CH542513A (de) | 1971-04-03 | 1972-03-29 | Halbleiteranordnung und Verfahren zur Herstellung derselben |
GB1502272A GB1388486A (en) | 1971-04-03 | 1972-03-30 | Semiconductor device manufacture |
FR7211541A FR2132347B1 (nl) | 1971-04-03 | 1972-03-31 | |
IT68034/72A IT954586B (it) | 1971-04-03 | 1972-03-31 | Dispositivo semiconduttore e pro cedimento per la sua fabbricazione |
BE781538A BE781538A (fr) | 1971-04-03 | 1972-03-31 | Dispositif semiconducteur et son procede de fabrication |
AT283372A AT324430B (de) | 1971-04-03 | 1972-03-31 | Halbleiteranordnung und verfahren zur herstellung derselben |
ES401405A ES401405A1 (es) | 1971-04-03 | 1972-04-01 | Un dispositivo semiconductor. |
AR241272A AR192354A1 (es) | 1971-04-03 | 1972-04-03 | Dispositivo semiconductor y metodo de fabricacion del dispositivo semiconductor |
BR721920A BR7201920D0 (pt) | 1971-04-03 | 1972-04-03 | Dispositivo semicondutor e processo de fabricar o mesmo |
JP47033423A JPS51438B1 (nl) | 1971-04-03 | 1972-04-03 | |
CA138,769A CA963173A (en) | 1971-04-03 | 1972-04-04 | Semiconductor device and method of manufacturing the semiconductor device |
US437005A US3873383A (en) | 1971-04-03 | 1974-01-28 | Integrated circuits with oxidation-junction isolation and channel stop |
US05/458,526 US3961356A (en) | 1971-04-03 | 1974-04-08 | Integrated circuit with oxidation-junction isolation and channel stop |
ES428726A ES428726A1 (es) | 1971-04-03 | 1974-07-29 | Un metodo de fabricacion de un dispositivo semiconductor. |
HK597/76*UA HK59776A (en) | 1971-04-03 | 1976-09-23 | Semiconductor device manufacture |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NLAANVRAGE7104496,A NL170901C (nl) | 1971-04-03 | 1971-04-03 | Werkwijze voor het vervaardigen van een halfgeleiderinrichting. |
US23878472A | 1972-03-28 | 1972-03-28 | |
US437005A US3873383A (en) | 1971-04-03 | 1974-01-28 | Integrated circuits with oxidation-junction isolation and channel stop |
US05/458,526 US3961356A (en) | 1971-04-03 | 1974-04-08 | Integrated circuit with oxidation-junction isolation and channel stop |
Publications (3)
Publication Number | Publication Date |
---|---|
NL7104496A NL7104496A (nl) | 1972-10-05 |
NL170901B NL170901B (nl) | 1982-08-02 |
NL170901C true NL170901C (nl) | 1983-01-03 |
Family
ID=27483791
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NLAANVRAGE7104496,A NL170901C (nl) | 1971-04-03 | 1971-04-03 | Werkwijze voor het vervaardigen van een halfgeleiderinrichting. |
Country Status (7)
Country | Link |
---|---|
US (2) | US3873383A (nl) |
AT (1) | AT324430B (nl) |
CA (1) | CA963173A (nl) |
CH (1) | CH542513A (nl) |
FR (1) | FR2132347B1 (nl) |
GB (1) | GB1388486A (nl) |
NL (1) | NL170901C (nl) |
Families Citing this family (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4005453A (en) * | 1971-04-14 | 1977-01-25 | U.S. Philips Corporation | Semiconductor device with isolated circuit elements and method of making |
US3992232A (en) * | 1973-08-06 | 1976-11-16 | Hitachi, Ltd. | Method of manufacturing semiconductor device having oxide isolation structure and guard ring |
GB1457139A (en) * | 1973-09-27 | 1976-12-01 | Hitachi Ltd | Method of manufacturing semiconductor device |
US3979765A (en) * | 1974-03-07 | 1976-09-07 | Signetics Corporation | Silicon gate MOS device and method |
US4023195A (en) * | 1974-10-23 | 1977-05-10 | Smc Microsystems Corporation | MOS field-effect transistor structure with mesa-like contact and gate areas and selectively deeper junctions |
US3993513A (en) * | 1974-10-29 | 1976-11-23 | Fairchild Camera And Instrument Corporation | Combined method for fabricating oxide-isolated vertical bipolar transistors and complementary oxide-isolated lateral bipolar transistors and the resulting structures |
US3962717A (en) * | 1974-10-29 | 1976-06-08 | Fairchild Camera And Instrument Corporation | Oxide isolated integrated injection logic with selective guard ring |
US3967002A (en) * | 1974-12-31 | 1976-06-29 | International Business Machines Corporation | Method for making high density magnetic bubble domain system |
DE2510593C3 (de) * | 1975-03-11 | 1982-03-18 | Siemens AG, 1000 Berlin und 8000 München | Integrierte Halbleiter-Schaltungsanordnung |
US4013484A (en) * | 1976-02-25 | 1977-03-22 | Intel Corporation | High density CMOS process |
US4047217A (en) * | 1976-04-12 | 1977-09-06 | Fairchild Camera And Instrument Corporation | High-gain, high-voltage transistor for linear integrated circuits |
US4137109A (en) * | 1976-04-12 | 1979-01-30 | Texas Instruments Incorporated | Selective diffusion and etching method for isolation of integrated logic circuit |
US4149177A (en) * | 1976-09-03 | 1979-04-10 | Fairchild Camera And Instrument Corporation | Method of fabricating conductive buried regions in integrated circuits and the resulting structures |
US4198649A (en) * | 1976-09-03 | 1980-04-15 | Fairchild Camera And Instrument Corporation | Memory cell structure utilizing conductive buried regions |
US4197143A (en) * | 1976-09-03 | 1980-04-08 | Fairchild Camera & Instrument Corporation | Method of making a junction field-effect transistor utilizing a conductive buried region |
US4064527A (en) * | 1976-09-20 | 1977-12-20 | Intersil, Inc. | Integrated circuit having a buried load device |
JPS5356972A (en) * | 1976-11-01 | 1978-05-23 | Mitsubishi Electric Corp | Mesa type semiconductor device |
US4149906A (en) * | 1977-04-29 | 1979-04-17 | International Business Machines Corporation | Process for fabrication of merged transistor logic (MTL) cells |
US4316319A (en) * | 1977-10-25 | 1982-02-23 | International Business Machines Corporation | Method for making a high sheet resistance structure for high density integrated circuits |
US4140558A (en) * | 1978-03-02 | 1979-02-20 | Bell Telephone Laboratories, Incorporated | Isolation of integrated circuits utilizing selective etching and diffusion |
JPS5951743B2 (ja) * | 1978-11-08 | 1984-12-15 | 株式会社日立製作所 | 半導体集積装置 |
JPS5852339B2 (ja) * | 1979-03-20 | 1983-11-22 | 富士通株式会社 | 半導体装置の製造方法 |
JPS55153342A (en) * | 1979-05-18 | 1980-11-29 | Fujitsu Ltd | Semiconductor device and its manufacture |
US4289550A (en) * | 1979-05-25 | 1981-09-15 | Raytheon Company | Method of forming closely spaced device regions utilizing selective etching and diffusion |
US4261763A (en) * | 1979-10-01 | 1981-04-14 | Burroughs Corporation | Fabrication of integrated circuits employing only ion implantation for all dopant layers |
JPS5673446A (en) * | 1979-11-21 | 1981-06-18 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Manufacture of semiconductor device |
US4373965A (en) * | 1980-12-22 | 1983-02-15 | Ncr Corporation | Suppression of parasitic sidewall transistors in locos structures |
US4824797A (en) * | 1985-10-31 | 1989-04-25 | International Business Machines Corporation | Self-aligned channel stop |
DE4119904A1 (de) * | 1991-06-17 | 1992-12-24 | Telefunken Electronic Gmbh | Halbleiteranordnung |
US6087677A (en) * | 1997-11-10 | 2000-07-11 | Integrated Silicon Solutions Inc. | High density self-aligned antifuse |
DE19840032C1 (de) | 1998-09-02 | 1999-11-18 | Siemens Ag | Halbleiterbauelement und Herstellungsverfahren dazu |
US6819089B2 (en) * | 2001-11-09 | 2004-11-16 | Infineon Technologies Ag | Power factor correction circuit with high-voltage semiconductor component |
US6825514B2 (en) * | 2001-11-09 | 2004-11-30 | Infineon Technologies Ag | High-voltage semiconductor component |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1095413A (nl) * | 1964-12-24 | |||
US3386865A (en) * | 1965-05-10 | 1968-06-04 | Ibm | Process of making planar semiconductor devices isolated by encapsulating oxide filled channels |
NL159817B (nl) * | 1966-10-05 | 1979-03-15 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
NL152707B (nl) * | 1967-06-08 | 1977-03-15 | Philips Nv | Halfgeleiderinrichting bevattende een veldeffecttransistor van het type met geisoleerde poortelektrode en werkwijze ter vervaardiging daarvan. |
NL6916988A (nl) * | 1969-11-11 | 1971-05-13 | ||
NL169936C (nl) * | 1970-07-10 | 1982-09-01 | Philips Nv | Halfgeleiderinrichting omvattende een halfgeleiderlichaam met een althans ten dele in het halfgeleiderlichaam verzonken oxydepatroon. |
US3648125A (en) * | 1971-02-02 | 1972-03-07 | Fairchild Camera Instr Co | Method of fabricating integrated circuits with oxidized isolation and the resulting structure |
US3751722A (en) * | 1971-04-30 | 1973-08-07 | Standard Microsyst Smc | Mos integrated circuit with substrate containing selectively formed resistivity regions |
US3796613A (en) * | 1971-06-18 | 1974-03-12 | Ibm | Method of forming dielectric isolation for high density pedestal semiconductor devices |
-
1971
- 1971-04-03 NL NLAANVRAGE7104496,A patent/NL170901C/nl not_active IP Right Cessation
-
1972
- 1972-03-29 CH CH467272A patent/CH542513A/de not_active IP Right Cessation
- 1972-03-30 GB GB1502272A patent/GB1388486A/en not_active Expired
- 1972-03-31 FR FR7211541A patent/FR2132347B1/fr not_active Expired
- 1972-03-31 AT AT283372A patent/AT324430B/de not_active IP Right Cessation
- 1972-04-04 CA CA138,769A patent/CA963173A/en not_active Expired
-
1974
- 1974-01-28 US US437005A patent/US3873383A/en not_active Expired - Lifetime
- 1974-04-08 US US05/458,526 patent/US3961356A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
CH542513A (de) | 1973-11-15 |
US3961356A (en) | 1976-06-01 |
FR2132347A1 (nl) | 1972-11-17 |
GB1388486A (en) | 1975-03-26 |
FR2132347B1 (nl) | 1977-08-26 |
NL170901B (nl) | 1982-08-02 |
CA963173A (en) | 1975-02-18 |
AT324430B (de) | 1975-08-25 |
US3873383A (en) | 1975-03-25 |
DE2215351B2 (de) | 1977-05-05 |
DE2215351A1 (de) | 1972-10-12 |
NL7104496A (nl) | 1972-10-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
V4 | Discontinued because of reaching the maximum lifetime of a patent |