MXPA00004216A - Network for eliminating dc offset in a received hdtv signal - Google Patents

Abstract

A receiver for processing a VSB modulated signal containing terrestrial broadcast high definition television information and a pilot component includes an input analog-to-digital converter (19) for producing a datastream which is oversampled at twice the received symbol rate, and a digital demodulator (22) with a data reduction network in a phase control loop. A segment sync detector (24) uses an abbreviated correlation reference pattern to recover a twice symbol rate sampling clock for the digital converter (19). A DC offset associated with the pilot component is removed (26) from the demodulated signal before it is applied to an NTSC interference detection network (30). The interference detection network (30) includes a comb filter network responsive to a twice symbol rate sampled data datastream, and exhibits a sample delay dimensioned to avoid aliasing in the combed frequency spectrum, thereby increasing the effectiveness of NTSC co-channel interference detection.

Description

NETWORK TO ELIMINATE DC DISPLACEMENT IN A RECEIVED HDTV SIGNAL DESCRIPTION OF THE INVENTION This invention relates to a receiver system for processing a high definition television signal, for example, of the type modulated by vestigial sideband, VSB, proposed by the Grand Alliance in the United States. The retrieval of data from modulated signals that carry digital information in the form of a symbol usually requires three functions in a receiver: timing recovery for symbol synchronization, carrier recovery (frequency demodulation to the baseband), and equalization channel. Timing recovery is a process through which a receiver clock (time base) is synchronized to a transmitter clock. This allows a received signal to be sampled at optimal points in time to reduce clipping errors associated with the decision-driven processing of received symbol values. Carrier recovery is a process by which a received RF signal, after being a frequency reductively converted to a lower intermediate frequency pass band (eg, a close base band), is a frequency shifted towards the baseband to allow the retrieval of baseband modulation information. The adaptive channel equalization is a process through which the effects of changing conditions and disturbances in the signal transmission channel are compensated. This process typically employs filters that remove amplitude and phase distortions resulting from the frequency dependent time-variant characteristics of the transmission channel, to provide improved symbol decision capability. In accordance with the principles of the present invention, a system for processing a signal modulated by a vestigial sideband (VSB) containing high definition television information includes a compensation network for processing an oversampled symbol data stream at the speed of oversampling to remove a symbol DC offset component.

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a block diagram of a portion of a high definition television (HDTV) receiver including an apparatus in accordance with the principles of the present invention. Figure 2 illustrates a data frame format for a signal modulated through the vestigial sideband, VSB, according to the HDTV system of the Grand Alliance in the United States.

United. Figure 3 shows details of a digital demodulator / carrier recovery network in Figure 1. Figure 4 shows details of a segment synchronization detector and a symbol clock recovery network in Figure 1. Figure 5 illustrates a signal waveform useful for understanding the operation of the network in Figure 4. Figure 6 shows details of a compensation network for removing a DC offset in the symbol data stream processed through the system of the Figure 1. Figure 7 shows details of an NTSC co-channel interference detection network in the system of Figure 1. Figure 8 shows a frequency spectrum associated with the operation of the network of Figure 7. In Figure 1, a terrestrial broadcast analog input HDTV signal is processed through an input network 14 including RF tuning circuits and an intermediate frequency (IF) 16 processor, including a double tune conversion to produce an IF passband output signal, and appropriate automatic gain control circuits (AGC) the received signal is a carrier-suppressed 8-VSB modulated signal as proposed by the Grand Alliance and adopted for used in the United States. Said VSB signal is represented by a one-dimensional data symbol constellation, where there is only one axis containing quantized data that will be retrieved by the receiver. To simplify the Figure, no signals are shown to time the illustrated functional blocks. As described in the HDTV system specification of the Grand Alliance, dated April 14, 1994, the VSB transmission system transports data with a prescribed data frame format as shown in Figure 2. A small pilot signal at the suppressed carrier frequency is added to the transmitted signal to help obtain a carrier lock on a VSB receiver. Referring to Figure 2, each data frame comprises two fields, each field including 313 segments of 832 multi-level symbols. The first segment of each field is referred to as a field synchronization segment, and the remaining 312 segments are referred to as data segments. Data segments typically contain compatible MPEG data packets. Each data segment comprises a segment sync character of 4 symbols followed by 828 data symbols. Each field segment includes a four-symbol segment synchronization character followed by a field synchronization component comprising a pseudo-random number (PN) sequence of 511 symbols, predetermined, and three PN sequences of 63 predetermined symbols, half of a of these it is inverted in successive fields. A VSB mode control signal (defining the size of the VSB symbol constellation) follows the last 63 of the PN sequence, which is followed by 96 reserved symbols and 12 symbols copied from the previous field. Continuing with Figure 1, the passband IF output signal from unit 16 is converted to an oversampled digital symbol data stream through a digital analog converter 19. The oversampled digital data stream from the ADC output 19 is demodulated to the baseband through a digital demodulator / carrier recovery network, 22. This is done through a digital phase closed loop in response to the small reference pilot carrier in the VSB data stream. received. The unit 22 produces a demodulated symbol data stream of output phase I as described in detail with respect to Figure 3. The ADC 19 oversamples the symbol data stream VSB of 10.76 Msymbols / second input with a clock of 21.52 MHz sampling, that is, twice the received symbol rate, thus providing a data stream of 21.52 Msamples / second oversampled with two samples per symbol. The use of such processing on the basis of two samples per symbol sample, instead of symbol-by-symbol processing (one sample per symbol), produces an advantageous operation of the subsequent signal processing functions, such as those that are associated with the compensation unit DC 26 and the interference detector NTSC 30, for example, as will be discussed below. Associated with ADC 19 and demodulator 22 is a segment and symbol synchronization clock recovery network 24. Network 24 detects and separates the repetitive data segment synchronization components of each data frame from the random data. The segment synchronizations are used to regenerate a clock of 21.52 MHz appropriately in phase, which is used to control the symbol sampling of the data stream through the analog-to-digital converter 19. As will be discussed with reference to FIGS. and 5, the network 24 advantageously utilizes a two-symbol correlation reference pattern, abbreviated, and an associated two-symbol data correlator to detect segment synchronization. A DC compensation unit 26 uses an adaptive tracking circuit to remove from the demodulated VSB signal a DC offset component due to the pilot signal component, as will be discussed in relation to Figure 6. The unit 28 detects the synchronization component data field comparing each received data segment with an ideal field reference signal stored in the memory in the receiver. In addition to field synchronization, the field synchronization signal provides a training signal for the channel equalizer 34. The NTSC detection and rejection of interference is performed through the unit 30 as will be discussed in detail with reference to Figures 7 and 8. , the signal is adaptively matched by the channel equalizer 34, which can operate in a combination of modes directed blindly, by training and decision. The equalizer 34 may be of the type described in the HDTV system specification of the Grand Alliance and in the article by W. Bretl et al., "VSB Modem Subsystem Design for Grand Alliance Digital Television Receivers," IEEE Transactions on Consumer Electronics, August 1995. The equalizer 34 may also be of the type described in the US patent application. Copendent Series No. (RCA 88,947) of Shiue et al. The output data stream of the detector 30 is converted downward to a sample / symbol data stream (10.76 Msymbols / seconds) before the equalizer 34. This down-conversion can be achieved through a suitable downstream sampling network (not shown to simplify the drawing). The equalizer 34 corrects the channel distortions, but the phase noise randomly rotates the symbol constellation. The phase tracking network 36 removes the residual phase and the noise gain at the signal output from the equalizer 34, including the phase noise, which has not been removed by the preceding carrier recovery network in response to the signal pilot. The phase pilot signal is then decoded as lattice by unit 40, deinterleaved by unit 42, corrected for Reed-Solomon error by unit 44, and demodulated (descrambled) by unit 46. Then, a current of Decoded data is subjected to audio, video and presentation processing by unit 50.

The tuner 14, the IF 16 processor, the field synchronization detector 28, the equalizer 34, the phase tracking loop 36, the lattice decoder 40, the deinterleaver 42, the Reed-Solomon 44 decoder and the demodulator 46 may use circuits of the type described in the HDTV system specification of the Grand Alliance of April 4, 1994, and in the Bretl article, and others mentioned above. The circuits suitable for performing the functions of units 19 to 50 are well known. The demodulation in unit 22 is performed through a digital automatic phase control loop (APC) to achieve carrier recovery. The phase-lock loop uses the pilot component as a reference for initial acquisition and a normal phase detector for phase acquisition. The pilot signal is embedded in the received data stream, which contains data that exhibits a random pattern of noise type. The random data is essentially not taken into account by the filtering action of the scrambler APC loop. The input signal of 10.76 Msymbols / second to ADC 19 is a near baseband signal with the center of the frequency spectrum of VSB at 5.38 MHz and the pilot component located at 2.69 MHz. The input data stream is advantageously oversampled twice per ADC 19 to 21.52 MHz. In the demodulated data stream of unit 22, the pilot component has been shifted in its frequency below DC.

Figure 3 shows details of the digital demodulator 22. The oversampled digital symbol data stream, modulated by ADC 19 8-VSB, containing the very low frequency pilot component, is applied to introduce a Hilbert 320 filter and a power unit. delay 322. Filter 320 separates the data stream sampled input IF in the components "I" (in phase) and "Q" (quadrature phase). The delay unit 322 exhibits a delay that coincides with the delay of the Hilbert filter 320. The I and Q components are rotated towards the baseband using the complex multiplier 324 in an APC loop. Once the loop is synchronized, the output of multiplier 324 is a complex baseband signal. The output data stream I of the multiplier 324 is used as the output of the actual demodulator, and is also used to extract the pilot component from the received data stream using the low pass filter 326. The output data stream Q of the Multiplier 324 is used to extract the phase of the received signal. In the phase control loop, the output signals I and Q of the multiplier 324 are respectively applied to low pass filters 326 and 328. The filters 326 and 328 are low pass filters of Nyquist with a cutoff frequency of about 1. MHz, and is provided to reduce the signal bandwidth before descending data sampling of 8: 1 by units 330 and 332. The Q signal sampled in descending order is filtered by an automatic frequency control filter (AFC) 336. After filtering, the signal Q is limited in amplitude by the unit 338 to reduce the dynamic scaling requirements by the phase detector 340. The phase detector 340 detects and corrects the phase difference between the applied I and Q signals to its inputs, and develops an output phase error signal, which is filtered by an APC filter 344, for example, a second order low pass filter. The phase error detected by the unit 340 represents a frequency difference between the expected pilot signal frequency near the DC, and the received pilot signal frequency. If the received pilot signal exhibits an expected frequency near DC, the AFC 336 unit will not produce any phase shift. The input of the I and Q channel pilot components to the phase detector 340 will not exhibit any deviation from a mutual quadrature phase relationship, whereby the phase detector 340 produces a phase error output signal with a value of zero or almost zero. However, if the received pilot signal exhibits an incorrect frequency, the AFC 336 unit will produce a phase shift. This will result in an additional phase difference between the I and Q channel pilot signals applied to the inputs of the phase detector 340. The detector 340 produces an output error value in response to this phase difference. The filtered phase error signal from the filter 344 is sampled in ascending 1: 8 through the interpolator 346 to represent the previous descending sampling by the units 330 and 332, so that NCO 348 operates at 21.52 MHz. The output of the interpolator 346 is applied to an NCO control input 348, which locally generates the pilot signal to demodulate the received data stream. The NCO 348 includes sine and cosine look-up tables to regenerate the pilot tone at a correct phase in response to the phase control signal of units 340, 344 and 346. The outputs of the NCO 348 are controlled until the outputs of the I and Q signal of the multiplier 324 cause the phase error signal produced by the detector 340 to be substantially zero, thus indicating that an appropriately demodulated baseband signal I is present at the output of the multiplier 324. In the digital demodulator 22, the main signal processing engine essentially comprises elements 336,338, 340 and 344. The down sampling 8: 1 provided by units 330 and 332 advantageously saves the demodulator and hardware processing power, and allows processing efficiencies allowing the APC loop elements 336, 338, 340 and 344 to be closed at a lower clock rate, i.e., using a clock at 21.52 MHz / 8 or 2. 69 MHz, instead of a 21.52 MHz clock location. When using a digital signal processor (DSP) to implement network 22 and the phase detector loop in particular, the data reduction described results in efficiencies of the software requiring proportionally lower lines of building code, for example. The DSP machine cycles are made available for other purposes of signal processing. When an Application Specific Integrated Circuit (ASIC) is used to implement the network 22, the data reduction results in reduced hardware and power requirements, as well as a reduced integrated circuit surface area. The demodulator advantageously uses the pilot component to obtain carrier recovery, and employs direct feed processing instead of more complicated and time-consuming feedback processing, using cutter decision data. The demodulated channel I data stream is applied to the symbol synchronization and segment synchronization unit 24, as shown in detail in Figures 4 and 5. When the repetitive data segment synchronization pulses are retrieved of the random data pattern of the received data stream, the segment synchronizations are used to achieve an appropriate symbol timing by regenerating a 21.52 MHz double symbol rate sampling clock appropriately in phase to control the sampling operation of the analog converter to digital 19 (Figure 1). Figure 5 illustrates a portion of a data segment of 8 levels (-7 to +7) with an associated segment synchronization, for a terrestrial broadcast signal modulated by 8-VSB according to the HDTV specification of the Great Alliance. Segment synchronization occurs at the beginning of each data segment and occupies a range of four symbols. Segment synchronization is defined by a 1 -1 -1 1 pattern, which corresponds to the amplitude levels of the segment synchronization pulse, from +5 to -5. Segment synchronization of four symbols occurs every 832 symbols, but it is difficult to locate in a demodulated VSB digital data stream, since the data has a random, noise type characteristic. To detect segment synchronization under these conditions, it has been a conventional practice to apply the demodulated I channel data stream to an input of a data correlator, and to apply a reference pattern having the characteristic 1 -1 -1 1 to a Correlator reference input to be compared with the demodulator data. The correlator produces a consistent reinforcement with the reference pattern every 832 symbols. The reinforced data events are accumulated by an accumulator associated with the correlator. The random correlations of intervention (not reinforced) disappear in relation to the components of synchronization of correlated, reinforced segment. The networks for recovering the segment synchronization data in this way are known, for example, from the HDTV specification of the great alliance and the Bretl article, and others previously mentioned. In the present it is recognized that although segment synchronization is generally difficult to locate, it is particularly difficult to detect in the presence of multiple path conditions ("phantom"). Furthermore, it is recognized in the present that the last two characteristics (amplitude levels) of the segment synchronization pattern (-1 1) are easily corrupted by transmission distortions such as multipath, but the first two characteristics of the synchronization pattern of segment (1 -1) are significantly more difficult to corrupt. Furthermore, it has been determined that even if the first two amplitude characteristics (1 -1) of the segment synchronization pattern are corrupted, they are typically corrupted in the same way, which makes the first two characteristics more easily detected by means of techniques of correlation. Thus, in the described system, the reference pattern applied to the correlator to detect segment synchronization is preferably constituted by the first two pattern levels (1 -1) instead of the four pattern levels (1 -1 - eleven). In this way, the correlator reference pattern preferably encompasses only a range of two symbols. In Figure 4, the oversampled output data stream of the demodulator 22 (Figures 1 and 3) is applied to an output input of the phase detector 410 and to a correlator 420 of 832 symbols. The other phase detector signal input 410 receives an input signal from a data correlation processing path including the correlator 420, an associated correlator reference pattern generator 430 coupled to a correlator reference input 420, and a segment and accumulator integrator 424. The correlator 420 essentially responds to a data segment synchronization coded by symbol. The reference pattern generator 430 provides the relatively simple abbreviated reference pattern, 1 -1, thus allowing the use of a simpler correlator network. The simplest reference standard with less probability can cause confusion in the synchronization detection process, particularly in poor signal conditions, since more stable reliable information is used. The system described with less probability can be confusing if two of the four relationships are corrupted. In addition, the calculation time by the correlator 420 is significantly reduced. The output of the correlator 420 is integrated and accumulated by the unit 424. A segment synchronization generator 428, including a comparator with a predetermined threshold, responds to the output of the unit 424 by generating a segment synchronization at appropriate times in the current of data corresponding to segment synchronization intervals. This occurs when the accumulation of reinforced data events (segment synchronization occurrences) exceeds a predetermined level. Phase detector 410 compares the phase of segment synchronization generated by unit 428 with the phase of segment synchronization appearing in the demodulated data stream of unit 22., and produces an output phase error signal. This error signal is filtered by the low pass filter through the automatic phase control filter (APC) 434 to produce a suitable signal to control a controlled crystal oscillator with a voltage of 21.52 MHz (VCXO) 436, which provides the 21.52 MHz oversampling clock for ADC 19. This sampling clock exhibits an appropriate timing when the phase error signal is substantially zero through the action of APC. The recovery of the symbol timing (clock) is completed at this point. Segment synchronization generated by unit 428 is also applied to other decoder circuits, including automatic gain control (AGC) circuits, (not shown). Due to the low-sequence suppressed carrier component in the received signal VSB, there is a DC offset in the demodulated output symbol data I of the demodulator 22. This DC offset is associated with each symbol and is removed by the compensation network 26 (Figure 1) before further processing. The ratio of the transmitted symbol DC component facilitates the recovery of symmetric symbol values, ie, +7 +5 ± 3 +1, from an 8-VSB signal. Figure 6 shows details of the network 26, which is essentially a DC tracking feedback network. The arrangement of the network 26 in Figure 6 is advantageously controlled in time at twice the symbol rate to produce rapid removal of the DC component. This action promotes rapid convergence of the receiver and its various interdependent subsystems to rapidly produce appropriate operating conditions for processing received video data for presentation. In Figure 6, the oversampled demodulated data stream containing the unwanted DC offset is applied to an input of a subtraction combiner 610. An inverter input (-) of combiner 610 receives a DC compensation voltage from of a DC voltage generator 616 in response to a control signal produced in response to the output of the combiner 610, as follows. The displacement of DC in the output signal of the combiner 610 is progressively attenuated by the action of the feedback at twice the symbol speed of the oversampling speed. This DC offset is detected by the unit 622 and compared to a reference by the comparator 624. The output of the comparator 624 includes the magnitude and polarity of the residual DC shift and is used to produce a control signal from the control signal generator 626. The control signal in turn causes the generator 616 to incrementally adjust the magnitude and polarity of a DC value, which is combined with the demodulated data stream. This process continues until a steady state condition is reached, where through the action of the feedback no additional DC value adjustments are provided by the unit 616. The generator 616 can provide DC compensation values both positive as negative, since the transmission channel disturbances can cause the DC (positive) offset added to the transmitter to vary, so that both positive and negative compensation values are necessary in the receiver. Figure 7 shows details of an NTSC 30 co-channel interference detection network in Figure 1. As explained in the HDTV system specification of the Grand Alliance, the interference rejection properties of the transmission system by VSB are based on the frequency locations of the main components of the NTSC co-channel interference signal within the 6 MHz television channel and the periodic notches of a VSB receiver base band comb filter. These comb filter notches exhibit high attenuation (null points) at frequency locations of high-energy interference NTSC components. These components include the video bearer located 1.25 MHz from the lower band edge, the chrominance subcarrier located 3.58 MHz higher than the video carrier frequency, and the sound bearer located 4.5 MHz above the video carrier frequency. The interference of NTSC is detected by the circuit shown in Figure 7, where the signal-to-interference plus noise of the field synchronization patterns is measured at the input and output of a comb filter network, and these Patterns are compared to each other. A reference field synchronization pattern used for this purpose is a locally stored, "ideal" stored version of the received VSB signal field synchronization pattern.

In Figure 7, the demodulated, oversampled I channel symbol data is applied to an input of a NTSC reject comb filter 710, to a first input of multiplexer 745, and to an input of a subtraction combiner 720. The filter of comb 710 includes a subtractor 712, which subtracts samples delayed by the delay element 314 from the input data I to produce a symbol data stream of channel I in comb. The comb filter 710 produces a significant amplitude attenuation, or "null points", at the previously observed high energy interference NTSC frequencies. The data I filtered by the comb filter of filter 710 is applied to a second input of multiplexer 745. The delay element 714 of the comb filter advantageously exhibits a delay of 24 samples, as will be discussed subsequently. A reference field synchronization pattern of 21.52 Samples / second (double symbol rate) programmed, is obtained from the local memory during field synchronization intervals of the received data stream. The field synchronization reference pattern is applied to an input of the NTSC reject comb filter 718, and to an inversion input (-) of the combiner 720. The comb filter 718 is similar to the comb filter 710, and also includes a delay element, which advantageously exhibits a delay of 24 samples. The network of Figure 7, in particular the comb filters 710, 718 and the associated delay networks, are timed at 21.52 MHz.

A first error signal produced at the combiner output 729 represents the difference between the field synchronization pattern received in the input data stream, and the reference field synchronization pattern. This error signal is squared by the unit 722 and integrated by the unit 724. A second error signal produced at the output of the combiner 730 represents the difference between the field synchronization pattern received after the filtering by the filter. comb 710, and the reference field synchronization pattern after filtering by comb filter 718. This second error signal is squared by unit 732 and integrated by unit 734. The output of units 722 and 732 represents the energy of the respective error signals. The integrated output signals of the integrators 724 and 734 represent the interference signal plus noise content of the received field synchronization components filtered with the comb filter and without the comb filter, respectively. These integrated energy representative signals are applied to respective inputs of an energy detector (comparator) 740, which compares the magnitudes of the first and second integrated error signals. The output signal of the detector 740 is applied to a control input of the multiplexer 745 to cause the multiplexer 745 to provide a data output where one of these input signals, which exhibits a higher quality, i.e. a better ratio of signal to noise plus interference. Thus, in the case of significant NTSC co-channel interference, the output signal filtered by the comb filter of the filter 710 will be taken out of the multiplexer 745, while the received unfiltered symbol data stream will be output in the absence of said interference. The use of oversampled I channel data and field synchronization reference pattern data together with the use of a delay of 24 samples in the comb filter 710 and 718 advantageously produces complete spectrum information with respect to the interference of -NTSC channel. This advantageously results in a more accurate NTSC interference analysis and detection and better filtration by comb filter. Specifically, the use of delays of 24 samples in comb filters 710 and 718 with oversampled input data and corresponding circuit clock, results in a frequency spectrum filtered through the comb filter, which is not corrupted by phase and amplitude effects, which could be produced by providing an input data stream at the symbol rate of 10.76 M / symbols / second, and operating the comb filters 710 and 718 at the symbol rate of 10.76 Msymbols / second. The resulting frequency spectrum produced at the outputs of the comb filters 710 and 718 is shown in Figure 8 and includes two complete band pass components of NTSC filtered by comb filter, centered around but separated at 10.76 MHz. The attenuation notches appear at the high-energy NTSC frequencies of interference, as mentioned. Figure 7 illustrates a form of an NTSC co-channel interference detector including elements 722, 724, 732, 734 and 740. However, other types of detector can be used. In this way, these elements can be represented by a four-input detector, that is, a so-called "black box" where the detector can be programmed to operate in accordance with the requirements of a particular system. In such a case, the four inputs are the two oversampled inputs (two samples / symbol) to the combiner 720, and the two oversampled inputs to the combined ones 730, with the output of the filter 710 to the input of the combiner 730 being particularly important. The arrangement of Figure 7 produces a clean frequency spectrum, as shown in Figure 8, without the associated amplitude and phase corruption (pseudonym) caused by the frequency overlapping the upper band edge of the lower passband component with the lower band edge of the upper pass band component. Consequently, the detection of co-channel interference by elements 720, 722, 724, 730, 732, 734 and 740 is more accurate than detection through a system that uses comb filters with delays of 12 samples processing data from input at the symbol rate of 10.76 Msymbols / second. In the latter case, the amplitude and phase corruption will likely be produced close to 5.38 MHz, where the upper and lower passband components overlap, when the passband components imperfectly match and do not cancel such overlap. Such imperfect matching can probably occur under signal channel conditions including multiple paths, for example. This pseudonymous condition reduces the effectiveness of the NTSC co-channel interference detection and is avoided by the described system.

Claims (3)

1. - An apparatus for use in a system for processing a signal modulated by the vestigial side band (VSB) containing high definition video data represented by a constellation of symbols, including a DC component, said data having a data frame format constituted by a succession of data frames comprising a field synchronization component pre-facing a plurality of data segments having an associated segment synchronization component, the apparatus comprises: an input network (19, 22) responsive to the signal received to produce a demodulated symbol data stream, which is oversampled at a rate that is a multiple of the symbol rate of said received signal; a decoding network (28, 30) for providing a decoded data stream to an output channel; and a compensation network (26) coupled to the input network and the decoding network, which operates at the oversampling rate to remove the DC component from the demodulated symbol data stream.

2. A method for being used in a system for processing a received vestigial sideband (VSB) modulated signal, containing high definition video data represented by a constellation of symbols, including a DC component, said data having a frame format of data constituted by a succession of data frames comprising a field synchronization component pre-facing a plurality of data segments, the signal processing method comprises the steps of: producing a demodulated symbol data stream 19, 22 ), which is oversampled at a rate that is a multiple of the symbol rate of the received signal; processing the demodulated symbol data stream (26) at the oversampling rate to remove the DC component to produce a compensated symbol data stream; and decoding (28) said compensated symbol data stream.

3. A method according to claim 2, wherein the processing step includes the steps of: sensing (622, 624) the value of the DC component of data stream; generating (626, 616) a DC compensation value in response to a DC component value perceived from the perception step; and combining (610) said compensation value with the DC component to remove said DC component.