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MX2018015133A - Metodo de decodificacion de canal y aparato que utiliza informacion priori estructurada de preambulo. - Google Patents

Metodo de decodificacion de canal y aparato que utiliza informacion priori estructurada de preambulo.

Info

Publication number
MX2018015133A
MX2018015133A MX2018015133A MX2018015133A MX2018015133A MX 2018015133 A MX2018015133 A MX 2018015133A MX 2018015133 A MX2018015133 A MX 2018015133A MX 2018015133 A MX2018015133 A MX 2018015133A MX 2018015133 A MX2018015133 A MX 2018015133A
Authority
MX
Mexico
Prior art keywords
bits
codeword
llr
decoding method
channel decoding
Prior art date
Application number
MX2018015133A
Other languages
English (en)
Inventor
Park Jung-Hyun
Jung Sung-Kyu
Choi Chang-Hoon
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of MX2018015133A publication Critical patent/MX2018015133A/es

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • H03M13/1125—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms using different domains for check node and bit node processing, wherein the different domains include probabilities, likelihood ratios, likelihood differences, log-likelihood ratios or log-likelihood difference pairs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
    • H03M13/3927—Log-Likelihood Ratio [LLR] computation by combination of forward and backward metrics into LLRs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/3723—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 using means or methods for the initialisation of the decoder
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/6325—Error control coding in combination with demodulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0047—Decoding adapted to other signal detection operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2689—Link with other circuits, i.e. special connections between synchronisation arrangements and other circuits for achieving synchronisation
    • H04L27/2692—Link with other circuits, i.e. special connections between synchronisation arrangements and other circuits for achieving synchronisation with preamble design, i.e. with negotiation of the synchronisation sequence with transmitter or sequence linked to the algorithm used at the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L2001/0092—Error control systems characterised by the topology of the transmission link
    • H04L2001/0093—Point-to-multipoint

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computing Systems (AREA)
  • Error Detection And Correction (AREA)
  • Artificial Intelligence (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

Se proporciona un método de decodificación de canal. El método incluye almacenar, en una memoria, una serie de primeros valores de cociente de probabilidad de registro (LLR) correspondientes a bits de una contraseña generada por medio de modulación de una señal codificada por canal; cambiar, a un valor predeterminado, al menos un valor LLR correspondiente a bits previamente definidos de la contraseña de entre la serie de los primeros valores LLR, para generar una serie de segundos valores LLR; y llevar a cabo corrección de error hacia adelante (FEC) con base en la serie de los segundos valores LLR y un código FEC, para calcular los bits de la contraseña, en los cuales el código FEC comprende un código de restricción para restringir una correlación estructural previamente definida entre los bits de la contraseña.
MX2018015133A 2016-06-08 2017-06-07 Metodo de decodificacion de canal y aparato que utiliza informacion priori estructurada de preambulo. MX2018015133A (es)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201662347205P 2016-06-08 2016-06-08
KR1020170064891A KR102340200B1 (ko) 2016-06-08 2017-05-25 프리앰블의 구조적 사전 정보를 이용한 채널 복호화 방법 및 장치
PCT/KR2017/005897 WO2017213409A1 (en) 2016-06-08 2017-06-07 Channel decoding method and apparatus using structured priori information of preamble

Publications (1)

Publication Number Publication Date
MX2018015133A true MX2018015133A (es) 2019-04-25

Family

ID=60578816

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2018015133A MX2018015133A (es) 2016-06-08 2017-06-07 Metodo de decodificacion de canal y aparato que utiliza informacion priori estructurada de preambulo.

Country Status (4)

Country Link
US (1) US10122383B2 (es)
KR (1) KR102340200B1 (es)
MX (1) MX2018015133A (es)
WO (1) WO2017213409A1 (es)

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WO2017014591A1 (en) * 2015-07-23 2017-01-26 Samsung Electronics Co., Ltd. Transmitting apparatus, receiving apparatus, and control methods thereof
EP3485648B1 (en) * 2016-07-15 2022-02-02 One Media, LLC Control signaling in a broadcast system
KR102557444B1 (ko) * 2017-11-10 2023-07-20 한국전자통신연구원 인젝션 레벨 정보에 상응하는 인핸스드 레이어 피지컬 레이어 파이프를 이용하는 방송 신호 프레임 생성 장치 및 방송 신호 프레임 생성 방법
CN108667808A (zh) * 2018-04-12 2018-10-16 上海交通大学 支持专用回传链路的atsc3.0底层信令的通信方法
CN114079535B (zh) 2020-08-20 2023-02-17 腾讯科技（深圳）有限公司 转码方法、装置、介质和电子设备
US11979171B2 (en) 2020-10-13 2024-05-07 Microchip Technology Incorporated Reduced complexity encoders and related systems, methods, and devices
CN116325517A (zh) * 2020-10-13 2023-06-23 微芯片技术股份有限公司 具有改善的错误校正的降低复杂性的ldpc解码器以及相关系统、方法和装置
CN113872613A (zh) * 2021-09-30 2021-12-31 广州慧睿思通科技股份有限公司 极化码译码中g函数的计算方法、装置、电子设备及介质
CN116055020B (zh) * 2023-03-30 2023-06-02 南京邮电大学 非正交导频构建方法及免授权接入过程的信号传输方法

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US7562278B2 (en) 2005-12-29 2009-07-14 Intel Corporation Incremental forward error correction redundancy
EP1811674A1 (en) * 2006-01-23 2007-07-25 Motorola, Inc. Apparatus and methods for jointly decoding messages based on apriori knowledge of modified codeword transmission
US8934890B2 (en) * 2008-01-11 2015-01-13 Texas Instruments Incorporated Transmission of data bursts on a constant data rate channel
JP5303784B2 (ja) * 2009-03-10 2013-10-02 株式会社日立製作所 無線通信システム
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Also Published As

Publication number Publication date
KR20170138928A (ko) 2017-12-18
WO2017213409A1 (en) 2017-12-14
KR102340200B1 (ko) 2021-12-16
US10122383B2 (en) 2018-11-06
US20170359147A1 (en) 2017-12-14

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