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Brandberg et al., 2018 - Google Patents

A SimEvents model for the analysis of scheduling and memory access delays in multicores

Brandberg et al., 2018

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Document ID
3955259968327675459
Author
Brandberg C
Di Natale M
Publication year
Publication venue
2018 IEEE 13th International Symposium on Industrial Embedded Systems (SIES)

External Links

Snippet

Model-based development of CPSs is based on the capability of early verification of system properties on a model of the controls and the controlled physical system. In the development of multicore systems, the scheduling and contention delays may significantly affect the …
Continue reading at www.iris.sssup.it (PDF) (other versions)

Classifications

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    • G06F9/48—Programme initiating; Programme switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
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