[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Yu et al., 2020 - Google Patents

Efficient FFT Implementation on a CGRA

Yu et al., 2020

Document ID
3831176691405777641
Author
Yu L
Jinjiang Y
Leibo L
Publication year
Publication venue
Proceedings of the 2020 5th International Conference on Mathematics and Artificial Intelligence

External Links

Snippet

In this paper, we present an efficient implementation of FFT algorithm on a CGRA-based reconfigurable architecture. Radix-4 method is used in this paper according to the advantages of proposed CGRA. The performance of the radix-4 FFT implementation is …
Continue reading at dl.acm.org (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/14Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/141Discrete Fourier transforms
    • G06F17/142Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored programme computers
    • G06F15/80Architectures of general purpose stored programme computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007Architectures of general purpose stored programme computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/30Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/30Information retrieval; Database structures therefor; File system structures therefor
    • G06F17/30286Information retrieval; Database structures therefor; File system structures therefor in structured data stores
    • G06F17/30386Retrieval requests
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored programme computers
    • G06F15/78Architectures of general purpose stored programme computers comprising a single central processing unit
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/30Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/30Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/34Addressing or accessing the instruction operand or the result; Formation of operand address; Addressing modes
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5045Circuit design
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation

Similar Documents

Publication Publication Date Title
Liu et al. A high-flexible low-latency memory-based FFT processor for 4G, WLAN, and future 5G
Zhong et al. A power-scalable reconfigurable FFT/IFFT IC based on a multi-processor ring
Xia et al. A memory-based FFT processor design with generalized efficient conflict-free address schemes
Chen et al. A variable-size FFT hardware accelerator based on matrix transposition
Ismail et al. Design of pipelined radix-2, 4 and 8 based multipath delay commutator (MDC) FFT
Mu et al. Scalable and conflict-free NTT hardware accelerator design: Methodology, proof, and implementation
Yu et al. FPGA architecture for 2D Discrete Fourier Transform based on 2D decomposition for large-sized data
Shami et al. Configurable FFT processor using dynamically reconfigurable resource arrays
CN112231626A (en) FFT processor
Richardson et al. Building conflict-free FFT schedules
Sung Memory-efficient and high-speed split-radix FFT/IFFT processor based on pipelined CORDIC rotations
Yu et al. Efficient FFT Implementation on a CGRA
Wang et al. A hybrid SDC/SDF architecture for area and power minimization of floating-point FFT computations
Huang et al. A high-parallelism memory-based FFT processor with high SQNR and novel addressing scheme
Han et al. An ultra-long FFT architecture implemented in a reconfigurable application specified processor
Wang et al. Design of pipelined FFT processor based on FPGA
Chang Design of an 8192-point sequential I/O FFT chip
Mukherjee et al. A novel architecture of area efficient FFT algorithm for FPGA implementation
Lopes et al. Fast fourier transform on the versat CGRA
Kallapu et al. DRRA-based Reconfigurable Architecture for Mixed-Radix FFT
More et al. FPGA implementation of FFT processor using vedic algorithm
Dhilleswararao et al. Efficient Implementation of 2-D Convolution on DRRA and DiMArch Architectures
Jinhe et al. An efficient implementation of fft based on cgra
Ma et al. A novel conflict-free parallel memory access scheme for FFT constant geometry architectures
Mohan et al. Implementation of N-Point FFT/IFFT processor based on Radix-2 Using FPGA