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Dugan et al., 1994 - Google Patents

Simple models of hardware and software fault tolerance

Dugan et al., 1994

Document ID
3722473583017804154
Author
Dugan J
Doyle S
Patterson-Hine F
Publication year
Publication venue
Proceedings of Annual Reliability and Maintainability Symposium (RAMS)

External Links

Snippet

This paper presents a quantitative analysis of three different architectural approaches to the integration of hardware and software fault tolerance. Using a common set of assumptions, and hypothetical parameter values, the authors compare the reliability of DRB (Distributed …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

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    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant details of failing over
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    • G06F11/2097Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements maintaining the standby controller/processing unit updated
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    • G06F11/183Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components
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    • GPHYSICS
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