Lorenzon et al., 2019 - Google Patents
Parallel computing hits the power wall: principles, challenges, and a survey of solutionsLorenzon et al., 2019
- Document ID
- 3190009165279258759
- Author
- Lorenzon A
- Beck Filho A
- Publication year
External Links
Snippet
This book describes several approaches to adaptability that are applied for the optimization of parallel applications, such as thread-level parallelism exploitation and dynamic voltage and frequency scaling on multicore systems. This book explains how software developers …
- 238000000034 method 0 abstract description 109
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5061—Partitioning or combining of resources
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/30—Arrangements for executing machine-instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
- G06F9/3889—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Programme initiating; Programme switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/30—Arrangements for executing machine-instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/30087—Synchronisation or serialisation instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power Management, i.e. event-based initiation of power-saving mode
- G06F1/3234—Action, measure or step performed to reduce power consumption
- G06F1/3237—Power saving by disabling clock generation or distribution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformations of program code
- G06F8/41—Compilation
- G06F8/45—Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions
- G06F8/456—Parallelism detection
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformations of program code
- G06F8/41—Compilation
- G06F8/44—Encoding
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5009—Computer-aided design using simulation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored programme computers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F2217/00—Indexing scheme relating to computer aided design [CAD]
- G06F2217/78—Power analysis and optimization
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Lorenzon et al. | Parallel computing hits the power wall: principles, challenges, and a survey of solutions | |
Hager et al. | Introduction to high performance computing for scientists and engineers | |
Eeckhout | Computer architecture performance evaluation methods | |
Cai et al. | Meeting points: using thread criticality to adapt multicore hardware to parallel regions | |
Wang et al. | Melia: A mapreduce framework on opencl-based fpgas | |
Lorenzon et al. | Investigating different general-purpose and embedded multicores to achieve optimal trade-offs between performance and energy | |
Tan et al. | Analysis and performance results of computing betweenness centrality on IBM Cyclops64 | |
Ma et al. | An analytical framework for estimating scale-out and scale-up power efficiency of heterogeneous manycores | |
Baskaran et al. | An architecture interface and offload model for low-overhead, near-data, distributed accelerators | |
Rawlins et al. | A cache tuning heuristic for multicore architectures | |
Lin et al. | Compilers for low power with design patterns on embedded multicore systems | |
Boyer | Improving Resource Utilization in Heterogeneous CPU-GPU Systems | |
Kumar | Holistic design for multi-core architectures | |
Beck Filho | Arthur Francisco Lorenzon | |
Wei et al. | Compilation System | |
Totoni | Power and energy management of modern architectures in adaptive HPC runtime systems | |
Natvig et al. | Green computing: saving energy by throttling, simplicity and parallelization | |
Kandiah | Computer Science Department | |
Kandiah | Uncovering Latent Hardware/Software Parallelism | |
Kerrison | Energy modelling of multi-threaded, multi-core software for embedded systems | |
Abeydeera | Scalable and Broad Hardware Acceleration Through Practical Speculative Parallelism | |
Helal | Automated Runtime Analysis and Adaptation for Scalable Heterogeneous Computing | |
Chronaki | Exploiting asymmetric multi-core systems with flexible system software | |
Siqi | Synergistic Computing on Heterogeneous Multiprocessors | |
Ma | Modeling and Evaluation of Multi-core Multithreaded Processor Architectures in SystemC |