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Ma et al., 1999 - Google Patents

A comparison of bridging fault simulation methods

Ma et al., 1999

Document ID
2881790857523849360
Author
Ma S
Shaik I
Fetherston R
Publication year
Publication venue
International Test Conference 1999. Proceedings (IEEE Cat. No. 99CH37034)

External Links

Snippet

This study provides bridging fault simulation data obtained from the AMD-K6 microprocessor. It shows that:(1) high stuck-at fault coverage (99.5%) implies high bridging fault coverage;(2) coverage of a bridging fault by both wired-AND and wired-OR behavior …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

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    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequence
    • G01R31/318342—Generation of test inputs, e.g. test vectors, patterns or sequence by preliminary fault modelling, e.g. analysis, simulation
    • G01R31/31835—Analysis of test coverage or failure detectability
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    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318583—Design for test
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    • G01R31/318594—Timing aspects
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    • G01R31/318572—Input/Output interfaces
    • G—PHYSICS
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    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
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    • G06F2217/70—Fault tolerant, i.e. transient fault suppression

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