Klaiber et al., 2015 - Google Patents
A resource-efficient hardware architecture for connected component analysisKlaiber et al., 2015
- Document ID
- 2791604803781601543
- Author
- Klaiber M
- Bailey D
- Baroud Y
- Simon S
- Publication year
- Publication venue
- IEEE Transactions on Circuits and Systems for Video Technology
External Links
Snippet
A resource-efficient hardware architecture for connected component analysis (CCA) of streamed video data is presented, which reduces the required hardware resources, especially for larger image widths. On-chip memory requirements increase with image width …
- 238000004458 analytical method 0 title abstract description 23
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06K—RECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K9/00—Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
- G06K9/36—Image preprocessing, i.e. processing the image information without deciding about the identity of the image
- G06K9/46—Extraction of features or characteristics of the image
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/30—Arrangements for executing machine-instructions, e.g. instruction decode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/20—Special algorithmic details
- G06T2207/20112—Image segmentation details
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/46—Multiprogramming arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06K—RECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K9/00—Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
- G06K9/62—Methods or arrangements for recognition using electronic means
- G06K9/6201—Matching; Proximity measures
- G06K9/6202—Comparing pixel values or logical combinations thereof, or feature values having positional relevance, e.g. template matching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/30—Subject of image; Context of image processing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/30—Information retrieval; Database structures therefor; File system structures therefor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T9/00—Image coding, e.g. from bit-mapped to non bit-mapped
- G06T9/001—Model-based coding, e.g. wire frame
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T11/00—2D [Two Dimensional] image generation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2200/00—Indexing scheme for image data processing or generation, in general
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Klaiber et al. | A resource-efficient hardware architecture for connected component analysis | |
GB2542131B (en) | Graphics processing method and system for processing sub-primitives | |
EP0602887B1 (en) | Performing arithmetic on composite operands | |
Bilaniuk et al. | Fast LBP face detection on low-power SIMD architectures | |
Berjon et al. | GPU-based implementation of an optimized nonparametric background modeling for real-time moving object detection | |
Hashmi et al. | A new approach for real time object detection and tracking on high resolution and multi-camera surveillance videos using GPU | |
He et al. | Pointinst3d: Segmenting 3d instances by points | |
Klaiber et al. | A single-cycle parallel multi-slice connected components analysis hardware architecture | |
Kowalczyk et al. | Real-time FPGA implementation of parallel connected component labelling for a 4K video stream | |
Walczyk et al. | Comparative study on connected component labeling algorithms for embedded video processing systems. | |
Meribout et al. | A parallel algorithm for real-time object recognition | |
Zhao et al. | A memory-efficient hardware architecture for connected component labeling in embedded system | |
US7388584B2 (en) | Method and program for determining insides and outsides of boundaries | |
CN113743573B (en) | Techniques for accessing and utilizing compressed data and state information thereof | |
He et al. | A fast algorithm for integrating connected-component labeling and euler number computation | |
Park et al. | A vision processor with a unified interest-point detection and matching hardware for accelerating a stereo-matching algorithm | |
Oro et al. | Work-efficient parallel non-maximum suppression kernels | |
Chan et al. | Efficient content analysis engine for visual surveillance network | |
Kumar et al. | Parallel blob extraction using the multi-core Cell processor | |
Peng et al. | A GPU-accelerated approach for feature tracking in time-varying imagery datasets | |
Qasaimeh et al. | A runtime configurable hardware architecture for computing histogram-based feature descriptors | |
CN114693919A (en) | Target detection method, terminal equipment and storage medium | |
Jordan et al. | A co-processed contour tracing algorithm for a smart camera | |
CN114254143A (en) | Distributed image searching method and system based on clickhouse | |
Luan et al. | An optimized run-length based algorithm for sparse remote sensing image labeling |