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Beyer et al., 2003 - Google Patents

Instantiating uninterpreted functional units and memory system: Functional verification of the VAMP

Beyer et al., 2003

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Document ID
2223515005507295818
Author
Beyer S
Jacobi C
Kröning D
Leinenbach D
Paul W
Publication year
Publication venue
Correct Hardware Design and Verification Methods: 12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003, L’Aquila, Italy, October 21-24, 2003. Proceedings 12

External Links

Snippet

In the VAMP (verified architecture microprocessor) project we have designed, functionally verified, and synthesized a processor with full DLX instruction set, delayed branch, Tomasulo scheduler, maskable nested precise interrupts, pipelined fully IEEE compatible …
Continue reading at www.kroening.com (PDF) (other versions)

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