[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Wang et al., 2007 - Google Patents

FPGA design for real-time implementation of constrained energy minimization for hyperspectral target detection

Wang et al., 2007

Document ID
2091781419496488492
Author
Wang J
Chang C
Publication year
Publication venue
High Performance Computing in Remote sensing

External Links

Snippet

Chapter 16 FPGA Design for Real-Time Implementation of Constrained Energy Minimization for Hyperspectral Target Detection Jianwei Wang, University of Maryland, Baltimore County Chein-I Chang, University of Maryland, Baltimore CountyContents 16.1 …
Continue reading at www.taylorfrancis.com (other versions)

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/4806—Computations with complex numbers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/15—Correlation function computation including computation of convolution operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization

Similar Documents

Publication Publication Date Title
US7366326B2 (en) Real-time implementation of field programmable gate arrays (FPGA) design in hyperspectral imaging
Iyer et al. Geometric consistency for self-supervised end-to-end visual odometry
CN101777887A (en) FPGA (Field Programmable Gata Array)-based unscented kalman filter system and parallel implementation method
Xu et al. Efficient fast convolution architectures for convolutional neural network
US7979484B2 (en) Method and system for accelerating the computation of adaptive weights using matrix inverse calculations
Mujawar et al. An efficient CNN architecture for image classification on FPGA accelerator
Hussain et al. An efficient and fast softmax hardware architecture (EFSHA) for deep neural networks
Allaoui et al. FPGA-based implementation of optical flow algorithm
Wei et al. A fast and accurate tensor-based optical flow algorithm implemented in FPGA
Dhamodharan Design and analysis of cnn based residue number system for performance enhancement
Wang et al. FPGA design for real-time implementation of constrained energy minimization for hyperspectral target detection
Ngo et al. A flexible and efficient hardware architecture for real-time face recognition based on eigenface
CN113177546A (en) Target detection method based on sparse attention module
Wang et al. FPGA design for constrained energy minimization
Sokolovskiy et al. Hardware diagram computing devices navigation equipment consumers SRNS
Lin et al. Efficient VLSI design for SIFT feature description
Guda et al. FPGA implementation of L 1/2 sparsity constrained nonnegative matrix factorization algorithm for remotely sensed hyperspectral image analysis
Wong et al. Towards a reconfigurable tracking system
CN113030945A (en) Phased array radar target tracking method based on linear sequential filtering
McErlean An FPGA implementation of hierarchical motion estimation for embedded object tracking
Ren et al. Atfvo: An attentive tensor-compressed lstm model with optical flow features for monocular visual odometry
Dickson et al. QRD and SVD processor design based on an approximate rotations algorithm
Brassai et al. Visual trajectory control of a mobile robot using FPGA implemented neural network
Domenech-Asensi et al. Real time architectures for the Scale Invariant Feature Transform algorithm
Pfitzner et al. A flexible hardware architecture for real-time airborne Wavenumber Domain SAR processing