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Kropewnicki et al., 2001 - Google Patents

Understanding the evolution of trench profiles in the via-first dual damascene integration scheme

Kropewnicki et al., 2001

Document ID
17201001634049530874
Author
Kropewnicki T
Doan K
Tang B
Björkman C
Publication year
Publication venue
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films

External Links

Snippet

The introduction of copper interconnects into integrated circuits has increased the use of dual damascene dielectric etch applications because copper films are difficult to plasma etch. Fencing and faceting around the via hole during the trench etch of the via-first dual …
Continue reading at pubs.aip.org (other versions)

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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
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    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
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    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
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