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Lee et al., 2008 - Google Patents

Drain breakdown voltage in MuGFETs: Influence of physical parameters

Lee et al., 2008

Document ID
16854084110494533827
Author
Lee C
Afzalian A
Yan R
Akhavan N
Xiong W
Colinge J
Publication year
Publication venue
IEEE transactions on electron devices

External Links

Snippet

This paper analyzes the drain breakdown voltage of multigate MOSFETs and the influence of parameters such as doping concentration, fin width, and gate length. The good electrostatic control of the active area by the multigate structure improves the drain …
Continue reading at ieeexplore.ieee.org (other versions)

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    • H01L29/66Types of semiconductor device; Multistep manufacturing processes therefor
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    • H01L29/76Unipolar devices, e.g. field effect transistors
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    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
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    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
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    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
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    • H01L27/092Complementary MIS field-effect transistors
    • H01L27/0924Complementary MIS field-effect transistors including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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