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Seiler et al., 2008 - Google Patents

Larrabee: a many-core x86 architecture for visual computing

Seiler et al., 2008

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Document ID
16688585916114853445
Author
Seiler L
Carmean D
Sprangle E
Forsyth T
Abrash M
Dubey P
Junkins S
Lake A
Sugerman J
Cavin R
Espasa R
Grochowski E
Juan T
Hanrahan P
Publication year
Publication venue
ACM Transactions on Graphics (TOG)

External Links

Snippet

This paper presents a many-core visual computing architecture code named Larrabee, a new software rendering pipeline, a manycore programming model, and performance analysis for several applications. Larrabee uses multiple in-order x86 CPU cores that are …
Continue reading at www.intel.cn (PDF) (other versions)

Classifications

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    • G06F9/30Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
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    • G06F9/46Multiprogramming arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/003D [Three Dimensional] image rendering
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    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
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