Sivakumar et al., 2019 - Google Patents
Error detection of data conversion in flash ADC using code width based techniqueSivakumar et al., 2019
View PDF- Document ID
- 15290140339067411932
- Author
- Sivakumar M
- Gurumekala T
- Pulya S
- Publication year
- Publication venue
- Procedia Computer Science
External Links
Snippet
The high integration density of the complex electronic system requires the multi-functional testing facility to ensure the accuracy of the circuit function. In addition, the wide population of submicron technologies results in the persistent requirements of high precision analog …
- 238000006243 chemical reaction 0 title abstract description 13
Classifications
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/40—Analogue value compared with reference values sequentially only, e.g. successive approximation type recirculation type
- H03M1/403—Analogue value compared with reference values sequentially only, e.g. successive approximation type recirculation type using switched capacitors
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
- H03M1/0678—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
- H03M1/068—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS
- H03M1/0682—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS using a differential network structure, i.e. symmetrical with respect to ground
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
- H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
- H03M1/362—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider
- H03M1/365—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider the voltage divider being a single resistor string
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0634—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
- H03M1/80—Simultaneous conversion using weighted impedances
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0602—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
- H03M1/0836—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of phase error, e.g. jitter
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1009—Calibration
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1071—Measuring or testing
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Lee et al. | A 21 fJ/conversion-step 100 kS/s 10-bit ADC with a low-noise time-domain comparator for low-power sensor interface | |
Pelgrom et al. | Analog-to-digital conversion | |
Portmann et al. | Power-efficient metastability error reduction in CMOS flash A/D converters | |
US8587466B2 (en) | System and method for a successive approximation analog to digital converter | |
Chen et al. | USER-SMILE: Ultrafast stimulus error removal and segmented model identification of linearity errors for ADC built-in self-test | |
Sivakumar et al. | Error detection of data conversion in flash ADC using code width based technique | |
Hanfoug et al. | Behavioral non-ideal model of 8-bit current-mode successive approximation registers ADC by using Simulink | |
Gupta et al. | Implementation of low supply rail-to-rail differential voltage comparator on flexible hardware for a flash ADC | |
Jin et al. | Low-cost high-quality constant offset injection for SEIR-based ADC built-in-self-test | |
Arteaga et al. | Blind adaptive estimation of integral nonlinear errors in ADCs using arbitrary input stimulus | |
Zlochisti et al. | Digitally programmable offset compensation of comparators in flash ADCs for hybrid ADC architectures | |
Duan et al. | A low cost method for testing offset and gain error for ADC BIST | |
Senthil Sivakumar et al. | Efficient Design of ADC BIST with an Analog Ramp Signal Generation and Digital Error Estimation | |
Senthil Sivakumar et al. | An ADC BIST using on-chip ramp generation and digital ORA | |
Jung et al. | A novel self-calibration scheme for 12-bit 50MS/s SAR ADC | |
Tembhre et al. | Testing of an 8-bit Sigma Delta ADC Based on Code Width Technique Using 45nm Technology | |
Hassan et al. | A 0.002‐mm2 8‐bit 1‐MS/s low‐power time‐based DAC (T‐DAC) | |
Zhao et al. | An 18‐bit 1‐GS/s time interleaved analog‐to‐digital converter with timing skew calibration based on an adaptive genetic algorithm | |
Shen et al. | A capacitive mismatch calibration method for SAR ADCs based on TDC | |
Kardonik | A study of SAR ADC and implementation of 10-bit asynchronous design | |
Fan et al. | Design considerations for low power time‐mode SAR ADC | |
Paldurai et al. | An Efficient Time-Tick based BIST Scheme to Calculate Static Errors of ADC | |
Ramesh et al. | A novel on chip circuit for fault detection in digital to analog converters | |
Ma et al. | Analysis and Calibration of Bit Weights in SAR and Pipelined SAR ADCs Based on Code Distribution | |
Pérez et al. | A 9.78-ENOB 10 MS/s SAR ADC with a Common Mode Compensation Technique in a 28nm CMOS Node |