[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Sivakumar et al., 2019 - Google Patents

Error detection of data conversion in flash ADC using code width based technique

Sivakumar et al., 2019

View PDF
Document ID
15290140339067411932
Author
Sivakumar M
Gurumekala T
Pulya S
Publication year
Publication venue
Procedia Computer Science

External Links

Snippet

The high integration density of the complex electronic system requires the multi-functional testing facility to ensure the accuracy of the circuit function. In addition, the wide population of submicron technologies results in the persistent requirements of high precision analog …
Continue reading at www.sciencedirect.com (PDF) (other versions)

Classifications

    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/34Analogue value compared with reference values
    • H03M1/38Analogue value compared with reference values sequentially only, e.g. successive approximation type
    • H03M1/40Analogue value compared with reference values sequentially only, e.g. successive approximation type recirculation type
    • H03M1/403Analogue value compared with reference values sequentially only, e.g. successive approximation type recirculation type using switched capacitors
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0675Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
    • H03M1/0678Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
    • H03M1/068Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS
    • H03M1/0682Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS using a differential network structure, i.e. symmetrical with respect to ground
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/34Analogue value compared with reference values
    • H03M1/36Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H03M1/361Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
    • H03M1/362Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider
    • H03M1/365Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider the voltage divider being a single resistor string
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/14Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0634Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • H03M1/74Simultaneous conversion
    • H03M1/80Simultaneous conversion using weighted impedances
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0602Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/08Continuously compensating for, or preventing, undesired influence of physical parameters of noise
    • H03M1/0836Continuously compensating for, or preventing, undesired influence of physical parameters of noise of phase error, e.g. jitter
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10Calibration or testing
    • H03M1/1009Calibration
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10Calibration or testing
    • H03M1/1071Measuring or testing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof

Similar Documents

Publication Publication Date Title
Lee et al. A 21 fJ/conversion-step 100 kS/s 10-bit ADC with a low-noise time-domain comparator for low-power sensor interface
Pelgrom et al. Analog-to-digital conversion
Portmann et al. Power-efficient metastability error reduction in CMOS flash A/D converters
US8587466B2 (en) System and method for a successive approximation analog to digital converter
Chen et al. USER-SMILE: Ultrafast stimulus error removal and segmented model identification of linearity errors for ADC built-in self-test
Sivakumar et al. Error detection of data conversion in flash ADC using code width based technique
Hanfoug et al. Behavioral non-ideal model of 8-bit current-mode successive approximation registers ADC by using Simulink
Gupta et al. Implementation of low supply rail-to-rail differential voltage comparator on flexible hardware for a flash ADC
Jin et al. Low-cost high-quality constant offset injection for SEIR-based ADC built-in-self-test
Arteaga et al. Blind adaptive estimation of integral nonlinear errors in ADCs using arbitrary input stimulus
Zlochisti et al. Digitally programmable offset compensation of comparators in flash ADCs for hybrid ADC architectures
Duan et al. A low cost method for testing offset and gain error for ADC BIST
Senthil Sivakumar et al. Efficient Design of ADC BIST with an Analog Ramp Signal Generation and Digital Error Estimation
Senthil Sivakumar et al. An ADC BIST using on-chip ramp generation and digital ORA
Jung et al. A novel self-calibration scheme for 12-bit 50MS/s SAR ADC
Tembhre et al. Testing of an 8-bit Sigma Delta ADC Based on Code Width Technique Using 45nm Technology
Hassan et al. A 0.002‐mm2 8‐bit 1‐MS/s low‐power time‐based DAC (T‐DAC)
Zhao et al. An 18‐bit 1‐GS/s time interleaved analog‐to‐digital converter with timing skew calibration based on an adaptive genetic algorithm
Shen et al. A capacitive mismatch calibration method for SAR ADCs based on TDC
Kardonik A study of SAR ADC and implementation of 10-bit asynchronous design
Fan et al. Design considerations for low power time‐mode SAR ADC
Paldurai et al. An Efficient Time-Tick based BIST Scheme to Calculate Static Errors of ADC
Ramesh et al. A novel on chip circuit for fault detection in digital to analog converters
Ma et al. Analysis and Calibration of Bit Weights in SAR and Pipelined SAR ADCs Based on Code Distribution
Pérez et al. A 9.78-ENOB 10 MS/s SAR ADC with a Common Mode Compensation Technique in a 28nm CMOS Node