[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Andri et al., 2017 - Google Patents

YodaNN: An architecture for ultralow power binary-weight CNN acceleration

Andri et al., 2017

View PDF
Document ID
15149424704350239204
Author
Andri R
Cavigelli L
Rossi D
Benini L
Publication year
Publication venue
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

External Links

Snippet

Convolutional neural networks (CNNs) have revolutionized the world of computer vision over the last few years, pushing image classification beyond human accuracy. The computational effort of today's CNNs requires power-hungry parallel processors or GP …
Continue reading at arxiv.org (PDF) (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power Management, i.e. event-based initiation of power-saving mode
    • G06F1/3234Action, measure or step performed to reduce power consumption
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored programme computers
    • G06F15/78Architectures of general purpose stored programme computers comprising a single central processing unit
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/30Information retrieval; Database structures therefor; File system structures therefor
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06KRECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K9/00Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints

Similar Documents

Publication Publication Date Title
Andri et al. YodaNN: An architecture for ultralow power binary-weight CNN acceleration
Cavigelli et al. Origami: A 803-GOp/s/W convolutional network accelerator
Conti et al. XNOR neural engine: A hardware accelerator IP for 21.6-fJ/op binary neural network inference
Rossi et al. Vega: A ten-core SoC for IoT endnodes with DNN acceleration and cognitive wake-up from MRAM-based state-retentive sleep mode
Andri et al. YodaNN: An ultra-low power convolutional neural network accelerator based on binary weights
Whatmough et al. Fixynn: Efficient hardware for mobile computer vision via transfer learning
Meloni et al. NEURAghe: Exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on Zynq SoCs
Boutros et al. You cannot improve what you do not measure: FPGA vs. ASIC efficiency gaps for convolutional neural network inference
Chen et al. A small-footprint accelerator for large-scale neural networks
Nguyen et al. ShortcutFusion: From tensorflow to FPGA-based accelerator with a reuse-aware memory allocation for shortcut data
Alioto et al. Energy-quality scalable integrated circuits and systems: Continuing energy scaling in the twilight of Moore’s law
Scherer et al. CUTIE: Beyond PetaOp/s/W ternary DNN inference acceleration with better-than-binary energy efficiency
Hunter et al. Two sparsities are better than one: unlocking the performance benefits of sparse–sparse networks
Andri et al. Hyperdrive: A multi-chip systolically scalable binary-weight CNN inference engine
Mei et al. A 200mhz 202.4 gflops@ 10.8 w vgg16 accelerator in xilinx vx690t
Andri et al. Chewbaccann: A flexible 223 tops/w bnn accelerator
Liu et al. An efficient FPGA-based depthwise separable convolutional neural network accelerator with hardware pruning
Que et al. A reconfigurable multithreaded accelerator for recurrent neural networks
Ali et al. Hardware accelerators and accelerators for machine learning
Whatmough et al. FixyNN: Energy-efficient real-time mobile computer vision hardware acceleration via transfer learning
Kwon et al. Sparse convolutional neural network acceleration with lossless input feature map compression for resource‐constrained systems
Eid et al. Hardware implementation of YOLOv4-tiny for object detection
Chippa et al. Energy-efficient recognition and mining processor using scalable effort design
Kulkarni et al. Low overhead CS-based heterogeneous framework for big data acceleration
Servais et al. Adaptive computation reuse for energy-efficient training of deep neural networks