[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Piscitelli et al., 2012 - Google Patents

A Signature‐Based Power Model for MPSoC on FPGA

Piscitelli et al., 2012

View PDF @Full View
Document ID
14026788234132950969
Author
Piscitelli R
Pimentel A
Publication year
Publication venue
VLSI Design

External Links

Snippet

This paper presents a framework for high‐level power estimation of multiprocessor systems‐ on‐chip (MPSoC) architectures on FPGA. The technique is based on abstract execution profiles, called event signatures, and it operates at a higher level of abstraction than, for …
Continue reading at onlinelibrary.wiley.com (PDF) (other versions)

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5009—Computer-aided design using simulation
    • G06F17/5022—Logic simulation, e.g. for logic circuit operation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5045—Circuit design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored programme computers
    • G06F15/78—Architectures of general purpose stored programme computers comprising a single central processing unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/44—Arrangements for executing specific programmes
    • G06F9/455—Emulation; Software simulation, i.e. virtualisation or emulation of application or operating system execution engines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00—Indexing scheme relating to computer aided design [CAD]
    • G06F2217/78—Power analysis and optimization
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46—Multiprogramming arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00—Indexing scheme relating to computer aided design [CAD]
    • G06F2217/70—Fault tolerant, i.e. transient fault suppression
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00—Indexing scheme relating to computer aided design [CAD]
    • G06F2217/86—Hardware-Software co-design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00—Indexing scheme relating to computer aided design [CAD]
    • G06F2217/68—Processors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformations of program code
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled

Similar Documents

Publication Publication Date Title
Kempf et al. A SW performance estimation framework for early system-level-design using fine-grained instrumentation
Trabelsi et al. A model-driven approach for hybrid power estimation in embedded systems design
US12112202B2 (en) Framework for application driven exploration and optimization of hardware engines
Kapre et al. Survey of domain-specific languages for FPGA computing
Genko et al. Feature-NoC emulation: a tool and design flow for MPSoC
Khamis et al. Emulation and verification framework for MPSoC based on NoC and RISC-V
Murali et al. Improved design debugging architecture using low power serial communication protocols for signal processing applications
Youssef et al. Debugging HW/SW interface for MPSoC: video encoder system design case study
Beltrame et al. Multi-accuracy power and performance transaction-level modeling
Piscitelli et al. A high-level power model for mpsoc on fpga
Piscitelli et al. A Signature‐Based Power Model for MPSoC on FPGA
Tan et al. Verilog HDL simulator technology: a survey
Lemaire et al. A flexible modeling environment for a NoC-based multicore architecture
Zamora et al. System-level performance/power analysis for platform-based design of multimedia applications
Meloni et al. Enabling Fast ASIP Design Space Exploration: An FPGA‐Based Runtime Reconfigurable Prototyper
Orcioni et al. Energy estimation in SystemC with Powersim
Sahlbach et al. A system-level FPGA design methodology for video applications with weakly-programmable hardware components
Ammar et al. The performance-energy tradeoff in embedded systems design: A survey of existing design space exploration tools and trends
Meloni et al. An FPGA-based framework for technology-aware prototyping of multicore embedded architectures
Kreku Early-phase performance evaluation of computer systems using workload models and SystemC
Stralen et al. A high-level microprocessor power modeling technique based on event signatures
Plyaskin et al. A method for accurate high-level performance evaluation of MPSoC architectures using fine-grained generated traces
Spasic et al. An accurate energy model for streaming applications mapped on mpsoc platforms
Kreku et al. Layered UML workload and SystemC platform models for performance simulation
Bailey et al. Codesign experiences based on a virtual platform