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Fiske et al., 1995 - Google Patents

Thread prioritization: A thread scheduling mechanism for multiple-context parallel processors

Fiske et al., 1995

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Document ID
13531883631902747562
Author
Fiske S
Dally W
Publication year
Publication venue
Future Generation Computer Systems

External Links

Snippet

Multiple-context processors provide register resources that allow rapid context switching between several threads as a means of tolerating long communication and synchronization latencies. When scheduling threads on such a processor, we must first decide which threads …
Continue reading at citeseerx.ist.psu.edu (PDF) (other versions)

Classifications

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