[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Dasgupta et al., 2020 - Google Patents

BSIM compact model of quantum confinement in advanced nanosheet FETs

Dasgupta et al., 2020

Document ID
13467150960812465424
Author
Dasgupta A
Parihar S
Kushwaha P
Agarwal H
Kao M
Salahuddin S
Chauhan Y
Hu C
Publication year
Publication venue
IEEE Transactions on Electron Devices

External Links

Snippet

We propose a compact model for nanosheet FETs that take the effects of quantum confinement into account. The model captures the nanosheet width and thickness dependence of the electrostatic dimension, density of states, effective mass, subband …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5009—Computer-aided design using simulation
    • G06F17/5036—Computer-aided design using simulation for analog modelling, e.g. for circuits, spice programme, direct methods, relaxation methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5068—Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
    • G06F17/5081—Layout analysis, e.g. layout verification, design rule check
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5009—Computer-aided design using simulation
    • G06F17/5018—Computer-aided design using simulation using finite difference methods or finite element methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5009—Computer-aided design using simulation
    • G06F17/504—Formal methods
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/30—Information retrieval; Database structures therefor; File system structures therefor
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00—Indexing scheme relating to computer aided design [CAD]
    • G06F2217/78—Power analysis and optimization

Similar Documents

Publication Publication Date Title
Dasgupta et al. BSIM compact model of quantum confinement in advanced nanosheet FETs
Lee et al. A compact virtual-source model for carbon nanotube FETs in the sub-10-nm regime—Part I: Intrinsic elements
Granzner et al. Simulation of nanoscale MOSFETs using modified drift-diffusion and hydrodynamic models and comparison with Monte Carlo results
Roldan et al. Modeling the centroid and the inversion charge in cylindrical surrounding gate MOSFETs, including quantum effects
Niquet et al. Quantum calculations of the carrier mobility: Methodology, Matthiessen's rule, and comparison with semi-classical approaches
Yang et al. Transistor compact model based on multigradient neural network and its application in SPICE circuit simulations for gate-all-around Si cold source FETs
Yelten et al. Surrogate-model-based analysis of analog circuits—Part I: Variability analysis
Kabaoğlu et al. Statistical MOSFET modeling methodology for cryogenic conditions
Berrada et al. Nano-electronic Simulation Software (NESS): a flexible nano-device simulation platform
Zebrev et al. Compact Modeling of MOSFET $ I $–$ V $ Characteristics and Simulation of Dose-Dependent Drain Currents
Akturk et al. Compact and distributed modeling of cryogenic bulk MOSFET operation
Dasgupta et al. Compact modeling of cross-sectional scaling in gate-all-around FETs: 3-D to 1-D transition
Prégaldiny et al. An advanced explicit surface potential model physically accounting for the quantization effects in deep-submicron MOSFETs
He et al. BSIM5: An advanced charge-based MOSFET model for nanoscale VLSI circuit simulation
Roldán et al. The dependence of the electron mobility on the longitudinal electric field in MOSFETs
Hills et al. Rapid exploration of processing and design guidelines to overcome carbon nanotube variations
Shamsir et al. Semiconductor device modeling and simulation for electronic circuit design
Singh et al. Modeling Approaches to Field-Effect Transistors
Dai et al. Improving convergence and simulation time of quantum hydrodynamic simulation: Application to extraction of best 10-nm FinFET parameter values
Subramaniam et al. Drain current models for single-gate MOSFETs & undoped symmetric & asymmetric double-gate SOI MOSFETs and quantum mechanical effects: a review
Munteanu et al. A 2-D/3-D Schrödinger-Poisson Drift-Diffusion Numerical Simulation of Radially-Symmetric Nanowire MOSFETs
Ganeriwala et al. A bottom-up scalable compact model for quantum confined nanosheet FETs
Maneux et al. strategies for characterization and parameter extraction of vertical junction-less nanowire FETs dedicated to design technology co-optimization
Espiñeira et al. Does the threshold voltage extraction method affect device variability?
Jayadeva et al. Compact model of short-channel MOSFETs considering quantum mechanical effects