[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Varvello et al., 2014 - Google Patents

Multi-layer packet classification with graphics processing units

Varvello et al., 2014

View PDF
Document ID
13187508515818124488
Author
Varvello M
Laufer R
Zhang F
Lakshman T
Publication year
Publication venue
Proceedings of the 10th ACM International on Conference on emerging Networking Experiments and Technologies

External Links

Snippet

The rapid growth of server virtualization has ignited a wide adoption of software-based virtual switches, with significant interest in speeding up their performance. In a similar trend, software-defined networking (SDN), with its strong reliance on rule-based flow classification …
Continue reading at conferences2.sigcomm.org (PDF) (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Programme initiating; Programme switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46Multiprogramming arrangements
    • G06F9/52Programme synchronisation; Mutual exclusion, e.g. by means of semaphores; Contention for resources among tasks
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46Multiprogramming arrangements
    • G06F9/54Interprogramme communication; Intertask communication
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/30Arrangements for executing machine-instructions, e.g. instruction decode
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
    • G06F15/163Interprocessor communication
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/30Information retrieval; Database structures therefor; File system structures therefor
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored programme computers
    • G06F15/78Architectures of general purpose stored programme computers comprising a single central processing unit
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic regulation in packet switching networks
    • H04L47/10Flow control or congestion control
    • H04L47/24Flow control or congestion control depending on the type of traffic, e.g. priority or quality of service [QoS]
    • H04L47/2441Flow classification
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformations of program code
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Similar Documents

Publication Publication Date Title
Varvello et al. Multi-layer packet classification with graphics processing units
Farshin et al. Make the most out of last level cache in intel processors
US11636154B2 (en) Data flow graph-driven analytics platform using data processing units having hardware accelerators
Kalia et al. Raising the Bar for Using {GPUs} in Software Packet Processing
US20240259322A1 (en) Systems, devices and methods with offload processing devices
US8301788B2 (en) Deterministic finite automata (DFA) instruction
US9509809B2 (en) Packet classification using multiple processing units
Becchi et al. Evaluating regular expression matching engines on network and general purpose processors
Vasiliadis et al. Parallelization and characterization of pattern matching using GPUs
US11409506B2 (en) Data plane semantics for software virtual switches
WO2011078108A1 (en) Pattern-matching method and device for a multiprocessor environment
Piyachon et al. Efficient memory utilization on network processors for deep packet inspection
WO2014113056A1 (en) Offload processor modules for connection to system memory
CN115917520A (en) System for providing LPM implementations for programmable data planes via distributed algorithms
Guo et al. A scalable multithreaded l7-filter design for multi-core servers
Yuan et al. HALO: Accelerating flow classification for scalable packet processing in NFV
Zhu et al. Hermes: an integrated CPU/GPU microarchitecture for IP routing
CN114189368B (en) Multi-inference engine compatible real-time flow detection system and method
Tumeo et al. Efficient pattern matching on GPUs for intrusion detection systems
Marts et al. MPI tag matching performance on ConnectX and ARM
Vasiliadis et al. Design and implementation of a stateful network packet processing framework for GPUs
Jung et al. Gpu-ether: Gpu-native packet i/o for gpu applications on commodity ethernet
Tran et al. High performance string matching for security applications
Miano et al. Accelerating network analytics with an on-nic streaming engine
Hong et al. Kafe: Can os kernels forward packets fast enough for software routers?