Rack et al., 2016 - Google Patents
Fast and accurate modelling of large TSV arrays in 3D-ICs using a 3D circuit model validated against full-wave FEM simulations and RF measurementsRack et al., 2016
View PDF- Document ID
- 13012444111533298882
- Author
- Rack M
- Raskin J
- Sun X
- Van der Plas G
- Absil P
- Beyne E
- Publication year
- Publication venue
- 2016 IEEE 66th Electronic Components and Technology Conference (ECTC)
External Links
Snippet
This paper presents a 3D circuit model capable of rapidly and accurately evaluating substrate noise coupling in the context of 3D integration. Since TSVs are large and noisy structures, the evaluation of electromagnetic coupling to and from TSVs has become crucial …
- 238000005259 measurement 0 title abstract description 11
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5009—Computer-aided design using simulation
- G06F17/5036—Computer-aided design using simulation for analog modelling, e.g. for circuits, spice programme, direct methods, relaxation methods
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5068—Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
- G06F17/5081—Layout analysis, e.g. layout verification, design rule check
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
- G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants; Measuring impedance or related variables
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Yao et al. | Modeling and application of multi-port TSV networks in 3-D IC | |
US9886542B2 (en) | Modeling TSV interposer considering depletion capacitance and substrate effects | |
Salah et al. | Equivalent lumped element models for various n-port Through Silicon Vias networks | |
Zhao et al. | Transient analysis of through-silicon vias in floating silicon substrate | |
Wang et al. | Compact model to efficiently characterize TSV-to-transistor noise coupling in 3D ICs | |
Rack et al. | Fast and accurate modelling of large TSV arrays in 3D-ICs using a 3D circuit model validated against full-wave FEM simulations and RF measurements | |
Xu et al. | Parasitics extraction, wideband modeling and sensitivity analysis of through-strata-via (TSV) in 3D integration/packaging | |
Lu et al. | Scalable modeling and wideband measurement techniques for a signal TSV surrounded by multiple ground TSVs for RF/high-speed applications | |
Lorival et al. | An efficient and simple compact modeling approach for 3-D interconnects with IC׳ s stack global electrical context consideration | |
Li et al. | Accurate field-circuit hybrid modeling of high-density through glass via arrays by using perfect magnetic conductors and cylindrical mode expansion | |
Lu et al. | Comparative modeling of single-ended through-silicon vias in GS and GSG configurations up to v-band frequencies | |
Dahl et al. | Efficient computation of localized fields for through silicon via modeling up to 500 GHz | |
Boyer et al. | Modeling magnetic near-field injection at silicon die level | |
Han et al. | Consideration of MOS capacitance effect in TSV modeling based on cylindrical modal basis functions | |
Sun et al. | Modeling and Characterization of TSV-Induced Noise Coupling | |
Jiao et al. | A fast frequency-domain eigenvalue-based approach to full-wave modeling of large-scale three-dimensional on-chip interconnect structures | |
Piersanti et al. | Impact of voltage bias on through silicon vias (TSV) depletion and crosstalk | |
Sun et al. | A Simple and Efficient RF technique for TSV Characterization | |
Qian et al. | Through-silicon-via crosstalk model and optimization design for three-dimensional integrated circuits | |
Le Maitre et al. | Device and electromagnetic co-simulation of TSV: Substrate noise study and compact modeling of a TSV in a matrix | |
Liu et al. | Crosstalk analysis of through silicon vias with low pitch-to-diameter ratio in 3D-IC | |
Wang et al. | Modeling and analysis of vertical noise coupling in TSV-based 3D mixed-signal integration | |
Wang et al. | Wideband 40ghz tsv modeling analysis under high speed on double side probing methodology | |
Gong | TSV equivalent circuit model using 3D full-wave analysis | |
Gontrand et al. | 3D substrate modeling; from a first order electrical analysis, towards some possible signal fluctuations consideration, for radio frequency circuits |